| commit | fcc6c7e3d59efc7be02d5687200a166e6ca5e8d9 | [log] [tgz] |
|---|---|---|
| author | Yanchang Li <yl22@csr.com> | Fri Jan 09 10:53:04 2015 +0800 |
| committer | Yanchang Li <yl22@csr.com> | Fri Jan 09 10:53:04 2015 +0800 |
| tree | 2c9b692d4d8d1827ab611e3e1e97cd906cdd1afa | |
| parent | 4ba9d48cc6799a8d2801f97ae9f4dd59b1d04d11 [diff] |
atlas7: ddr: enable DDR800M configs configure ddr run @800Mhz Change-Id: I80d0a9f145bbedba6b0693af93e315f1c0dbd429 Signed-off-by: Yanchang Li <yl22@csr.com>