tag bd683566784124ca1d5197bf1e2acfd3ce0235f3
tagger Jason Cooper <jason@lakedaemon.net> Mon May 20 19:45:08 2013 +0000
object 489e138eec96f529c5e8d4cd3ea45882ecdbf5ca

mvebu fixes for v3.10 (round 2)

 - mvebu (and orion SoCs)
    - remove init_dma_coherent_pool_size()

 - mvebu
    - fix ranges DT property
    - fix DT reg value for L2 cache
    - select ARCH_REQUIRE_GPIOLIB

 - orion legacy
    - fix num_resources and id for ge10 and ge11

commit 489e138eec96f529c5e8d4cd3ea45882ecdbf5ca
author Gregory CLEMENT <gregory.clement@free-electrons.com> Mon May 20 16:13:27 2013 +0200
committer Jason Cooper <jason@lakedaemon.net> Mon May 20 17:44:54 2013 +0000
tree badd323fe90ee0a813bde9f896bc6c30067e7a2c
parent 2b8b2797142c7951e635c6eec5d1705ee9bc45c5

ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node

During the conversion to the internal-regs' subnode, the L2-cache node
haven not been converted (due to a wrong choice made by myself during
the resolution of the merge conflict when I rebased the commit). This
leads to wrong address for L2 cache which prevent it to be used on
Armada 370. This commit fix the address reg of the e L2-cache node.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>