pci: endpoint: for 4.12
*) Add PCI endpoint core layer
*) Modify designware and dra7xx driver to be configured in EP mode
*) Add a PCI endpoint *test* function driver and corresponding host
driver
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP
The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should be
set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO in RC
mode. However in EP mode, the host system is not able to access the
MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
1 file changed
