| commit | 9b038bc58ad2658c76fd8b50bb333dfd4454573c | [log] [tgz] |
|---|---|---|
| author | Emilio López <emilio@elopez.com.ar> | Fri Jul 18 15:28:02 2014 -0300 |
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | Wed Oct 21 21:51:29 2015 +0200 |
| tree | 00ea3d70e94441ae7b7a0fd43b1f4c2e083d651a | |
| parent | e2771545f49fbfec874642533058a3423fa29e16 [diff] |
clk: sunxi: mod1 clock support The module 1 type of clocks consist of a gate and a mux and are used on the audio blocks to mux and gate the PLL2 outputs for AC97, IIS or SPDIF. This commit adds support for them on the sunxi clock driver. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>