blob: 7b83565a8c5a663b1ee54f284f5497c1041894ab [file] [log] [blame]
From b580b7eedc8ee3990b118003c4793291387c40ac Mon Sep 17 00:00:00 2001
From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Fri, 21 Jun 2013 11:38:28 +0200
Subject: [PATCH] gpu: i915: allow the user not to do the wbinvd
The wbinvd() renders the system with i915 unusable on RT. Using this
expensive instruction avoids GPU trouble according to
https://bugs.freedesktop.org/show_bug.cgi?id=62191
As a workaround for RT it is recommended to pin each GPU related process
to the same CPU and then disable this instruction via the module
paramter.
Cc: stable-rt@vger.kernel.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
---
drivers/gpu/drm/i915/i915_gem.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -35,6 +35,7 @@
#include <linux/swap.h>
#include <linux/pci.h>
#include <linux/dma-buf.h>
+#include <linux/module.h>
static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj);
@@ -2713,6 +2714,10 @@ static inline int fence_number(struct dr
return fence - dev_priv->fence_regs;
}
+static bool do_wbinvd = true;
+module_param(do_wbinvd, bool, 0644);
+MODULE_PARM_DESC(do_wbinvd, "Do expensive synchronization. Say no after you pin each GPU process to the same CPU in order to lower the latency.");
+
static void i915_gem_write_fence__ipi(void *data)
{
wbinvd();
@@ -2736,8 +2741,16 @@ static void i915_gem_object_update_fence
* on each processor in order to manually flush all memory
* transactions before updating the fence register.
*/
- if (HAS_LLC(obj->base.dev))
- on_each_cpu(i915_gem_write_fence__ipi, NULL, 1);
+ if (HAS_LLC(obj->base.dev)) {
+ if (do_wbinvd) {
+#ifdef CONFIG_PREEMPT_RT_FULL
+ pr_err_once("WARNING! The i915 invalidates all caches which increases the latency.");
+ pr_err_once("As a workaround use 'i915.do_wbinvd=no' and PIN each process doing ");
+ pr_err_once("any kind of GPU activity to the same CPU to avoid problems.");
+#endif
+ on_each_cpu(i915_gem_write_fence__ipi, NULL, 1);
+ }
+ }
i915_gem_write_fence(dev, fence_reg, enable ? obj : NULL);
if (enable) {