| tag | 536604b0f9e0a4df037f13aaee87f4a81145bd57 | |
|---|---|---|
| tagger | Ulf Hansson <ulf.hansson@linaro.org> | Fri Jun 03 09:26:03 2016 +0200 |
| object | afefc102df1bf5b75d7106771ecbe0ef546edc96 |
MMC core: - Fix/restore behaviour when selecting bus width for (e)MMC MMC host: - sunxi: Fix eMMC HS-DDR modes on Allwinner A80
| commit | afefc102df1bf5b75d7106771ecbe0ef546edc96 | [log] [tgz] |
|---|---|---|
| author | Chen-Yu Tsai <wens@csie.org> | Sun May 29 15:04:44 2016 +0800 |
| committer | Ulf Hansson <ulf.hansson@linaro.org> | Thu Jun 02 10:40:20 2016 +0200 |
| tree | 42e1aadddf87f1323d885dc51f650b4c55b17ad0 | |
| parent | 0175249efa9310eed79650209600a75ace656bc9 [diff] |
mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 Now the the HS-DDR mode clock timings have been corrected, we can re-enable these modes on the A80. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>