riscv: G extension implies Zicsr & Zifencei
So, add the corresponding flags.
Signed-off-by: Luc Van Oostenryck <lucvoo@kernel.org>
diff --git a/target-riscv.c b/target-riscv.c
index d90f45a..d30be04 100644
--- a/target-riscv.c
+++ b/target-riscv.c
@@ -16,7 +16,7 @@
#define RISCV_COMP (1 << 8)
#define RISCV_EMBD (1 << 9)
#define RISCV_FPU (RISCV_FLOAT|RISCV_DOUBLE|RISCV_FDIV)
-#define RISCV_GENERIC (RISCV_MUL|RISCV_DIV|RISCV_ATOMIC|RISCV_FPU)
+#define RISCV_GENERIC (RISCV_MUL|RISCV_DIV|RISCV_ATOMIC|RISCV_FPU|RISCV_ZICSR|RISCV_ZIFENCEI)
#define RISCV_ZICSR (1 << 10)
#define RISCV_ZIFENCEI (1 << 11)
#define RISCV_ZICBOM (1 << 12)
