)]}' { "log": [ { "commit": "d3e1dcae4173f02f902ce00e37a6c6972e9f117e", "tree": "dcacc1f573ce69160f1718ea7f1e449e3fc7131c", "parents": [ "97e9935e63e321af4fa1307dafb5dde6586055d9" ], "author": { "name": "winterddd", "email": "tianruidong@linux.alibaba.com", "time": "Fri Oct 10 11:33:41 2025 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 09 20:41:02 2025 -0700" }, "message": "print si_addr_lsb in sigaction\n\nThe si_addr_lsb field specifies the extent of the memory corruption,\nencoded as the log2 of the size. We print this value to determine\nwhether the poisoned memory region corresponds to a normal page or\na huge page.\n\nSigned-off-by: winterddd \u003ctianruidong@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "97e9935e63e321af4fa1307dafb5dde6586055d9", "tree": "27512a53883a6411ddb2e8f3207a70c81d22f00b", "parents": [ "5e21ac3eb241284b731200eff6e02e9eda33e31d" ], "author": { "name": "winterddd", "email": "tianruidong@linux.alibaba.com", "time": "Fri Sep 26 10:19:11 2025 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Sep 26 09:11:41 2025 -0700" }, "message": "riscv: support riscv build include cross compile\n\ncross compile like kernel:\n\nmake ARCH\u003driscv CROSS_COMPILE\u003driscv64-unknown-linux-gnu-\n\nAlso support static build:\n\nmake ARCH\u003driscv CROSS_COMPILE\u003driscv64-unknown-linux-gnu- EXTRA_CFLAGS\u003d\"-static\"\n\nSigned-off-by: winterddd \u003ctianruidong@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "5e21ac3eb241284b731200eff6e02e9eda33e31d", "tree": "c29b8dc14f7f3b37e0137e6b62118c4688b20c18", "parents": [ "1b0e88355d3e9684d0c3068444d659aef76e0150" ], "author": { "name": "Kyle Meyer", "email": "kyle.meyer@hpe.com", "time": "Tue Aug 26 19:10:26 2025 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Aug 26 17:28:05 2025 -0700" }, "message": "proc_interrupt: Fix number of observed interrupts\n\nfgets() truncates lines in /proc/interrupts that exceed 4095 characters\ncausing an incorrect number of observed interrupts.\n\nFix number of observed interrupts by replacing fgets() with getline(),\nwhich dynamically allocates enough memory for the entire line.\n\nSigned-off-by: Kyle Meyer \u003ckyle.meyer@hpe.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "1b0e88355d3e9684d0c3068444d659aef76e0150", "tree": "f46e041ab58277fa1088d2f595da546bb812c94e", "parents": [ "bf2d17c48a65444ee342ccbed45c6f781b998c4c" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Sun Sep 01 11:32:09 2024 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Sep 20 11:39:28 2024 -0700" }, "message": "tlp_hdr_decoder: add support to decode AER header log\n\nWhen a PCIe AER error is captured, an error message will be output to\nconsole. If it\u0027s a correctable error, it is output as an info message.\nOtherwise, it is printed as an error. So users could choose different\nlog level to filter out correctable error messages.\n\nBelow shows an example::\n\n\tpcieport 0000:7d:00.0: AER: aer_layer\u003dTransaction Layer, aer_agent\u003dRequester ID\n\tpcieport 0000:7d:00.0: AER: aer_uncor_severity: 0x00462030\n\tpcieport 0000:7d:00.0: AER: TLP Header: 4a008001 7e010004 7d000030 00000000\n\nAdd a tool to decode the TLP Header, e.g:\n\n\t./tlp_hdr_decoder \"4a008001 7e010004 7d000030 00000000\"\n\tOriginal TLP register:\n\t 4a008001 7e010004 7d000030 00000000\n\tTLP (little-endian):\n\t 0x0180004a 0x0400017e 0x3000007d 0x00000000\n\n\tCommon TLP Header:\n\t---------------------------\n\t Type : 0x4a (CPLD (Completion with Data))\n\t TH : 0x0\n\t RSV1 : 0x0\n\t A2 : 0x0\n\t T8 : 0x0\n\t Traffic Class : 0x0\n\t T9 : 0x0\n\t Length : 0x180\n\t Address Type : 0x0\n\t Attributes : 0x0\n\t EP : 0x0\n\t TD : 0x0\n\n\tSecond DWORD:\n\t---------------------------\n\t cplID : 017e (7e:00.1)\n\t Status : 0x0\n\t BCM : 0x0\n\t Byte Count : 0x4\n\n\tThird DWORD:\n\t---------------------------\n\t reqID : 007d (7d:00.0)\n\t Tag : 0x0\n\t Address Low : 0x18\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "bf2d17c48a65444ee342ccbed45c6f781b998c4c", "tree": "6e3df55d21ea17aa5a60e09a9c0a02d1572b7efd", "parents": [ "24ce9ff7335b8b43248e7ed342f2a1d750cf5dc8" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jul 01 16:22:29 2024 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jul 01 16:24:38 2024 -0700" }, "message": "mca-recover: Flush cache line before trying to consume target address\n\nSome injection modes do not flush the target address from the cache.\nAdd a CLFLUSH to be sure.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "24ce9ff7335b8b43248e7ed342f2a1d750cf5dc8", "tree": "8931aee5d1f8f7ed8a406f2a717e0b328f16c603", "parents": [ "cd331bc70289d30fa077ffb342b10e24df39c8b4" ], "author": { "name": "cheliequan", "email": "cheliequan@inspur.com", "time": "Sun Jun 16 23:09:06 2024 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jun 17 11:36:56 2024 -0700" }, "message": "einj_mem_uc: Fix aarch64 build error\n\nSolve compilation errors, tested on Huanghe 2280 V2 aarch64 server.\n\nFixes: cd331bc70289 (\"einj_mem_uc: Add clear_cache operation on aarch64 platform\")\nSigned-off-by: cheliequan \u003ccheliequan@inspur.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "cd331bc70289d30fa077ffb342b10e24df39c8b4", "tree": "5f58d486ecba978b423e0bfb67de2d1afd1cc52c", "parents": [ "8dc95f46b47543cc1fa887d879f297f9fd01450c" ], "author": { "name": "cheliequan", "email": "cheliequan@inspur.com", "time": "Mon Mar 25 17:20:18 2024 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jun 07 13:21:21 2024 -0700" }, "message": "einj_mem_uc: Add clear_cache operation on aarch64 platform\n\nAdd clear_cache operation on aarch64 platform to improve the success\nrate of memory injection instructions.\n\nThe original injection hardware error instruction does not take\neffect every time. In most cases, the hardware injection event\nis triggered through the hard offline of the memory page.\n\nAfter adding the clear_cache operation, the success rate of\nhardware injection events is significantly improved, and it\nis basically successful every time.\n\n[Tony: Cleanup to make this just for aarch64 platform]\n\nSigned-off-by: cheliequan \u003ccheliequan@inspur.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "8dc95f46b47543cc1fa887d879f297f9fd01450c", "tree": "2742a80ab60f847c1ad53cf04db10ff6d4ff4714", "parents": [ "f230628f5aeb00987d640c3240be9582fc8e6000" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Nov 28 10:54:43 2023 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Nov 28 10:54:43 2023 -0800" }, "message": "proc_cpuinfo: Fix bit shift for socket bitmask\n\nIf there are more than 32 sockets \"1 \u003c\u003c s\" doesn\u0027t work. Use \"1L \u003c\u003c s\"\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f230628f5aeb00987d640c3240be9582fc8e6000", "tree": "60e0f0921caade7b2cd9b65f8bb6378d7670dcbc", "parents": [ "17b57df4684ac939e6db67b715b322e47c3c0961" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Oct 24 19:05:41 2023 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Oct 24 19:05:41 2023 -0700" }, "message": "proc_cpuinfo: Add sanity check for number of sockets\n\nA misconfigured system appeared to have a huge number of sockets. The\ncode here did not handle this gracefully as the bitmask of sockets is\nonly 64-bits wide, so the extra sockets were not counted.\n\nIt doesn\u0027t seem worth changiing the code to support more sockets as such\nsystems do not exist.\n\nJust check, warn, and exit if a socket \u003e 63 is found.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "17b57df4684ac939e6db67b715b322e47c3c0961", "tree": "50fb0d8879a708de0e60f4c0d52681ea0d2a1161", "parents": [ "7f52fe31180e3ffb2378e929d3f4b464f0d48717" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Jul 19 11:05:10 2023 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Jul 19 11:05:10 2023 -0700" }, "message": "einj_mem_uc: Check if kernel has CMCI disabled\n\nOn Intel there is a race between a memory controller reporting it\nsaw an error with CMCI and the consumption of an uncorrected error\nreporting with machine check. If the CMCI wins the race, Linux\ntakes the page offline before any consumption can occur. Thus\nthere may be no machine check.\n\nSome users want to explicity test the #MC recovery case. They\ndisable CMCI in the kernel with the boot flag \"mce\u003dno_cmci\".\nIn this case there will always be a machine check. But the test\nreports \"fail\" because it was expecting to se a CMCI.\n\nAdd a check to see if CMCI is disabled. If it is, mask out the\nF_CMCI expectation.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "7f52fe31180e3ffb2378e929d3f4b464f0d48717", "tree": "d1e763abf9cecc285b39cebf5e57abfaf3dba27b", "parents": [ "36a2fc8e6665f7c385e49b47da2ee467e78b7261" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jun 12 21:23:32 2023 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jun 12 21:23:32 2023 -0700" }, "message": "einj_mem_uc: Delete the checks for \"advanced RAS\" CPU models\n\nThese made sense in the early days of this tool when only a\nfew CPU models supported recovery from poisoned memory consumption.\nBut more new models support recovery than do not.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "36a2fc8e6665f7c385e49b47da2ee467e78b7261", "tree": "3797eedc7111722588c5422924f51300eda992b4", "parents": [ "13e098c3afd6705abd1ff0ba1a3cec6a5486c466" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Apr 25 21:23:23 2023 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jun 12 09:24:31 2023 -0700" }, "message": "einj_mem_uc: support error injection on AMD EPYC platform\n\nAMD EPYC CPUs also support APEI EINJ error injection. Tested on AMD Milan\nand Genoa.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "13e098c3afd6705abd1ff0ba1a3cec6a5486c466", "tree": "73f0500eea8a8fa82345456edeb2c3369367f571", "parents": [ "95b089cf33ae2fac5cd34236cdc4e8fdd69c6dbb" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Apr 25 21:23:22 2023 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jun 09 11:49:32 2023 -0700" }, "message": "einj_pcie_err: support PCIe error injection through EINJ\n\nSupport PCIe error injection, e.g. fatal error, through APEI EINJ\ninterface. Tested on ARM platform (Alibaba Yitian 710) and X86 platform\n(Intel Sapphire Rapids).\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "95b089cf33ae2fac5cd34236cdc4e8fdd69c6dbb", "tree": "3da30748c24c7ac5a9a912ddeead7bdffed2cf11", "parents": [ "56c34a74bb5946e153fd8529dba87e2adca57f5d" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Apr 04 16:23:53 2023 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Apr 24 11:32:13 2023 -0700" }, "message": "einj.h: add a header file to declare common EINJ related operations\n\nLots of files declare the same EINJ related macros like EINJ_ETYPE and\nfunctions like wfile(), include the same header files.\n\nTo simplify the code and make it easier to maintain, move all common EINJ\nrelated operations to a header file.\n\n[Tony: Move the code out of einj.h and into new file einj.c]\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "56c34a74bb5946e153fd8529dba87e2adca57f5d", "tree": "3cf9737bc8b1c9a64eaa87f194a159903037b11e", "parents": [ "507960843a49fb955bc4b4e6548618eec592ec09" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Mon Feb 13 10:02:21 2023 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Mar 06 13:03:40 2023 -0800" }, "message": "einj_mem_uc: add extra arguments to support guest error injection\n\nTo support Guest Error injection, add two extra arguments:\n\n- \u0027-j\u0027: skip error injection, this step should do with host physical\n address on host which creates GPA-\u003eHPA mappings for the guest.\n- \u0027-k\u0027: kick off trigger by writing a file from remote (host).\n\nThe steps to inject guest error are:\n\nSTEP 1: start a VM with a stdio monitor which allows giving complex\ncommands to the QEMU emulator.\n\n\tqemu-system-aarch64 -enable-kvm \\\n\t\t-cpu host \\\n\t\t-M virt,gic-version\u003d3 \\\n\t\t-m 8G \\\n\t\t-d guest_errors \\\n\t\t-rtc base\u003dlocaltime,clock\u003dhost \\\n\t\t-smp cores\u003d2,threads\u003d2,sockets\u003d2 \\\n\t\t-object memory-backend-ram,id\u003dmem0,size\u003d4G \\\n\t\t-object memory-backend-ram,id\u003dmem1,size\u003d4G \\\n\t\t-numa node,memdev\u003dmem0,cpus\u003d0-3,nodeid\u003d0 \\\n\t\t-numa node,memdev\u003dmem1,cpus\u003d4-7,nodeid\u003d1 \\\n\t\t-bios /usr/share/AAVMF/AAVMF_CODE.fd \\\n\t\t-drive driver\u003dqcow2,media\u003ddisk,cache\u003dwriteback,if\u003dvirtio,id\u003dalinu1_rootfs,file\u003d/path/to/image.qcow2 \\\n\t\t-netdev user,id\u003dn1,hostfwd\u003dtcp::5555-:22 \\\n\t\t-serial telnet:localhost:4321,server,nowait \\\n\t\t-device virtio-net-pci,netdev\u003dn1 \\\n\t\t-monitor stdio\n\tQEMU 7.2.0 monitor - type \u0027help\u0027 for more information\n\t(qemu) VNC server running on 127.0.0.1:5900\n\nSTEP 2: login guest and install ras-tools, then run `einj_mem_uc` to\nallocate a page in userspace, dumps the virtual and physical address of the\npage. The `-j` is to skip error injection and `-k` is to wait for a kick.\n\n\t$ ./einj_mem_uc single -j -k\n\t0: single vaddr \u003d 0xffffbd88c400 paddr \u003d 151f21400\n\nSTEP 3: run command `gpa2hpa` in QEMU monitor and it will print the host\nphysical address at which the guest\u0027s physical address addr is mapped.\n\n\t(qemu) gpa2hpa 0x151f21400\n\tHost physical address for 0x151f21400 (mem1) is 0x935757400\n\nSTEP 4: inject an uncorrected error via the APEI interface to the finally\ntranslated host physical address on host.\n\n\techo 0x949a84400 \u003e /sys/kernel/debug/apei/einj/param1\n\techo 0xfffffffffffff000 \u003e /sys/kernel/debug/apei/einj/param2\n\techo 0x0 \u003e /sys/kernel/debug/apei/einj/flags\n\techo 0x10 \u003e /sys/kernel/debug/apei/einj/error_type\n\techo 1 \u003e /sys/kernel/debug/apei/einj/notrigger\n\techo 1 \u003e /sys/kernel/debug/apei/einj/error_inject\n\nSTEP 5: then kick `einj_mem_uc` to trigger the error by writing\n\"trigger_start\". In this example, the kick is done on host.\n\n\tssh -p 5555 root@localhost \"echo trigger \u003e ~/trigger_start\"\n\nSTEP 6: We will observe that the QEMU process exit.\n\n\t(qemu) qemu-system-aarch64: Hardware memory error!\n\nSigned-off-by: zhangyangzeyu.zyzy \u003cxiaoque@linux.alibaba.com\u003e\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "507960843a49fb955bc4b4e6548618eec592ec09", "tree": "b147913e2163e8d0610ec6974a270db34898e0e6", "parents": [ "bfacfa2af3e04b51e39c5cbbf45ad6ac9c23a1b3" ], "author": { "name": "Bixuan Cui", "email": "cuibixuan@linux.alibaba.com", "time": "Mon Feb 27 10:55:24 2023 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Feb 27 09:20:00 2023 -0800" }, "message": "einj_mem_uc: Support before 3.14 kernel\n\nRun einj_mem_uc in 3.10 kernel:\n./einj_mem_uc: cannot open \u0027/sys/kernel/debug/apei/einj/flags\u0027\n\nThe \u0027flags\u0027 is added by 3482fb5e0c1c (ACPI, APEI, EINJ: Changes to the\nACPI/APEI/EINJ debugfs interface) on 3.14 kernel. Add kernel version\ncheck.\n\nSigned-off-by: Bixuan Cui \u003ccuibixuan@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "bfacfa2af3e04b51e39c5cbbf45ad6ac9c23a1b3", "tree": "f184ab2c4de77e73c9f0360b70e1b449f7f1f258", "parents": [ "60c3182214feb4b192234eb980f30e109bbde5cd" ], "author": { "name": "Bixuan Cui", "email": "cuibixuan@linux.alibaba.com", "time": "Tue Feb 07 16:17:32 2023 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 10:23:24 2023 -0800" }, "message": "proc_cpuinfo: fix the bug that modelnum is always zero\n\nFixes: 65d692c5ce8e (einj_mem_uc: Count Ice Lake Xeon as \"advanced RAS\")\nSigned-off-by: Bixuan Cui \u003ccuibixuan@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "60c3182214feb4b192234eb980f30e109bbde5cd", "tree": "680aeadc2b554076db543176a1e67993439c84c9", "parents": [ "3f414a16c32958ae961ebc7fc3b48b9f28112ec2" ], "author": { "name": "Bixuan Cui", "email": "cuibixuan@linux.alibaba.com", "time": "Sat Jan 28 14:34:00 2023 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 30 11:07:11 2023 -0800" }, "message": "einj_mem_uc: Add new test case for overflow\n\nTrigger two UCE by reading from two target addresses at the same time.\nThe OVER(Error overflow) bit will be set and probably fatal.\n\nSigned-off-by: Bixuan Cui \u003ccuibixuan@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "3f414a16c32958ae961ebc7fc3b48b9f28112ec2", "tree": "a03435c5ca7976fb407a4e306d8ca915af8f8444", "parents": [ "f276ebba2d1ff616e5a2c7673343f588843bcb64" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Thu Jan 12 14:43:14 2023 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 12 14:42:18 2023 -0800" }, "message": "einj_mem_uc: fix compilation error about trigger_share\n\nSome compilers (GCC 9.2.1) complain:\n\neinj_mem_uc.c: In function ‘trigger_share’:\neinj_mem_uc.c:656:3: error: a label can only be part of a statement and a declaration is not a statement\n 656 | char *p \u003d mmap(NULL, pagesize, PROT_READ, MAP_SHARED, fileno(pcfile), 0);\n | ^~~~\nmake: *** [\u003cbuiltin\u003e: einj_mem_uc.o] Error 1\n\nMake all declarations precede all statements within the block.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f276ebba2d1ff616e5a2c7673343f588843bcb64", "tree": "e40f65573f3505f7dd0a79c324ad6b422c79d781", "parents": [ "93f96e3f8fa2ec67e9cc19d0e728603440e535b4" ], "author": { "name": "Bixuan Cui", "email": "cuibixuan@linux.alibaba.com", "time": "Thu Jan 05 11:31:36 2023 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 05 14:12:18 2023 -0800" }, "message": "einj_mem_uc: add new test case for share memory\n\nShare memory is read by two tasks to target address.\n\n[Tony: Fix some indenting. Rename page_cache_alloc() to\nmap_file_alloc() now it is used for another test]\nSigned-off-by: Bixuan Cui \u003ccuibixuan@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "93f96e3f8fa2ec67e9cc19d0e728603440e535b4", "tree": "1fdea0147f2d683f8b75594c5461a87b13119e21", "parents": [ "132428d89a7c09744b8fd57c002ca4b13cf92107" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Nov 29 21:28:04 2022 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Nov 29 09:59:59 2022 -0800" }, "message": "vtop: unfity all cases with the same vtop() function\n\nThere are multiple implementations of vtop() function, remove extra copies\nof the vtop() function and use the one from proc_pagemap.c\n\nSuggested-by: Luck, Tony \u003ctony.luck@intel.com\u003e\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "132428d89a7c09744b8fd57c002ca4b13cf92107", "tree": "01b7d6edfd1303838c387b65a9fe8e1ea55c07f7", "parents": [ "58d3e234d515e820febaa9fba5e7dfabf5baee95" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Nov 29 21:28:03 2022 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Nov 29 09:56:28 2022 -0800" }, "message": "victim: add a victim to provide target injection memory under user context\n\nVictim workes under user context, which provides target memory chunk for\nerror injection. It can be used for all kinds of error types,\nincluding Corrected error and Uncorrected error(IFU/DCU).\n\nHere is an simple example for DCU:\nMmap one page memory and returns starting address, and then translate\nvirtual address to physical address. Caller like shell script can\ninject UC error (error type 0x10 in EINJ table) on returned physical\naddress. Meanwhile, victim continues to read/write on returned memory\nspace to trigger DCU happening ASAP.\n\nNOTE: this workload is borrowed from mce-test. Thanks to the origial\nauthors, Tony Luck, Gong Chen, Wen Jin.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "58d3e234d515e820febaa9fba5e7dfabf5baee95", "tree": "e672ffcf93adf38f1cfee608d66287e70fbd0da5", "parents": [ "2624df117af1b4d05f2d9bab14fbfc8f85c514d3" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Nov 29 21:28:02 2022 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Nov 29 09:55:06 2022 -0800" }, "message": "memattr: move the test case out of driver directory\n\nMove the memattr test case out of driver directory and rename it\nwith a generic name.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "2624df117af1b4d05f2d9bab14fbfc8f85c514d3", "tree": "9b9d18b6154d9918e747e6295179b1087aed59c3", "parents": [ "26393ed44ba02b7855ef3a1c58e3ea3b1473767b" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Mon Nov 28 21:55:23 2022 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Nov 28 08:09:50 2022 -0800" }, "message": "einj_mem_uc: relax vendor id check\n\nSome firmwares support advanced RAS but does not fill in the vendor id,\ne.g. Kunpeng BIOS v1.91. Users complain that they can not use ras-tools\ndirectly.\n\nTherefore, relax vendor id check and just print an warning.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "26393ed44ba02b7855ef3a1c58e3ea3b1473767b", "tree": "301e33e1f8eb5c13ee1f694e1f3b0f5a1d90b715", "parents": [ "09a53f13248fe311311349d710ebfd6e492b4ca1" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Nov 04 13:43:04 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Nov 04 13:43:04 2022 -0700" }, "message": "einj_mem_uc: Implement trigger_prefetch() for x86\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "09a53f13248fe311311349d710ebfd6e492b4ca1", "tree": "ad5dad9f0ff97a2be94ffb6b9fc59129f8aec6cb", "parents": [ "80b0edd6e94f532a5b8ffcfc4257a6f0a0f4aca0" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Nov 04 22:51:20 2022 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Nov 04 13:02:04 2022 -0700" }, "message": "einj_mem_uc: add a case to trigger prefetch\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "80b0edd6e94f532a5b8ffcfc4257a6f0a0f4aca0", "tree": "4b8edccd63ca7f12986427e56392df0dbacff596", "parents": [ "724899c8405f3723f1f3c67de7a5b4429a81910a" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 20 15:01:15 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 20 15:04:45 2022 -0700" }, "message": "mca-recover: Fix compilation warning about fgets() return value\n\nSome compilers complain:\n\nmca-recover.c:135:9: warning: ignoring return value of ‘fgets’ \\\ndeclared with attribute ‘warn_unused_result’ [-Wunused-result]\n\nCheck the return value (even though it doesn\u0027t really matter).\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "724899c8405f3723f1f3c67de7a5b4429a81910a", "tree": "887452acacadc5eb6d2c5984dcc0996109e116bb", "parents": [ "0353291ec4a1993532baba9d72701a99c12dcd40" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Oct 19 11:51:28 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Oct 19 11:51:28 2022 -0700" }, "message": "einj_mem_uc: Better handling of \"-c\" and copy-on-write test\n\nIf the copy-on-write test passes, then the child process gets a\nSIGBUS and longjmp\u0027s back to the main loop. If \"-c\" had specified\nto repeat the test, both parent and child will go back around.\nLater loops will also include the grand-children and cousins!\n\nSet a flag to break out of the loop for the child of a copy-on-write\ntest.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "0353291ec4a1993532baba9d72701a99c12dcd40", "tree": "ff6d1afb73f0bbc31ace11ff4e017d407fd9e6fa", "parents": [ "c8aef396cc8ff29f5c2dcc6dd6dc56ed2d9202ad" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Oct 18 22:46:13 2022 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Oct 18 10:03:26 2022 -0700" }, "message": "hornet: extend ptrace with PTRACE_GETREGSET on arm64 platform\n\nhornet use ptrace(2) with PTRACE_GETREGS request to read the tracee\u0027s\ngeneral-purpose registers, but it does not work on arm64 platform.\n\nTo extend hornet on both X86 and arm64 platform, retrieve rip or PC in an\narchitecture-dependent way when PTRACE_GETREGS is not available.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "c8aef396cc8ff29f5c2dcc6dd6dc56ed2d9202ad", "tree": "be9f66ff69f85390f96a54c583530ab8d9c60b37", "parents": [ "9262f4f291dc1511b5d8ba83ffa46e6b7bb944fc" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 13 15:10:57 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 13 15:10:57 2022 -0700" }, "message": "einj_mem-uc: Add new test case for kernel copy-on-write\n\nSomeday I\u0027d like to fix this case in the kernel. For now just\ncreate a test case to generate the issue.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "9262f4f291dc1511b5d8ba83ffa46e6b7bb944fc", "tree": "ef3889e46633bf68a87a69d5ae9b86a04f807f2c", "parents": [ "0fbd1d82f15b27d5fbe34afb63d6e7955d0fe050" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 13 13:05:59 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 13 13:05:59 2022 -0700" }, "message": "einj_mem_uc: Error return from mmap(2) is not NULL\n\nCheck for MAP_FAILED instead.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "0fbd1d82f15b27d5fbe34afb63d6e7955d0fe050", "tree": "d22a7144a1b730c00f515534cadcbbe5ce7e09bd", "parents": [ "2740eba4435937341bb7dc4719d1d108f459d8b6" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 13 13:01:54 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 13 13:01:54 2022 -0700" }, "message": "einj_mem_uc: Add missing argument to error message\n\nCompiler complains (correctly) that the format string specifies\ntwo additional arguments, but only one is present. Fix it.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "2740eba4435937341bb7dc4719d1d108f459d8b6", "tree": "87cbceb14d2e12c04db381d3f328883575f04454", "parents": [ "ae751087afe12f98c573581eb06ee0583245f5fd" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Wed Oct 12 21:56:00 2022 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 13 10:05:53 2022 -0700" }, "message": "Add LICENSE.\n\nThese tools are all under GPLv2. Add the missing LICENSE.\n\nTony: cherry-picked from https://gitee.com/anolis/ras-tools.git\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "ae751087afe12f98c573581eb06ee0583245f5fd", "tree": "f70fa59625a6de28ce63fa73f32a2379ada8cf83", "parents": [ "7424ca7e42b45115462d8c9bfe89364c3ec33d2b" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Wed Oct 12 21:41:43 2022 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 13 10:03:28 2022 -0700" }, "message": "README: add a brief introduction of ras-tools\n\nTony: Cherry-picked from https://gitee.com/anolis/ras-tools.git with\nthe last paragraph about being a clone of this repo dropped.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "7424ca7e42b45115462d8c9bfe89364c3ec33d2b", "tree": "04d7af01bdf5ec73bbf451771f9e24162ba35c0a", "parents": [ "bd845af6ae49d614be3f5ed4c2915ac5c1ffbea7", "eada934874aa845d92a2782c21d820ff27488060" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 13 10:00:46 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Oct 13 10:00:46 2022 -0700" }, "message": "Merge from https://gitee.com/anolis/ras-tools.git\n\nLots of bugs fixes \u0026 cleanups. Plus ARM support!\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "eada934874aa845d92a2782c21d820ff27488060", "tree": "17662fcc24c210c3a9a960ef62f029546f4d4fce", "parents": [ "18bade659db463a167043b34d161095cd9bd6ba5" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Sun Sep 25 19:52:55 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Sun Sep 25 19:52:55 2022 +0800" }, "message": "ras-tolerance: overwrite error severity to a lower level at runtime\n\nWhen a hardware error occurs for a non corrected ras event the kernel can\ntake different actions. If the severity is fatal, the kernel panic\nimmediately.\n\nThis driver allows to overwrite error severity to a lower level at runtime,\nrecoverable by default. It is useful for test.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "18bade659db463a167043b34d161095cd9bd6ba5", "tree": "1c17e2be4c14801c86820bb2d287e54542b753c4", "parents": [ "fe4a436c9d33e388137ef8654f48dffa1ab0a765" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Sep 23 19:39:00 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Sep 23 19:39:00 2022 +0800" }, "message": "memattr: add a test suit to poison specific memory attribute\n\nThis patch add\n\n- pgprot_drv: a driver that allows a user-space program to mmap a buffer of\n contiguous physical memory with specific memory attribute.\n- test.c: a test case to poison the remaped memory.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "bd845af6ae49d614be3f5ed4c2915ac5c1ffbea7", "tree": "ced5f989ef33879bc96e9735dc161534c99a9bc9", "parents": [ "0ba123cafe1a1d96f99268ada302c14367244f87" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Sep 21 08:00:55 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Sep 21 08:00:55 2022 -0700" }, "message": "ras-tools: Add SPDX license tags\n\nThese tools are all under GPLv2. Add the missing tags.\n\nReported-by: Jiaqi Yan \u003cjiaqiyan@google.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "fe4a436c9d33e388137ef8654f48dffa1ab0a765", "tree": "8aa8ca945b21ff53c405fd1aae538e3c59375bc2", "parents": [ "31afc0db520db03fedaf6f207858ec26097adae8" ], "author": { "name": "Bixuan Cui", "email": "cuibixuan@linux.alibaba.com", "time": "Thu Sep 15 20:07:29 2022 +0800" }, "committer": { "name": "Bixuan Cui", "email": "cuibixuan@linux.alibaba.com", "time": "Thu Sep 15 20:07:29 2022 +0800" }, "message": "add thread cases\n\nSingle read by two threads to target address at the same time.\n\nSigned-off-by: Bixuan Cui \u003ccuibixuan@linux.alibaba.com\u003e\n" }, { "commit": "31afc0db520db03fedaf6f207858ec26097adae8", "tree": "d6b6a59830a49e923f42f5a5669c627c27ac2f26", "parents": [ "a98884b2782ab8e3d0e4465fa3788f29be00f171" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Wed Sep 14 22:20:20 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Wed Sep 14 22:24:50 2022 +0800" }, "message": "einj_mem_uc: enhance sig action to explicitly print si_code\n\nThe current sig action only prints fault address and restores the\nenvironment saved before and , we can not tell the SIGBUS reason.\nTherefore, explictly print si_code, 4 for BUS_MCEERR_AR, and 5 for\nBUS_MCEERR_AO.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "a98884b2782ab8e3d0e4465fa3788f29be00f171", "tree": "cf8de1461663851729185e57f0c128e6f9a35202", "parents": [ "cb000779db6e81845e3b19f24eea9ba53378bccb" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Mon Sep 05 20:50:35 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Mon Sep 05 21:07:32 2022 +0800" }, "message": "einj_mem_uc: trigger single with an offset\n\nThe Advanced ECC X4 employs symbol-based Reed-Solomon encoding. One symbol\nis 8 bits, message (data) length is 32 symbols (256 bits), ECC parity\nlength is 4 symbols (32 bits). When we inject a UC error, the platfrom may\nonly poison 32 symbols, in other words, only half cacheline is poisoned.\n\nTherefore, add a parameter to trigger with offset, e.g:\n\n ./einj_mem_uc single #equals to ./einj_mem_uc -z 0 single\n ./einj_mem_uc -z 32 single\n\nIn such scenario, the former will signal a exception while the latter will\nnot.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "cb000779db6e81845e3b19f24eea9ba53378bccb", "tree": "f04e06d707daf7b3119cea9a7b55f1cecbd98ba5", "parents": [ "00fac3288314f698d561a95d291b1f5c21bf72ed" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Aug 30 19:32:23 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Aug 30 19:50:58 2022 +0800" }, "message": "einj_mem_uc: Wait for injection to take effect before triggering\n\nEinj interrupt may be a SPI on arm64 and could be dispatched to any core,\nso the current process could run trigger action before the injection takes\neffect.\n\nAdd a sleep to wait for injection completion, and then trigger.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "00fac3288314f698d561a95d291b1f5c21bf72ed", "tree": "e1e4c07c15e36fc9e996adf3b66f002465aab064", "parents": [ "af0669f8305057bb415b56b02bea70c7cc45fef0" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Sat Aug 20 21:40:15 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Aug 30 19:28:21 2022 +0800" }, "message": "einj_mem_uc: add cases for platform specific\n\nAdd cases for platform specific, including CMN, GIC, SMMU, etc.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "af0669f8305057bb415b56b02bea70c7cc45fef0", "tree": "1abee82e783754a97719aef8a034dc166d985040", "parents": [ "49bded454d33278c1b40a73af04513fefc7da0d6" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Aug 12 14:58:44 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Aug 30 17:11:59 2022 +0800" }, "message": "einj_mem_uc: add a case for hugetlb page\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "49bded454d33278c1b40a73af04513fefc7da0d6", "tree": "91430611f25f1495f229ffe155541afa8f5d54de", "parents": [ "051c9b4379e3ec45b9f5b52fe73a0acd9343ef42" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Thu Aug 25 08:33:53 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Tue Aug 30 17:11:57 2022 +0800" }, "message": "einj_mem_uc: add cases to inject processor error\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "051c9b4379e3ec45b9f5b52fe73a0acd9343ef42", "tree": "ce60b45675ecd5744d5af4e15df3443b5dbc3d2f", "parents": [ "adbf8b3f6959f0eefbf89c3cb6775c4782d58140" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Sat Aug 20 19:23:09 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Thu Aug 25 10:46:30 2022 +0800" }, "message": "einj_mem_uc: add a case to trigger LLC UCE on arm64\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "adbf8b3f6959f0eefbf89c3cb6775c4782d58140", "tree": "4e2973efa898d1ece3563432cff56f012a06268b", "parents": [ "449c7138938b5e0ade28e8db73bcdb1e6bd144e2" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Aug 19 22:07:53 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Thu Aug 25 10:43:33 2022 +0800" }, "message": "einj_mem_uc: add explicitly str, strb and strh case for Arm64\n\nAdd cases to explicitly trigger write with STR, STRB, and STRH\ninstruction on Arm64 platform.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "449c7138938b5e0ade28e8db73bcdb1e6bd144e2", "tree": "ee0d51d8839f79bc1a0e7d21051d637455452f16", "parents": [ "9f1eadac8adb39918241865a53d624c32d6760d1" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Aug 19 21:54:04 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Thu Aug 25 09:15:04 2022 +0800" }, "message": "einj_mem_uc: add a z flag to trigger write with an offset\n\nOn some platform, write to different offset within the poison cacheline\nperforms differently. Add a z flag so that we could trigger write with\nan offset.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "9f1eadac8adb39918241865a53d624c32d6760d1", "tree": "70bc27b8d39f39422914845dd0d39b2263cbc842", "parents": [ "b7b70cc62fb9737eff82fc191b6a0391b3f93b94" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Aug 12 19:39:02 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Thu Aug 25 09:09:54 2022 +0800" }, "message": "einj_mem_uc: explicitly print step when inject and trigger error\n\nThe error injection mechanism is a two-step process. First inject the\nerror, then perform some actions to trigger it. When the system is in\nearly kill mode, trigger step is not needed. Explicitly print step\nwhich are runnig on, so we can tell the how the error occurs.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "b7b70cc62fb9737eff82fc191b6a0391b3f93b94", "tree": "494903e67c1308adcc8a9ff57be5f2b9480bcf4e", "parents": [ "cb5e1bc7b56a54682765f8a8fac0e69a77231ca2" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Aug 19 18:52:09 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Thu Aug 25 09:03:49 2022 +0800" }, "message": "einj_mem_uc: implement memcpy in assembly on Arm64\n\nThere is only X86 assembly version of memcpy, add Arm64 version for\nmemcpy case.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "cb5e1bc7b56a54682765f8a8fac0e69a77231ca2", "tree": "81a2bf95e0b7e55068f7e5c068e642ff94a78127", "parents": [ "fa48527470572391b7e8aa53960d91cfde5dc80e" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Aug 19 15:33:36 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Thu Aug 25 09:03:05 2022 +0800" }, "message": "einj_mem_uc: check advanced RAS support by vendor id\n\nThe vendor interface of EINJ provides vendor_id, device_id, rev_id, etc.\nCheck advanced RAS support by vendor id.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "fa48527470572391b7e8aa53960d91cfde5dc80e", "tree": "b18e362d9b43ba01a824036720dae7c31c0b79e0", "parents": [ "5813875f6df15d5f5bc6ab534196e8511c1f6c1b" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Aug 19 22:14:48 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Thu Aug 25 08:56:46 2022 +0800" }, "message": "einj_mem_uc: add Sflag as condition when check configuration\n\nIt is not necessary to check configuration when use madvise(2) to\nsimulate poison on a page. Add Sflag as condition.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "5813875f6df15d5f5bc6ab534196e8511c1f6c1b", "tree": "84a2ca9b1866ecbfb0e094c41fc1ef56b2b41ea5", "parents": [ "0ba123cafe1a1d96f99268ada302c14367244f87" ], "author": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Fri Aug 12 19:39:02 2022 +0800" }, "committer": { "name": "Shuai Xue", "email": "xueshuai@linux.alibaba.com", "time": "Thu Aug 25 08:49:58 2022 +0800" }, "message": "einj_mem_uc: surround arch dependent code with target arch macros\n\neing_mem_uc injects Memory Uncorrectable non-fatal errors through APEI\nError INJection (EINJ) interface, which is arch independent. However,\neinj_mem_uc fails to compile due to arch dependent configuration checks.\n\nSimply surround target arch macros to avoid compile error so we could debug\nand test with this tool in both X86 and arm platforms.\n\nSigned-off-by: Shuai Xue \u003cxueshuai@linux.alibaba.com\u003e\n" }, { "commit": "0ba123cafe1a1d96f99268ada302c14367244f87", "tree": "dbe1b3815a08bf086c0c48936eef6f510eb247d8", "parents": [ "b936d417a8cc27e17ef018b645c931ecc4e94c6f" ], "author": { "name": "Adam Vaughn", "email": "avaughn@fb.com", "time": "Thu Aug 04 07:01:44 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Aug 04 07:01:44 2022 -0700" }, "message": "einj_mem_uc: Add \"-i\" flag to skip reporting of CMCI interrupts\n\nAMD systems don\u0027t use CMCI in the same way as Intel systems.\n\nAdd a flag to skip reporting of CMCI counts.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b936d417a8cc27e17ef018b645c931ecc4e94c6f", "tree": "03f70619f5504fe942116ca710ae7644d33968f0", "parents": [ "3ce2baf651389b55e93be986bc0da549a2496053" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jun 27 13:29:31 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jun 27 13:29:31 2022 -0700" }, "message": "ras-tools: Add count argument to rep_ce_page\n\nOptional argument to rep_ce_page for how many times to inject\na corrected error to the target page.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "3ce2baf651389b55e93be986bc0da549a2496053", "tree": "e53393bf29afcb751c7f8ef940f55348abacb7d0", "parents": [ "4fd699e132f4d4b743ac9980d43ddee649829c77" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jun 06 21:31:23 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jun 06 21:41:18 2022 -0700" }, "message": "ras-tools: New test \"rep_ce_page\"\n\nThis test injects and consumes corrected errors from a single page\nuntil either the page is taken offline (and replaced) by the OS, or\na limit of 30 tries is reached.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "4fd699e132f4d4b743ac9980d43ddee649829c77", "tree": "bfc67707fb96539febf313b9fcfcc50c3fad5dde", "parents": [ "596cddca9d4328d548ca6673ded2732b65665b57" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed May 11 09:14:05 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed May 11 09:14:05 2022 -0700" }, "message": "einj_mem_uc: Wait longer for patrol scrub CMCI\n\nIt may take up to 20 seconds for the patrol scrubber to restart\nand scan to the specific location where the error was injected.\n\nAdd a flag to indicate that the test should wait for much longer\nto check for patrol scrub CMCI.\n\nAlso change the message to print the actual delay in units of\nseconds, not microseconds (since the values are large enough\nthat this is a more human readable format).\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "596cddca9d4328d548ca6673ded2732b65665b57", "tree": "0cd6d8da26d397d0240f8a55901d2da034485e99", "parents": [ "6b9ba1649d053505a67db5bc70f00a8d390cb553" ], "author": { "name": "启瑞", "email": "qirui.001@bytedance.com", "time": "Mon Apr 25 10:17:37 2022 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Apr 25 09:17:35 2022 -0700" }, "message": "hornet: fix the missed page offine when ptrace detached\n\nWhen we detached the pftraced process, we miss out isolating the poisoned\npage. Adding a goto statement to make sure this.\n\nSigned-off-by: 启瑞 \u003cqirui.001@bytedance.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "6b9ba1649d053505a67db5bc70f00a8d390cb553", "tree": "2cacabc26c37fddd5ebf07714914fff9587c2163", "parents": [ "e8b04612190b5fd221e4985ba6a02742543b99b1" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 22 09:59:54 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Mar 23 08:20:29 2022 -0700" }, "message": "einj_mem_uc: Fix parsing of available_error_types\n\nCommit 38f47153c2c1 (\"Check the injected error type available before\nwrite error type\") didn\u0027t skip the extra text on the end of each line\nwhen checking whether a specific error type is supported.\n\nReported-by: Liu Xinpeng \u003cliuxp11@chinatelecom.cn\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "e8b04612190b5fd221e4985ba6a02742543b99b1", "tree": "b2b4c61cd6b88cb275f2ce5ed3964e17d940aad1", "parents": [ "38f47153c2c1679b72d1f1039ee27f636c466701" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Mar 21 09:47:54 2022 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Mar 21 09:47:54 2022 -0700" }, "message": "Add #include \u003cstring.h\u003e to proc_interrupt.c\n\nComplier is grousing about missing prototypes for strncmp()\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "38f47153c2c1679b72d1f1039ee27f636c466701", "tree": "7c4ebf4208eedf232d9bd0d9e889b705eab86936", "parents": [ "ba225f30fb762d3a6be5b5f29ad3e52af7b1d70a" ], "author": { "name": "Liu Xinpeng", "email": "liuxp11@chinatelecom.cn", "time": "Sun Mar 20 18:25:40 2022 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Mar 21 09:45:31 2022 -0700" }, "message": "Check the injected error type available before write error type\n\nbefore:\n0: llc vaddr \u003d 0x7fee6b865400 paddr \u003d f90e0eb400\n./einj_mem_uc: write error on \u0027/sys/kernel/debug/apei/einj/error_type\u0027\n\nafter:\n0: llc vaddr \u003d 0x7f86e6bac400 paddr \u003d f915477400\n./einj_mem_uc: no support for error type: 0x2\n\n[Tony: re-word error message]\n\nSigned-off-by: Liu Xinpeng \u003cliuxp11@chinatelecom.cn\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "ba225f30fb762d3a6be5b5f29ad3e52af7b1d70a", "tree": "dcba4caee9d396c30c2d7c1cecde2d3a2de8650a", "parents": [ "493bfdf5e667d39b9044e4885bb6b41ce1888d0a" ], "author": { "name": "Yizhan Xu", "email": "yizhan.xu@intel.com", "time": "Thu Jan 20 09:24:14 2022 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 20 09:26:37 2022 -0800" }, "message": "vtop: Fix check on number of arguments\n\nThe number of arguments must be three.\n\nSigned-off-by: Yizhan Xu \u003cyizhan.xu@intel.com\u003e\n" }, { "commit": "493bfdf5e667d39b9044e4885bb6b41ce1888d0a", "tree": "f1dde350059270860ee79032b74c1f8aa01075a1", "parents": [ "e9fe0cd3cbd3d80f776be4343b2f5baaa4c12f37" ], "author": { "name": "Zhongyu Gao", "email": "gzy@sangfor.com.cn", "time": "Mon Nov 29 10:58:47 2021 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Sun Nov 28 20:58:05 2021 -0800" }, "message": "einj_mem_uc: Fix vtop failed in \"instr\" test case\n\nAn error occurs during the execution of the einj_mem_uc \"instr\" test\nand exits. The error message shows that the instr memory page is not\nfound, and the einj_mem_uc exits. The detailed log is as follows:\n\n$ ./einj_mem_uc -c 10 -f instr\npage not present\n0: instr vaddr \u003d 0x403000 paddr \u003d ffffffffffffffff\n~/einj_mem_uc : write error on \u0027/sys/kernel/debug/apei/einj/error_inject\u0027\n\nTest Environment:\nOS Version:\nCentOS Linux release 7.9.2009 (Core)\nKernel Version:\n3.10.0-1160.el7.x86_64 #1 SMP Mon Oct 19 16:18:59 UTC 2020 x86_64\n\nSolution: Call the dosum function in instr_alloc to load the dosum\nmemory page in advance to prevent vtop conversion failure.\n\nSigned-off-by: Zhongyu Gao \u003cgzy@sangfor.com.cn\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "e9fe0cd3cbd3d80f776be4343b2f5baaa4c12f37", "tree": "56b6788f2b99781412e2299e94c2223727b0ea70", "parents": [ "65d692c5ce8e8fddfb2a610d3c5e5d1b44851606" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Nov 15 21:21:44 2021 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Nov 15 21:21:44 2021 -0800" }, "message": "einj_mem_uc: Patrol scrub might be SRAO or UCNA\n\nStarting with Icelake Xeon patrol scrub errors are signalled using\nCMCI with a UCNA signature instead of a machine check with an SRAO\nsignature.\n\nAdd a new flag \"F_EITHER\" to indicate that CMCI or MCE (but not both)\nis an acceptable response for the patrol scrub test.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "65d692c5ce8e8fddfb2a610d3c5e5d1b44851606", "tree": "3702ed4ae4850a70ecf4ad9f41ec031258d5b7f0", "parents": [ "06670d719a24f57d7a412aee6ce9a0a61eee4788" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jul 20 20:01:40 2021 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jul 20 20:01:40 2021 -0700" }, "message": "einj_mem_uc: Count Ice Lake Xeon as \"advanced RAS\"\n\nAll SKUs of Ice Lake Xeon support the memory recovery advanced\nRAS feature.\n\nJust check for the model number instead of looking for Platinum/Gold\nin the model name.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "06670d719a24f57d7a412aee6ce9a0a61eee4788", "tree": "b802a5261ca76ef9e1ea7acc35b915f2359609c3", "parents": [ "9696a1fa3b56440e4ce1cdd0c2e92e0fcd57ebfb" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Mar 25 13:03:44 2021 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Mar 25 13:03:44 2021 -0700" }, "message": "einj_mem_uc: Add a case for kernel accessing a poisoned futex(2) operand\n\n[Also changed flags for the copyin case to remove F_SIGBUS]\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "9696a1fa3b56440e4ce1cdd0c2e92e0fcd57ebfb", "tree": "f54af80103e50ff6ea8bb2547274246e30487f07", "parents": [ "b3436b420bab0e4513b906738a366aaa7e6a07d2" ], "author": { "name": "Aili Yao", "email": "yaoaili@kingsoft.com", "time": "Tue Feb 23 08:17:19 2021 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 23 08:17:19 2021 -0800" }, "message": "einj_mem_uc: Fix typos in trigger_copyin\n\n1.In if check, ret should be compared to memcpy_size;\n2.In else branch, correct the fprintf parameter order.\n\nSigned-off-by: Aili Yao \u003cyaoaili@kingsoft.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b3436b420bab0e4513b906738a366aaa7e6a07d2", "tree": "a6a3456e779f8d6998d053dc43b4f987e16af987", "parents": [ "0dc0477ce4da329ef86f43a1d1bd08a6636c8c3a" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 29 13:32:14 2021 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 29 13:32:14 2021 -0800" }, "message": "einj_mem_uc: Add \"-S\" flag for MADV_HWPOISON page offline\n\nInstead of using ACPI/EINJ to inject a real error, use madvise(2)\nto simulate poison on a page. Note that this only has any effect for\ntests that use inject_uc() for injection ... and doesn\u0027t really match\nthe behavior with a real injection.\n\n[Idea to use MADV_HWPOISON from Aili Yao \u003cyaoaili@kingsoft.com\u003e]\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "0dc0477ce4da329ef86f43a1d1bd08a6636c8c3a", "tree": "00dabdf1baed39b5ceafd24f6f41919f7080ae1b", "parents": [ "44d5b35b4129115a9a5d6d02011daf438cec815d" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 29 12:39:41 2021 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 29 12:39:41 2021 -0800" }, "message": "Add .gitignore file\n\nFor \".o\" files and executables\n" }, { "commit": "44d5b35b4129115a9a5d6d02011daf438cec815d", "tree": "8d4a6f0c8882daa15d7df859374289fc36e0f713", "parents": [ "c7ad657475ea3d09d096ed6cd5f6b63e6ef3b6ec" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Dec 09 16:58:42 2020 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Dec 09 16:58:42 2020 -0800" }, "message": "mca-recover: Make sure we consume poison at right point in code\n\nIt seems that modern compilers have become smart enough to not just\nblindly read from \"buf\" at the point where the C code says \"i \u003d buf[0];\"\n\nThrow in a function call, and a volatile cast, to make sure the consumption\nhappens at the right point in code flow.\n\n[Also fix one duplicated \"0x\" on output, and one missing \"0x\"]\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "c7ad657475ea3d09d096ed6cd5f6b63e6ef3b6ec", "tree": "e7296e51314697e0c45065c59247f4f50f983ac5", "parents": [ "a4e0b6bd25871482e26b2e2eb8ff5a0e11d16134" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Oct 26 08:05:48 2020 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Oct 26 08:05:48 2020 -0700" }, "message": "vtop: Multiply by \"pagesize\" instead of hardcode shift by 12\n\nWhen convering a page frame number to an address there is a hard-coded\nshift by 12 but the mask for the low order bits is computed based on\nthe \"pagesize\" variable.\n\nFix this inconsistency by swapping out the shift for a multiply.\n\nReported-by: 葛士建 \u003cgeshijian@bytedance.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "a4e0b6bd25871482e26b2e2eb8ff5a0e11d16134", "tree": "a8bcb8860a8c0882ddec958c66351da8050b612b", "parents": [ "6b0a86d66540ebee5d15164e98b9f2160f7adf54" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Sep 03 15:33:20 2020 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Sep 03 15:37:50 2020 -0700" }, "message": "einj_mem_uc: Fix file descriptor leak for copyin test\n\nThe copyin test fails at just over 1000 iterations because it can no\nlonger open new file descriptors.\n\nThe problem is that the test opens a file, and closes at the end of\nthe function. But since successful recover sends a SIGBUS, the close\nis never executed.\n\nMake the file descriptor global and close it in the main() function\nafter the normal or SIGBUS return paths.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "6b0a86d66540ebee5d15164e98b9f2160f7adf54", "tree": "cb5db55cdc57d75c522ed4b0be40ec5f6ca428d7", "parents": [ "d1f9fd9b0f4a7909ba829904a495d7fec13b2f4e" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Aug 24 09:59:01 2020 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Aug 24 09:59:01 2020 -0700" }, "message": "einj_mem_uc: Apply runup/size parameters from \"-m\" argument to copyin test\n\nIn order to force different code paths in the kernel, allow user to\nadjust start/size of kernel copy so that the poison is consumed at\ndifferent points in the copy.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "d1f9fd9b0f4a7909ba829904a495d7fec13b2f4e", "tree": "b3fd5d6dec224692701f401dc442d1616ccba422", "parents": [ "560257780df11ed1d227da87bf979e93d04c4374" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Aug 04 17:51:01 2020 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Aug 04 17:51:01 2020 -0700" }, "message": "einj_mem_uc: Copyout test gets SIGSEGV\n\nBug in the code. The page_cache_alloc() function uses a local \"FILE *pcfile\"\ninstead of the global one. Result is that the trigger step gets a NULL\ndereference accessing the global pcfile.\n\nReported-by: Youquan Song \u003cyouquan.song@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "560257780df11ed1d227da87bf979e93d04c4374", "tree": "31c996cd411a0773bd4899e5223fb325f949238c", "parents": [ "b17c27b2c21da9dc472594376e1f7c430d5364da" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jul 27 09:49:55 2020 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jul 27 09:49:55 2020 -0700" }, "message": "einj_mem_uc: Print errno or byte count for unsuccessful write\n\nIf the write fails then print out the system error code. If it\npartially fails, print how many bytes were written.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b17c27b2c21da9dc472594376e1f7c430d5364da", "tree": "52a96e291cf18ea2dde2078d62d304e9644cf906", "parents": [ "a850a9da964ae23541f5a1d3f117fe43856a8933" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Jun 17 10:45:12 2020 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Jun 17 10:45:12 2020 -0700" }, "message": "einj_mem_uc: new test case for copyout\n\nCreate a file and write a page of data to it. Map that file and\nuse an address in the mapped range to inject an error.\n\nTrigger the error by issing a read(2) system call which will\nmake the kernel copy from the page cache copy of the data (which\nhas been injected with a UC error).\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "a850a9da964ae23541f5a1d3f117fe43856a8933", "tree": "959473bc09f538379983036c941a8f625f6817e3", "parents": [ "8be7d2c31ba1514dce4f28ee886fe7719156fbc3" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jun 02 09:50:24 2020 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jun 02 09:54:43 2020 -0700" }, "message": "einj_mem_uc: Add explicit \"Test passed/failed\" messages and exit status\n\nValidation teams using this test would find it easier to build into\na test script if it reported success/fail both with a message, and\nby exit code.\n\nReported-by: Jun J Li \u003cjun.j.li@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "8be7d2c31ba1514dce4f28ee886fe7719156fbc3", "tree": "37ad0fe7af3217bbb5f6f88f305974e3e21eac45", "parents": [ "6af85d126d3193193de97e52f4166b5cedb4ee57" ], "author": { "name": "Jin Wen", "email": "wenx.jin@intel.com", "time": "Wed Oct 31 17:43:06 2018 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Nov 12 13:52:12 2018 -0800" }, "message": "Add new test program to validate LMCE feature\n\nDesign different cases to validate LMCE feature:\n1. multi thread run on same or different cores;\n2. inject memory error into one same address or two different addresses;\n3. trigger IFU or DCU error individually.\n\nNote that injecting errors on the same core will likely result\nin undefined behavior as logical processors sharing a core also\nshare machine check banks that log recoverable machine checks.\n\nSigned-off-by: Jin Wen \u003cwenx.jin@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "6af85d126d3193193de97e52f4166b5cedb4ee57", "tree": "8a3b6cbe0c6ed0909918412ffd9e9ad981716723", "parents": [ "2c2218baced104f89db8f244a9cfe8b3ff63ecec" ], "author": { "name": "Jin Wen", "email": "wenx.jin@intel.com", "time": "Wed Mar 14 14:49:42 2018 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Mar 14 14:55:33 2018 -0700" }, "message": "hornet: Fix some issues with addition of ptrace support\n\n1) Fix check_ptrace macro to stringify the \"req\" argument in error message\n2) Set lo \u0026 hi so that pickaddr() will print reasonable range with \"-v\"\n3) Replace NULL with empty string in verbose print\n4) Remove unused \"pagesize\" variable.\n\nSigned-off-by: Jin Wen \u003cwenx.jin@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "2c2218baced104f89db8f244a9cfe8b3ff63ecec", "tree": "f9a08d68b185aac1983eb351f9d17095a8c371b4", "parents": [ "68301496e8ef826c3061279d70be832b4d8d7266" ], "author": { "name": "Jin Wen", "email": "wenx.jin@intel.com", "time": "Tue Mar 13 14:52:02 2018 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 13 14:52:02 2018 -0700" }, "message": "hornet: Add \"-P pid\" flag to stop process using ptrace\n\nPicking instruction addresses inside running processes is rather\nhit or miss. We may pick an address for injection that is never\nexecuted.\n\nUsing ptrace(2) to stop the process we can find the precise address\nof the next instruction to be executed and thus guarantee that we\nwill immediately hit the injected address when we resume running the\nprocess.\n\nSigned-off-by: Jin Wen \u003cwenx.jin@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "68301496e8ef826c3061279d70be832b4d8d7266", "tree": "58b2ab65361438f45f900c887a4b32254a1b0343", "parents": [ "d9c4582d24ae259009da7e0321c5a06b80386e23" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Dec 13 15:02:49 2017 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Dec 13 15:02:49 2017 -0800" }, "message": "Add \"Gold\" to list of strings to check to see if platform supports error recovery\n\nBoth Platinum and Gold Skylake SKUs support advanced RAS recovery features\n\nReported-by: Youquan Song\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "d9c4582d24ae259009da7e0321c5a06b80386e23", "tree": "5119ba22c3725bdc8aeaf30130950d88f8c42080", "parents": [ "7e0703b76e9c8c5b8d161850290b4ebab89cda3a" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Aug 15 17:10:29 2017 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Aug 15 17:10:29 2017 -0700" }, "message": "einj_mem_uc: Update check for cpu models that can recover\n\nSkylake (Xeon-SP) doesn\u0027t use the \"E7-\" model name convention.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "7e0703b76e9c8c5b8d161850290b4ebab89cda3a", "tree": "4b5711c65582a3f69ca6d7cdefa5c8bb3652714a", "parents": [ "35ddfe7955e05cc305e6a90ec3ff2fcb5a7061db" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Jul 26 11:02:34 2017 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Jul 26 11:02:34 2017 -0700" }, "message": "einj_mem_uc: Add test case to mlock(2) the target page.\n" }, { "commit": "35ddfe7955e05cc305e6a90ec3ff2fcb5a7061db", "tree": "9db3102289e9b141865856778d4360ac4c1ad150", "parents": [ "7dfb3f58e11c9f25dd72263c81f304ed4279fed6" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon May 01 13:50:04 2017 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon May 01 13:50:04 2017 -0700" }, "message": "Fixup mca-recover\n\nI\u0027d messed with this to do something with repeated recoveries. But\nthat doesn\u0027t match with the use case that we\u0027ve been explaining to\npeople.\n\nGo back to just one recovery.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "7dfb3f58e11c9f25dd72263c81f304ed4279fed6", "tree": "a5298b2d9f26e3ba3971bf7d7256b37156966cbb", "parents": [ "0be8f43bb0745c93046e73533c4c9187b8dc9e9b" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Aug 18 14:10:13 2016 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Aug 18 14:34:45 2016 -0700" }, "message": "Add extra \"-m\" argument to provide options for memcpy test\n" }, { "commit": "0be8f43bb0745c93046e73533c4c9187b8dc9e9b", "tree": "56745e6b7fa981a2309c3f1a62c89b45abcbca71", "parents": [ "767456f1cf0d32d7f25753c84413517c89455980" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 17 13:51:03 2016 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 01 09:06:32 2016 -0800" }, "message": "Add \"llc\" option to inject processor uncorrected non-fatal and trigger LLC writeback\n" }, { "commit": "767456f1cf0d32d7f25753c84413517c89455980", "tree": "4acb7d3346727642665d544cab9558137997c368", "parents": [ "14ce72b257788f253fec6d99843c2d3cd94937aa" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Sat Jan 16 15:06:09 2016 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Sat Jan 16 15:06:09 2016 -0800" }, "message": "Don\u0027t wait for a fixed interval for CMCIs to be counted\n\nInstead of hard coding a fixed large time to sleep before checking how\nmany CMCIs were logged, just sleep in 100us increments until we see at least\nthe expected number. Give up waiting after 1000 such rechecks. If we blocked\nfor any more than 100us, then report the actual time.\n\nOriginal patch by Carl Sapp. Modified to use gettimeofday() to report actual delay.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "14ce72b257788f253fec6d99843c2d3cd94937aa", "tree": "1bcbc3f6fedb0b5dbb1b3b14b9f13ff0ead52949", "parents": [ "eaaee880f997485d13ff56dde995d940e713fcb0" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jan 12 11:13:18 2016 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jan 12 11:13:18 2016 -0800" }, "message": "Increase delay before re-reading /proc/interrupts. 1ms wasn\u0027t enough\nfor all cpus to wake from C6. Bump to 10ms.\n\nReported-by: Carl Sapp\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "eaaee880f997485d13ff56dde995d940e713fcb0", "tree": "9342c175828b024bfa0df379a6af1b2a7fe48efa", "parents": [ "73ad3885126b2e15d757594d6c693d9b9ac37b36" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Dec 31 09:20:31 2015 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Dec 31 09:20:31 2015 -0800" }, "message": "Add some new error testing toys:\n\ncmcistorm - inject a bunch of corrected errors, then trigger them all quickly\n\nhornet - inject a UC memory error into some other process\n\neinj_mem_uc - inject a UC error and then trigger it in one of a variety of ways.\n" }, { "commit": "73ad3885126b2e15d757594d6c693d9b9ac37b36", "tree": "7994e75497dff8faee2d2738fca84b2ee581c00d", "parents": [ "de00752da7c655798bc87d0a4f52af236829c55d" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 18 09:41:25 2014 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 18 09:41:25 2014 -0700" }, "message": "Add vtop.c - for finding physical address in arbitrary process.\n" }, { "commit": "de00752da7c655798bc87d0a4f52af236829c55d", "tree": "46744640573f05dcfe842f0f31624bd2f1260705", "parents": [], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 11 09:34:13 2014 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 11 09:34:13 2014 -0700" }, "message": "Add example recovery application\n\nThis is pretty trivial - just shows how to setup a SIGBUS handler\nfor recoverable machine checks. Injection of the actual error is\nhandled externally (e.g. using EINJ).\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" } ] }