tree 22b224858032310c96c3a3cb78d1b8e125143566
parent 63f295940d1afd88ec6704a3d50a6e87a8a1c45f
author Michael Walle <michael@walle.cc> 1651531283 +0200
committer Claudiu Beznea <claudiu.beznea@microchip.com> 1652449331 +0300

ARM: dts: lan966x: add MIIM nodes

Add the MDIO controller nodes. The integrated PHYs are connected to the
second controller. This controller also takes care of the resets of the
integrated PHYs, thus it has two memory regions. The first controller
is routed to the external MDIO/MDC pins.

By default, they are disabled.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-10-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>