blob: a4837985b7a7dc399be9ce3729aa15e4caccbc76 [file] [log] [blame]
/*
* Copyright (c) 2015 MediaTek Inc.
* Author: Erin Lo <erin.lo@mediatek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "mt2701.dtsi"
/ {
model = "MediaTek MT2701 evaluation board";
compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
memory {
reg = <0 0x80000000 0 0x40000000>;
};
};
&auxadc {
status = "okay";
};
&pio {
spi_pins_a: spi0@0 {
pins_spi {
pinmux = <MT2701_PIN_53_SPI0_CSN__FUNC_SPI0_CS>,
<MT2701_PIN_54_SPI0_CK__FUNC_SPI0_CK>,
<MT2701_PIN_55_SPI0_MI__FUNC_SPI0_MI>,
<MT2701_PIN_56_SPI0_MO__FUNC_SPI0_MO>;
bias-disable;
};
};
spi_pins_b: spi1@0 {
pins_spi {
pinmux = <MT2701_PIN_7_SPI1_CSN__FUNC_SPI1_CS>,
<MT2701_PIN_8_SPI1_MI__FUNC_SPI1_MI>,
<MT2701_PIN_9_SPI1_MO__FUNC_SPI1_MO>,
<MT2701_PIN_199_SPI1_CLK__FUNC_SPI1_CK>;
bias-disable;
};
};
spi_pins_c: spi2@0 {
pins_spi {
pinmux = <MT2701_PIN_101_SPI2_CSN__FUNC_SPI2_CS>,
<MT2701_PIN_102_SPI2_MI__FUNC_SPI2_MI>,
<MT2701_PIN_103_SPI2_MO__FUNC_SPI2_MO>,
<MT2701_PIN_104_SPI2_CLK__FUNC_SPI2_CK>;
bias-disable;
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_pins_a>;
status = "disabled";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi_pins_b>;
status = "disabled";
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi_pins_c>;
status = "disabled";
};
&uart0 {
status = "okay";
};