)]}'
{
  "commit": "d8633c1da161de7e0b880d919d305a97c01372f4",
  "tree": "39848e1f3c3b155e214e819faafe30ff4185149b",
  "parents": [
    "8088041ee35604640760321621e3f058ea2c7061"
  ],
  "author": {
    "name": "Joonyoung Shim",
    "email": "jy0922.shim@samsung.com",
    "time": "Fri Nov 04 10:39:34 2011 +0900"
  },
  "committer": {
    "name": "Kukjin Kim",
    "email": "kgene.kim@samsung.com",
    "time": "Sun Nov 06 13:53:01 2011 +0900"
  },
  "message": "ARM: SAMSUNG: Add clk enable/disable of pwm\n\nPWM timers use pclk(\"timers\" clk) as parent clk. If this pclk is the\ndisabled state when PWM driver is probed, then it causes wrong read and\nwrite operation about registers of PWM.\n\nSigned-off-by: Joonyoung Shim \u003cjy0922.shim@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Kukjin Kim \u003ckgene.kim@samsung.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f37457c52064f77b5e58139a2eb0008f695d905c",
      "old_mode": 33188,
      "old_path": "arch/arm/plat-samsung/pwm.c",
      "new_id": "dc1185dcf80d559757d289f4490723888786c2fa",
      "new_mode": 33188,
      "new_path": "arch/arm/plat-samsung/pwm.c"
    }
  ]
}