tree 20909774cb59e4ddd4bb800a6db7ef9301778fa8
parent 98a11c09843fc1e36e3fb0ffca5e65e1c85c725c
author Mark Brown <broonie@kernel.org> 1660752053 +0100
committer Mark Brown <broonie@kernel.org> 1660841079 +0100
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arm64/cache: Fix cache_type_cwg() for register generation

Ard noticed that since we converted CTR_EL0 to automatic generation we have
been seeing errors on some systems handling the value of cache_type_cwg()
such as

   CPU features: No Cache Writeback Granule information, assuming 128

This is because the manual definition of CTR_EL0_CWG_MASK was done without
a shift while our convention is to define the mask after shifting. This
means that the user in cache_type_cwg() was broken as it was written for
the manually written shift then mask. Fix this by converting to use
SYS_FIELD_GET().

The only other field where the _MASK for this register is used is IminLine
which is at offset 0 so unaffected.

Fixes: 9a3634d02301 ("arm64/sysreg: Convert CTR_EL0 to automatic generation")
Reported-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>