From 38e5fead234428038054ada949a75bea46aeef99 Mon Sep 17 00:00:00 2001
From: Mark Brown <>
Date: Tue, 11 May 2021 17:04:43 +0100
Subject: [PATCH v2 0/3] arm64/sve: Trivial optimisation for 128 bit SVE vectors

This series is a combination of factoring out some duplicated code and a
very minor optimisation to the performance of handling converting FPSIMD
state to SVE in the live registers for 128 bit SVE vectors.

 - Combine P and FFR flushing into a single macro.

Mark Brown (3):
  arm64/sve: Split _sve_flush macro into separate Z and predicate
  arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state()
  arm64/sve: Skip flushing Z registers with 128 bit vectors

 arch/arm64/include/asm/fpsimd.h       |  2 +-
 arch/arm64/include/asm/fpsimdmacros.h |  4 +++-
 arch/arm64/kernel/entry-fpsimd.S      | 19 ++++++++++++-------
 arch/arm64/kernel/fpsimd.c            |  6 ++++--
 4 files changed, 20 insertions(+), 11 deletions(-)

base-commit: 6efb943b8616ec53a5e444193dccf1af9ad627b5
arm64/sve: Skip flushing Z registers with 128 bit vectors

When the SVE vector length is 128 bits then there are no bits in the Z
registers which are not shared with the V registers so we can skip them
when zeroing state not shared with FPSIMD, this results in a minor
performance improvement.

Signed-off-by: Mark Brown <>
3 files changed