)]}' { "log": [ { "commit": "d34a818a331f7e270fa9dc3db3d96f6a0d4fa7ab", "tree": "d629e0f545b82ad68b7b9a5e81c872c33eb8550c", "parents": [ "86331b76b32d7a83fb3e64641a5111746bf0f50c" ], "author": { "name": "Srinivas Kandagatla", "email": "srinivas.kandagatla@oss.qualcomm.com", "time": "Tue Oct 20 08:38:53 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 21:10:37 2026 +0000" }, "message": "ASoC: SDCA: re-enable IRQ on pm_runtime_force_suspend failure\n\nThe SoundWire IRQ was disabled before pm_runtime_force_suspend() but\nnever re-enabled when the force suspend failed, leaving the codec\nunable to receive interrupts.\n\nFixes: 2d877d0659cb (\"ASoC: SDCA: Add basic SDCA class driver\")\nCc: stable@vger.kernel.org\nReviewed-by: Charles Keepax \u003cckeepax@opensource.cirrus.com\u003e\nAssisted-by: LLM\nSigned-off-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261020073856.1177749-4-srinivas.kandagatla@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "86331b76b32d7a83fb3e64641a5111746bf0f50c", "tree": "39648828ba49e586b7908256ee3f32f8b92e2b2f", "parents": [ "79cfb5aebbf0417418c2ac25669fade7f3e58ef2" ], "author": { "name": "Srinivas Kandagatla", "email": "srinivas.kandagatla@oss.qualcomm.com", "time": "Tue Oct 20 08:38:52 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 21:10:37 2026 +0000" }, "message": "ASoC: SDCA: drop pm_runtime reference on probe failure path\n\nsdca_class_probe() takes an extra usage count with\npm_runtime_get_noresume() to keep the device powered on until the\ndeferred boot work has run. If devm_pm_runtime_enable() then fails,\nthat reference is never dropped.\n\nDrop it on the error path.\n\nFixes: 2d877d0659cb (\"ASoC: SDCA: Add basic SDCA class driver\")\nCc: stable@vger.kernel.org\nAssisted-by: LLM\nSigned-off-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nReviewed-by: Charles Keepax \u003cckeepax@opensource.cirrus.com\u003e\nLink: https://patch.msgid.link/20261020073856.1177749-3-srinivas.kandagatla@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "79cfb5aebbf0417418c2ac25669fade7f3e58ef2", "tree": "993a7373fbeb672e7a1bfa3f09d06cdd6860bf74", "parents": [ "60aa5abdc9997f0f4d3ab766d8a4af79ce8e400e" ], "author": { "name": "Srinivas Kandagatla", "email": "srinivas.kandagatla@oss.qualcomm.com", "time": "Tue Oct 20 08:38:51 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 21:10:37 2026 +0000" }, "message": "ASoC: SDCA: propagate sdw_slave_read_prop() failure in class_read_prop\n\nsdw_slave_read_prop() can fail with -ENOMEM; propagate the return\ninstead of leaving slave-\u003eprop partially initialised.\n\nFixes: 2d877d0659cb (\"ASoC: SDCA: Add basic SDCA class driver\")\nCc: stable@vger.kernel.org\nReviewed-by: Charles Keepax \u003cckeepax@opensource.cirrus.com\u003e\nAssisted-by: LLM\nSigned-off-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261020073856.1177749-2-srinivas.kandagatla@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "60aa5abdc9997f0f4d3ab766d8a4af79ce8e400e", "tree": "17baf2a484d63a5e847a9b2deca4cdd805f9f7ba", "parents": [ "c80f86ed857e21dcdd389559d3e62bf53ff39f9a", "29b867d8351de378704775d3733bfb589c48ab1f" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:19:23 2026 +0000" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:19:23 2026 +0000" }, "message": "ASoC: codecs: es*: controls that write each other\u0027s bits\n\nZhang Yi \u003czhangyi@everest-semi.com\u003e says:\n\nBoth the Kcontrols for the ES8326 and ES8375 have an issue where they write to other bits.\nThis patch will fix that issue.\n\nLink: https://patch.msgid.link/20261026054837.13618-1-zhangyi@everest-semi.com\n" }, { "commit": "29b867d8351de378704775d3733bfb589c48ab1f", "tree": "57a6670703e53ea267a306a0562e62ce19237f9f", "parents": [ "dd64271fe1b935252cf454a72a558cbdb7be57c5" ], "author": { "name": "Zhang Yi", "email": "zhangyi@everest-semi.com", "time": "Mon Oct 26 13:48:37 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:19:23 2026 +0000" }, "message": "ASoC: codecs: es*: Modify the maximum value of DMIC_GAIN\n\nThe Kcontrol related to DMIC_GAIN affects bits[3:2].\nHowever, the old code sets ES8375_DMIC_GAIN_MAX to 4, which causes the Kcontrol to\naffect bits [4:2],this is incorrect. Therefore, change ES8375_DMIC_GAIN_MAX to 3.\n\nFixes: de2b3119f9f7 (\"ASoC: codecs: add support for ES8375\")\nReviewed-by: HyeongJun An \u003csammiee5311@gmail.com\u003e\nSigned-off-by: Zhang Yi \u003czhangyi@everest-semi.com\u003e\nLink: https://patch.msgid.link/20261026054837.13618-3-zhangyi@everest-semi.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "dd64271fe1b935252cf454a72a558cbdb7be57c5", "tree": "4a62ac0e90f913097687c86d74c7d0374930e5b0", "parents": [ "bcb2efda7abf56f212133044f135d88f68796fff" ], "author": { "name": "Zhang Yi", "email": "zhangyi@everest-semi.com", "time": "Mon Oct 26 13:48:36 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:19:23 2026 +0000" }, "message": "ASoC: codecs: es*: Modify the registers related to ALC RECOVERY\n\nThe register related to \"ALC Capture Recovery Level\" is ES8326_ALC_RECOVERY,\nnot ES8326_ALC_LEVEL.\n\nFixes: 5c439937775d (\"ASoC: codecs: add support for ES8326\")\nReviewed-by: HyeongJun An \u003csammiee5311@gmail.com\u003e\nSigned-off-by: Zhang Yi \u003czhangyi@everest-semi.com\u003e\nLink: https://patch.msgid.link/20261026054837.13618-2-zhangyi@everest-semi.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "c80f86ed857e21dcdd389559d3e62bf53ff39f9a", "tree": "851fd3a4acece35ba5fd99ff903fcc65df7fcd9c", "parents": [ "6ecbbd8bba209c111aa635ecd8bc95f42ff36d7a" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Thu Oct 22 11:09:22 2026 +0200" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:17:45 2026 +0000" }, "message": "ASoC: codecs: wsa881x: Fix shared powerdown GPIO handling\n\nOn Qualcomm RB5 both WSA8815 speaker amplifiers share a single powerdown\nGPIO (TLMM 130), which is handled by the shared GPIO proxy. Since commit\nb30973e8c392 (\"gpio: shared: make the voting mechanism adaptable\") the\nproxy treats the value set by the first user on request as the default\nand lets any single user vote for the opposite value.\n\nThe driver requests the GPIO de-asserted (GPIOD_OUT_LOW), so powering the\namplifier up became the default and asserting powerdown became the\nwinning vote. Once both amplifiers are runtime suspended, resuming them\ndeadlocks: the first one releases its powerdown vote and waits for\nSoundWire enumeration, but the line stays asserted, because the second\namplifier is still suspended and votes for powerdown. The wait times out\nand playback fails:\n\n wsa881x-codec sdw:1:0:0217:2110:00:3: Initialization not complete\n wsa881x-codec sdw:1:0:0217:2110:00:3: ASoC error (-110): at snd_soc_pcm_component_pm_runtime_get() on sdw:1:0:0217:2110:00:3\n\nRequest the GPIO asserted, so that powerdown is the default state and\nthe line is de-asserted as long as any amplifier needs to be powered,\nthen de-assert it to power up the amplifier as before.\n\nAlso use gpiod_set_value_cansleep() instead of gpiod_direction_output()\nin the runtime PM callbacks. The line is already configured as an output\nand the proxy resets its default value when the direction is set while\nit has only a single user, which can happen if the other amplifiers have\nnot been probed yet.\n\nFixes: bfa336cee332 (\"ASoC: wsa881x: Move custom workaround to gpiolib-of\")\nFixes: b30973e8c392 (\"gpio: shared: make the voting mechanism adaptable\")\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nLink: https://patch.msgid.link/20261022090923.769464-1-m.szyprowski@samsung.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "6ecbbd8bba209c111aa635ecd8bc95f42ff36d7a", "tree": "630cdbfc45b80d6e9e9ace21a2e10211d3c8ad77", "parents": [ "e163f6f079e1e39234db5fe942b4e5e62b05bd84", "6d7dbcb5f8e41ba63e1fefad902d1d5f51a3980b" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:15:35 2026 +0000" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:15:35 2026 +0000" }, "message": "ASoC: es9356-sdca: Modify the initialization and headphone-related settings\n\nZhang Yi \u003czhangyi@everest-semi.com\u003e says:\n\nTo support different versions of the ES9356, the code reads the chip version\nand performs different initialization configurations based on the version number.\nTo improve button performance, we\u0027ve adjusted the timing and settings related to the headphones.\n\nLink: https://patch.msgid.link/20261026064251.15017-1-zhangyi@everest-semi.com\n" }, { "commit": "6d7dbcb5f8e41ba63e1fefad902d1d5f51a3980b", "tree": "34d75d022c00988ddf2c9695b29d102d57ee4ab4", "parents": [ "ddc9472baf11727144a78bf5ad81ca596baf5d7c" ], "author": { "name": "Zhang Yi", "email": "zhangyi@everest-semi.com", "time": "Mon Oct 26 14:42:51 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:15:34 2026 +0000" }, "message": "ASoC: es9356-sdca: Modify the Initialization Configuration\n\nRead the chip version number and modify the initialization configuration\n\nSigned-off-by: Zhang Yi \u003czhangyi@everest-semi.com\u003e\nLink: https://patch.msgid.link/20261026064251.15017-4-zhangyi@everest-semi.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "ddc9472baf11727144a78bf5ad81ca596baf5d7c", "tree": "b9c079964afaafaa311c3f2f26f7e253734d7a1b", "parents": [ "5532cec202507a3e3460bf12deafa0688009dab7" ], "author": { "name": "Zhang Yi", "email": "zhangyi@everest-semi.com", "time": "Mon Oct 26 14:42:50 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:15:34 2026 +0000" }, "message": "ASoC: es9356-sdca: Add writeable_reg\n\nSet ES9356_VERSION and the HID-related registers to read-only.\n\nSigned-off-by: Zhang Yi \u003czhangyi@everest-semi.com\u003e\nLink: https://patch.msgid.link/20261026064251.15017-3-zhangyi@everest-semi.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "5532cec202507a3e3460bf12deafa0688009dab7", "tree": "b4df3cc933c8f0f62a94454d8c935661dd500695", "parents": [ "ea83a1103b18ec094f9c99fcfff81e0033d53586" ], "author": { "name": "Zhang Yi", "email": "zhangyi@everest-semi.com", "time": "Mon Oct 26 14:42:49 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:15:34 2026 +0000" }, "message": "ASoC: es9356-sdca: Modify the timing and configuration of headphone events\n\nChange the time it takes to create a workqueue from 280 ms to 50 ms to\nensure faster response to button presses.\nModify the settings related to buttons after plugging in the headset\nto ensure more accurate button type recognition.\n\nSigned-off-by: Zhang Yi \u003czhangyi@everest-semi.com\u003e\nLink: https://patch.msgid.link/20261026064251.15017-2-zhangyi@everest-semi.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "e163f6f079e1e39234db5fe942b4e5e62b05bd84", "tree": "025d9f9ba61a4754e53a8eebeca5f504234299a8", "parents": [ "8d678dce151838ecb8251ce9cf0e29f7e13c866d", "9728b328d7adf228d5f691d0ec43bb7a6d07e44b" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:04:23 2026 +0000" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:04:23 2026 +0000" }, "message": "ASoC: qcom: AudioReach and WSA88xx fixes\n\nSrinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e says:\n\nFixes found while bringing up speaker protection on the Lenovo ThinkPad\nT14s Gen 7 (Snapdragon X2 Elite) with WSA8845 speakers.\n\n - AudioReach: the module cfg blob size was used as an element count,\n so the allocation and copy were four times too large.\n - WSA88xx: speaker temperatures above 45 degC were rejected, runtime\n PM was left enabled on unbind (NULL dereference on wsa884x), and\n the VI sense port carried only half of the V/I pair.\n\nTool use: an LLM coding assistant (Claude Code with Claude Opus) was\nused for some of the patches in this series, to debug the issues during\nbring-up and to draft the code and commit messages.\n\nLink: https://patch.msgid.link/20261023171316.819857-1-srinivas.kandagatla@oss.qualcomm.com\n" }, { "commit": "9728b328d7adf228d5f691d0ec43bb7a6d07e44b", "tree": "d9be7f60299f2f8a61b86dad73b9c642198c1c62", "parents": [ "a6093f98cbfc4a717ef3d1048b0e38fb2035be98" ], "author": { "name": "Ravi Hothi", "email": "ravi.hothi@oss.qualcomm.com", "time": "Fri Oct 23 18:13:16 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:04:23 2026 +0000" }, "message": "ASoC: codecs: wsa883x: Fix VI sense port channel count\n\nThe VI sense port carries both the voltage and the current sense data\nof the speaker, but it is described with max_ch \u003d 1 and, since commit\ned3b274abc40 (\"ASoC: codecs: wsa883x: Correct VI sense channel mask\"),\na channel mask of 0x1, so only half of the V/I pair is transferred.\n\nDescribe the port as two channels and set the channel mask back to 0x3.\n\nFixes: ed3b274abc40 (\"ASoC: codecs: wsa883x: Correct VI sense channel mask\")\nCc: Krzysztof Kozlowski \u003ckrzk@kernel.org\u003e\nSigned-off-by: Ravi Hothi \u003cravi.hothi@oss.qualcomm.com\u003e\nSigned-off-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261023171316.819857-8-srinivas.kandagatla@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "a6093f98cbfc4a717ef3d1048b0e38fb2035be98", "tree": "e6341708ead6b1a6573cbbc53427e1e7ca5b6d42", "parents": [ "ea63182d71956dc33c6f08dc4171f1052f8409a9" ], "author": { "name": "Ravi Hothi", "email": "ravi.hothi@oss.qualcomm.com", "time": "Fri Oct 23 18:13:15 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:04:23 2026 +0000" }, "message": "ASoC: codecs: wsa884x: Fix VI sense port channel count\n\nThe VI sense port carries both the voltage and the current sense data\nof the speaker, but it is described with max_ch \u003d 1 and, since commit\n060fac202eb8 (\"ASoC: codecs: wsa884x: Correct VI sense channel mask\"),\na channel mask of 0x1, so only half of the V/I pair is transferred.\n\nDescribe the port as two channels and set the channel mask back to 0x3.\n\nFixes: 060fac202eb8 (\"ASoC: codecs: wsa884x: Correct VI sense channel mask\")\nCc: Krzysztof Kozlowski \u003ckrzk@kernel.org\u003e\nSigned-off-by: Ravi Hothi \u003cravi.hothi@oss.qualcomm.com\u003e\nSigned-off-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261023171316.819857-7-srinivas.kandagatla@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "ea63182d71956dc33c6f08dc4171f1052f8409a9", "tree": "6557eaccccfd72822bb317f5641d6050e834e4c4", "parents": [ "54c121eaeed8ee7751935db8100b6b5c57124db9" ], "author": { "name": "Srinivas Kandagatla", "email": "srinivas.kandagatla@oss.qualcomm.com", "time": "Fri Oct 23 18:13:14 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:04:23 2026 +0000" }, "message": "ASoC: codecs: wsa883x: disable runtime PM on unbind\n\nProbe enables runtime PM but nothing disables it on unbind, or when\nregistering the component fails. A pending autosuspend can then run\nwsa883x_runtime_suspend() after the devm-managed regmap is freed, and\ndereference NULL, as seen on wsa884x.\n\nUse devm_pm_runtime_enable() so runtime PM is disabled before the regmap\nis freed.\n\nFixes: 43b8c7dc85a1 (\"ASoC: codecs: add wsa883x amplifier support\")\nSigned-off-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261023171316.819857-6-srinivas.kandagatla@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "54c121eaeed8ee7751935db8100b6b5c57124db9", "tree": "7d3eeb48d1e5b5bc98097596b60a18d770073336", "parents": [ "6a55cf0d9dd2e2493a5030a4f7b0413d31165e45" ], "author": { "name": "Srinivas Kandagatla", "email": "srinivas.kandagatla@oss.qualcomm.com", "time": "Fri Oct 23 18:13:13 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:04:23 2026 +0000" }, "message": "ASoC: codecs: wsa884x: disable runtime PM on unbind\n\nProbe enables runtime PM but nothing disables it on unbind. The pending\nautosuspend then runs wsa884x_runtime_suspend() after the devm-managed\nregmap is freed, and dereferences NULL:\n\n Unable to handle kernel NULL pointer dereference at virtual address 0000000000000020\n pc : regcache_cache_only+0x18/0x80\n lr : wsa884x_runtime_suspend+0x24/0x40 [snd_soc_wsa884x]\n\nUse devm_pm_runtime_enable() so runtime PM is disabled before the regmap\nis freed.\n\nFixes: aa21a7d4f68a (\"ASoC: codecs: wsa884x: Add WSA884x family of speakers\")\nSigned-off-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261023171316.819857-5-srinivas.kandagatla@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "6a55cf0d9dd2e2493a5030a4f7b0413d31165e45", "tree": "2a98d5da31baf7d8d1564ce08ce629aa077ca5a6", "parents": [ "00535515e3c14fbee20de4a1aa61cfb3390f0f50" ], "author": { "name": "Srinivas Kandagatla", "email": "srinivas.kandagatla@oss.qualcomm.com", "time": "Fri Oct 23 18:13:12 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:04:23 2026 +0000" }, "message": "ASoC: codecs: wsa883x: Accept temperatures across the full trim range\n\nwsa883x_get_temp() rejects any reading outside 5..45 degC with -EAGAIN,\nso a speaker that has been playing, or sits in a warm chassis, becomes\nunreadable above 45 degC.\n\nBound the check by the -10..150 degC two-point trim range instead, and\nuse inclusive comparisons, as in_range() excludes the upper bound.\n\nFixes: a02c42d41af7 (\"ASoC: codecs: wsa883x: Implement temperature reading and hwmon\")\nCc: stable@vger.kernel.org\nSigned-off-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261023171316.819857-4-srinivas.kandagatla@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "00535515e3c14fbee20de4a1aa61cfb3390f0f50", "tree": "ac12536057a2736fb91bbae5e8486415c6c9d236", "parents": [ "e21fb64a8c4aecae31ec63f994423ac944705c3e" ], "author": { "name": "Srinivas Kandagatla", "email": "srinivas.kandagatla@oss.qualcomm.com", "time": "Fri Oct 23 18:13:11 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:04:22 2026 +0000" }, "message": "ASoC: codecs: wsa884x: Accept temperatures across the full trim range\n\nwsa884x_get_temp() rejects any reading outside 5..45 degC with -EAGAIN.\nA speaker that has been playing, or sits in a warm laptop, easily runs\nabove 45 degC, so its temperature becomes unreadable when it matters.\n\nThe check only needs to drop bogus conversions, such as the all-zero\nreading before the PA is first enabled. Bound it by the -10..150 degC\ntwo-point trim range instead.\n\nFixes: 6b99dc62d940 (\"ASoC: codecs: wsa884x: Implement temperature reading and hwmon\")\nCc: stable@vger.kernel.org\nSigned-off-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261023171316.819857-3-srinivas.kandagatla@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "e21fb64a8c4aecae31ec63f994423ac944705c3e", "tree": "0eca2abbb41e75279d49da4f908dbc39596fd405", "parents": [ "e0b17f84f6e3fa1201b8e2857094023c42ce5636" ], "author": { "name": "Ravi Hothi", "email": "ravi.hothi@oss.qualcomm.com", "time": "Fri Oct 23 18:13:10 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 20:04:22 2026 +0000" }, "message": "ASoC: qcom: audioreach: fix module cfg blob size handling\n\naudioreach_get_module_priv_data() passes mod_array-\u003esize, a byte count,\nas the element count of the __le32 data[] flex array. The allocation and\nthe copy are four times too large, and the memcpy() can read past the end\nof the topology firmware buffer. The size is also never checked against\nthe private data it must lie within, and a zero size makes the loop spin\nforever.\n\nConvert the size to a word count, bound the blob by the remaining private\ndata and reject a zero size. Also check the returned pointer before\nstoring it in mod-\u003edata, as an error pointer there is dereferenced when\nthe graph is opened.\n\nFixes: c7ed4c2debfd (\"ASoC: qcom: audioreach: add support for static calibration\")\nCc: stable@vger.kernel.org\nSigned-off-by: Ravi Hothi \u003cravi.hothi@oss.qualcomm.com\u003e\nSigned-off-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261023171316.819857-2-srinivas.kandagatla@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "8d678dce151838ecb8251ce9cf0e29f7e13c866d", "tree": "e0978dbc925fdb7d45896027f9d7c803e691ca4b", "parents": [ "6977822f9daca68daf4524e3ffbe8442d8595b50", "51dc835b59caca983ed27065233be4b81cd8ac14" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 19:25:57 2026 +0000" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 19:25:57 2026 +0000" }, "message": "ASoC: Intel: soc-acpi-intel-arl-match: add new\n\nBard Liao \u003cyung-chuan.liao@linux.intel.com\u003e says:\n\nAdd rt712 and rt713 + dual rt1320 configurations.\n\nLink: https://patch.msgid.link/20261002011532.3468261-1-yung-chuan.liao@linux.intel.com\n" }, { "commit": "51dc835b59caca983ed27065233be4b81cd8ac14", "tree": "855b036e9c8a4f23cd75ea242508968fbdc0afd9", "parents": [ "d25ac9e30cab579c1c99b8f541e092b40ee53012" ], "author": { "name": "JJ Gault", "email": "jgault87@gmail.com", "time": "Fri Oct 02 09:15:32 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 19:25:57 2026 +0000" }, "message": "ASoC: Intel: soc-acpi-intel-arl-match: Add RT713 + dual RT1320 support\n\nAdd a SoundWire machine-driver match entry for boards with an RT713\n(SDCA \"VB\" jack/dmic variant) on link 0 and two RT1320 speaker amps\nsharing link 2 (distinguished by unique_id 0/1, left/right).\n\nThis exact codec pairing is already supported on Panther Lake\n(ptl_sdw_rt713_vb_l2_rt1320_l13) and Lunar Lake\n(lnl_sdw_rt713_vb_l2_rt1320_l13); Arrow Lake was missing the\ncorresponding entry, so affected boards fell back to the generic\nskl_hda_dsp_generic driver and only exposed HDMI outputs.\n\nConfirmed on an MSI Raider 16 Max HX B2WI (MS-2651): the kernel now\ncorrectly identifies the hardware and no longer falls back to the\ngeneric HDA driver.\n\nNo dedicated topology has been built for this link0/link2 layout yet,\nso sof_tplg_filename is set to a placeholder (\"sof-arl-dummy.tplg\")\nrather than pointing at an existing but unrelated topology, per review\nfeedback.\n\nSigned-off-by: JJ Gault \u003cjgault87@gmail.com\u003e\nSigned-off-by: Bard Liao \u003cyung-chuan.liao@linux.intel.com\u003e\nLink: https://patch.msgid.link/20261002011532.3468261-3-yung-chuan.liao@linux.intel.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "d25ac9e30cab579c1c99b8f541e092b40ee53012", "tree": "d981e858d696aaffffc890c78216a75dfa9d3b39", "parents": [ "cad16d850e3759dd82cd869f739b56e9844a1fee" ], "author": { "name": "Bard Liao", "email": "yung-chuan.liao@linux.intel.com", "time": "Fri Oct 02 09:15:31 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 19:25:57 2026 +0000" }, "message": "ASoC: soc-acpi-intel-arl-match: add rt712 on link 0 config\n\nAdd rt712 on link 0 configuration on ARL platform. Export all supported\nendpoints and the endpoint will be skipped if it is not listed in the\nSDCA DisCo table.\n\nSigned-off-by: Bard Liao \u003cyung-chuan.liao@linux.intel.com\u003e\nTested-by: Patrick Daether \u003cdaether@pd-digital.de\u003e\nReviewed-by: Péter Ujfalusi \u003cpeter.ujfalusi@linux.intel.com\u003e\nLink: https://patch.msgid.link/20261002011532.3468261-2-yung-chuan.liao@linux.intel.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "6977822f9daca68daf4524e3ffbe8442d8595b50", "tree": "4668e75e601fa23317a5ef0e653cf57f07bce358", "parents": [ "f3c7bee984aa0ba2b48a44e16a6f3ec2c27f851e", "a51c5dd7f7fc7cdf4ae28fec4a013d8418d1cb53" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 19:24:16 2026 +0000" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 19:24:16 2026 +0000" }, "message": "ASoC: qcom: q6apm: Fix shared memory unmap\n\nShawn Guo \u003cshengchao.guo@oss.qualcomm.com\u003e says:\n\nSince the early buffer mapping, q6apm maps a front-end\u0027s DSP buffers\nonce in pcm_new() and unmaps them in pcm_free(). The unmap side has a\nfew problems, which show up when the sound card is unbound and bound\nagain, e.g. by unbinding and binding any codec on the card:\n\n- The card core removes the components before it frees the PCMs, so\n the topology and its graph info are gone by the time pcm_free()\n tries to unmap. The unmap is silently skipped, the DSP keeps the old\n mapping, and the next bind fails to create the PCM:\n\n qcom-apm gprsvc:service:2:1: Error (1) Processing 0x0100100c cmd\n snd-sc8280xp sound: ASoC: can\u0027t create pcm MultiMedia1 Playback :-22\n\n- Once unmap is actually sent, every command stalls for five seconds,\n because the response handler matches on the wrong opcode:\n\n qcom-apm gprsvc:service:2:1: CMD timeout for [100100d] opcode\n\n- Unmapping the position buffer clears the circular buffer\u0027s handle\n instead of its own.\n\nPatch 1 fixes the unmap response handling, patch 2 makes the position\nbuffer unmap clear its own handle, and patch 3 moves the unmap to the\nAPM component\u0027s remove callback, before the topology is unloaded.\nPatches 1 and 2 go first so that patch 3 does not introduce the five\nsecond stalls.\n\nTested on Qualcomm Ride board by unbinding and binding the PCM1681\ncodec.\n\n echo 0-004c \u003e /sys/bus/i2c/drivers/pcm1681/unbind\n echo 0-004c \u003e /sys/bus/i2c/drivers/pcm1681/bind\n\nLink: https://patch.msgid.link/20261021041044.2080369-1-shengchao.guo@oss.qualcomm.com\n" }, { "commit": "a51c5dd7f7fc7cdf4ae28fec4a013d8418d1cb53", "tree": "0613dd22d2700522e726f1c3910d9470731bb1e5", "parents": [ "43c69604271d8b54c494fde70bd4a9eaab7a974d" ], "author": { "name": "Shawn Guo", "email": "shengchao.guo@oss.qualcomm.com", "time": "Wed Oct 21 12:10:44 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 19:24:15 2026 +0000" }, "message": "ASoC: qcom: q6apm: Unmap DSP buffers before removing the topology\n\nSince buffers are mapped once in pcm_new() and unmapped in pcm_free(),\nthe unmap relies on the graph info still being registered. During card\nteardown, however, soc_cleanup_card_resources() removes the components\nbefore it frees the PCM runtimes. q6apm-audio\u0027s remove callback unloads\nthe topology, which frees every audioreach_graph_info, so by the time\nq6apm_dai_pcm_free() runs the idr lookup fails and the unmap silently\nreturns -ENODEV. The DSP keeps the old mapping.\n\nWhen the card is bound again, for example after unbinding and binding\nany codec on it, pcm_new() maps the same buffer once more, the DSP\nrejects it and the front-end PCM is not created:\n\n qcom-apm gprsvc:service:2:1: Error (1) Processing 0x0100100c cmd\n qcom-apm gprsvc:service:2:1: DSP returned error[100100c] 1\n q6apm-dai ...: Audio Start: Buffer Allocation failed rc \u003d -22\n snd-sc8280xp sound: ASoC: can\u0027t create pcm MultiMedia1 Playback :-22\n\nRelease the circular and position buffer mappings of all graphs in\nq6apm_audio_remove() while the graph info still exists. The unmap\nhelper now takes the q6apm instance directly, since it is called from\nthe APM component rather than from a q6apm-dai child device.\n\nFixes: 8ea6e25c8536 (\"ASoC: qcom: q6apm: Add support for early buffer mapping on DSP\")\nCc: stable@vger.kernel.org\nReviewed-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nSigned-off-by: Shawn Guo \u003cshengchao.guo@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261021041044.2080369-4-shengchao.guo@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "43c69604271d8b54c494fde70bd4a9eaab7a974d", "tree": "0022e5b7fdbaea038d4b448c76fc73f390ae8248", "parents": [ "4b832a2af523cbf857a977414c0f07d7f90a4c9d" ], "author": { "name": "Shawn Guo", "email": "shengchao.guo@oss.qualcomm.com", "time": "Wed Oct 21 12:10:43 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 19:24:15 2026 +0000" }, "message": "ASoC: qcom: q6apm: Clear the right handle on pos buffer unmap\n\nPush/pull graphs map two shared-memory regions per graph, the circular\nbuffer and the position buffer, and keep a separate DSP handle for\neach. The map path tags its token with APM_MMAP_TOKEN_MAP_TYPE_POS_BUF\nso the response lands in the right handle, but the unmap path sends a\nbare graph ID and the response handler always clears mem_map_handle.\n\nUnmapping the position buffer therefore wipes the circular buffer\u0027s\nhandle and leaves pos_buf_mem_map_handle set. A subsequent unmap of the\ncircular buffer is skipped, leaking that DSP mapping, and a remap of\nthe position buffer is skipped because the stale handle looks valid.\n\nTag the unmap token the same way as the map token and decode it in the\nresponse handler to clear the matching handle.\n\nFixes: 7c1ac23b178a (\"ASoC: qcom: audioreach: Add support for shared memory push/pull modules\")\nCc: stable@vger.kernel.org\nReviewed-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nSigned-off-by: Shawn Guo \u003cshengchao.guo@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261021041044.2080369-3-shengchao.guo@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "4b832a2af523cbf857a977414c0f07d7f90a4c9d", "tree": "00174112dccb4e27467b5dce56eaa1fae9f3c075", "parents": [ "6cc7db9fdd06c992ee38793b2d556524fc0cf574" ], "author": { "name": "Shawn Guo", "email": "shengchao.guo@oss.qualcomm.com", "time": "Wed Oct 21 12:10:42 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 19:24:15 2026 +0000" }, "message": "ASoC: qcom: q6apm: Fix unmap regions response handling\n\nThe DSP acknowledges APM_CMD_SHARED_MEM_UNMAP_REGIONS with a\nGPR_BASIC_RSP_RESULT packet whose payload carries the acknowledged\nopcode and the status. apm_callback() stores hdr-\u003eopcode, i.e.\nGPR_BASIC_RSP_RESULT itself, as the result opcode, so\naudioreach_send_cmd_sync(), which waits for 0x0100100d, never sees a\nmatch and gives up after five seconds even though the DSP has already\nprocessed the command:\n\n qcom-apm gprsvc:service:2:1: CMD timeout for [100100d] opcode\n\nEach mapped graph costs a five second stall on unmap, and the forced\nstatus of 0 also hides real DSP failures from the caller.\n\nRecord the opcode and status from the response payload, like the other\nbasic-result commands do, and only drop the cached mapping handle when\nthe DSP reports success.\n\nFixes: 8ea6e25c8536 (\"ASoC: qcom: q6apm: Add support for early buffer mapping on DSP\")\nCc: stable@vger.kernel.org\nReviewed-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nSigned-off-by: Shawn Guo \u003cshengchao.guo@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261021041044.2080369-2-shengchao.guo@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "f3c7bee984aa0ba2b48a44e16a6f3ec2c27f851e", "tree": "f5c9d53f84cc6895b36d8c151807d777789f8586", "parents": [ "9080b18ad561a495bf74926cbc52e23cae8887c0" ], "author": { "name": "Val Packett", "email": "val@packett.cool", "time": "Fri Oct 16 03:29:17 2026 -0300" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 18:29:58 2026 +0000" }, "message": "ASoC: qcom: qdsp6: q6afe: fix clk vote response type mismatch\n\nThe response sent by the firmware when requesting a clock vote (opcode\nAFE_CMD_RSP_REMOTE_LPASS_CORE_HW_VOTE_REQUEST) does not actually have\nthe same opcode + status payload as APR_BASIC_RSP_RESULT. Rather, it\nreturns one single u32 which is the client_handle that must be used in\nfuture unvote requests for the same clock.\n\nAs a result of this type confusion, the status returned by the callback\nto q6afe_vote_lpass_core_hw was actually an out-of-bounds read. It was\nonly interpreted as success (0) most of the time due to luck, but there\nare some reports of random errors such as:\n\n[ 20.961100] qcom-q6afe aprsvc:service:4:4: AFE failed to vote (3)\n[ 20.961131] Failed to prepare clk \u0027core\u0027: -110\n\nFix by correctly interpreting the response as a single u32, and actually\nstore it as the client_handle to ensure unvote would work correctly.\n\nCc: stable@vger.kernel.org\nLink: https://lore.kernel.org/all/5976946.DvuYhMxLoT@antlia/\nFixes: 55e07531d922 (\"ASoC: q6dsp: q6afe: add lpass hw voting support\")\nReviewed-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nSigned-off-by: Val Packett \u003cval@packett.cool\u003e\nLink: https://patch.msgid.link/20261016063536.598610-1-val@packett.cool\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "9080b18ad561a495bf74926cbc52e23cae8887c0", "tree": "2b9cb2b17c428f063df790089bb0678d64d19869", "parents": [ "cc3fc99f1bce93c3ae3771ef98cb91a566da857e" ], "author": { "name": "Zhang Heng", "email": "zhangheng@kylinos.cn", "time": "Mon Oct 26 19:21:37 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Mon Oct 26 12:20:38 2026 +0000" }, "message": "ASoC: amd: yc: Add DMI quirk for HP Laptop 14-em0xxx\n\nAdd a DMI quirk for the HP Laptop 14-em0xxx fixing the issue where\nthe internal microphone was not detected.\n\nTested-by: Juan Benedict Tanoto \u003cjuan.tanoto12345@gmail.com\u003e\nCloses: https://bugzilla.kernel.org/show_bug.cgi?id\u003d222184\nSigned-off-by: Zhang Heng \u003czhangheng@kylinos.cn\u003e\nLink: https://patch.msgid.link/20261026112137.257723-1-zhangheng@kylinos.cn\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "cc3fc99f1bce93c3ae3771ef98cb91a566da857e", "tree": "7172be5f0a0b85fe7a78a601cb108a022b6ca3c6", "parents": [ "bcb2efda7abf56f212133044f135d88f68796fff" ], "author": { "name": "Fabio Estevam", "email": "festevam@gmail.com", "time": "Mon Oct 19 19:47:24 2026 -0300" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 23 18:48:40 2026 +0100" }, "message": "ASoC: fsl_utils: Tolerate fractional PLL rate residue\n\nfsl_asoc_constrain_rates() admits a sample rate only when an audio PLL\ndivides it exactly. On i.MX8M Plus, fractional audio PLLs may read a few\nhertz off their nominal rate after clk_set_rate(). For example,\naudio_pll1 can read 393215997 Hz after restoring 393216000 Hz.\n\nThis residue can make the helper exclude a valid sample-rate family,\ncausing a 48 kHz stream to fail or be resampled after PLL trimming.\nAccept remainders within 100 Hz of either end of the divisor range.\nThe other rate family differs by tens of kilohertz, so the tolerance\ndoes not make the families overlap.\n\nObserved on a custom i.MX8MP-based board: after 44.1 kHz playback and\nPLL trimming, subsequent 48 kHz playback was silently resampled.\n\nSigned-off-by: Fabio Estevam \u003cfestevam@gmail.com\u003e\nLink: https://patch.msgid.link/20261019224724.236388-1-festevam@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "bcb2efda7abf56f212133044f135d88f68796fff", "tree": "57adee6978ce15600e3d58e921d8826e289cdc36", "parents": [ "e0b17f84f6e3fa1201b8e2857094023c42ce5636" ], "author": { "name": "Zhang Yi", "email": "zhangyi@everest-semi.com", "time": "Thu Oct 22 10:53:09 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 23 18:44:16 2026 +0100" }, "message": "ASoC: codecs: es8375: Modify Register Configuration\n\nModify the Initialization Configuration and Clock Table\n\nSigned-off-by: Zhang Yi \u003czhangyi@everest-semi.com\u003e\nLink: https://patch.msgid.link/20261022025309.24028-1-zhangyi@everest-semi.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "e0b17f84f6e3fa1201b8e2857094023c42ce5636", "tree": "583faf75e40057e5ce7a1e9446016b69c7c6a7b8", "parents": [ "8cf9607d2d855629260fc78e6b54ea7a98525708" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 15:50:47 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 23 18:24:35 2026 +0100" }, "message": "ASoC: amd: raven: Fix memory leak in acp3x_dma_close()\n\nacp3x_dma_open() allocates a struct i2s_stream_instance for\neach substream, but acp3x_dma_close() never frees it, leaking\nit on every open/close cycle.\n\nFree it in acp3x_dma_close().\n\nFixes: 9f7041b71a2f (\"ASoC: amd: closing specific instance.\")\nReported-by: sashiko-reviews \u003csashiko-bot@kernel.org\u003e\nCloses: https://lore.kernel.org/all/sashiko-outbox-173760@kernel.org/\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016085047.535265-1-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "8cf9607d2d855629260fc78e6b54ea7a98525708", "tree": "ba471bd04751415ed69f02af76b0ee62fbedde19", "parents": [ "ad45d5369c566d1ae332fb52e8d9ffabe85465fc" ], "author": { "name": "Alex Kazinsky", "email": "a.kazinsky@ideco.ru", "time": "Fri Oct 23 17:08:52 2026 +0400" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 23 16:24:48 2026 +0100" }, "message": "ASoC: tlv320aic32x4: Prevent division by zero in divider callbacks\n\nA zero rate requested through clk_set_rate() or clk_round_rate() reaches\nclk_aic32x4_div_determine_rate() when the minimum rate is zero. Clamping\nthe requested rate to the allowed range leaves it unchanged, causing\ndivision by zero when calculating the divisor.\n\nA zero parent rate can also cause division by zero in determine_rate().\nFor example, if reading a parent divider\u0027s register fails,\nclk_aic32x4_div_recalc_rate() returns zero, which the clock framework\ncaches as the parent\u0027s rate. A subsequent rate request for a child\ndivider receives this value in best_parent_rate. With a nonzero requested\nrate, the calculated divisor is zero. It passes the existing upper-bound\ncheck and causes division by zero in the resulting rate calculation.\n\nThe set_rate callback can receive a zero rate when an ancestor\u0027s rate\nchanges. clk_calc_subtree() calculates descendant rates through\nrecalc_rate() without calling their determine_rate callbacks. If reading\na descendant divider\u0027s register fails, clk_aic32x4_div_recalc_rate()\nreturns zero. This becomes the descendant\u0027s new_rate, which\nclk_change_rate() passes to clk_aic32x4_div_set_rate(), causing division\nby zero.\n\nReject zero rates in both callbacks and reject a zero divisor in\nclk_aic32x4_div_determine_rate().\n\nFound by Linux Verification Center (linuxtesting.org) with SVACE.\n\nFixes: a51b50062091 (\"ASoC: tlv320aic32x4: Model DAC/ADC dividers in CCF\")\nCc: stable@vger.kernel.org\nSigned-off-by: Alex Kazinsky \u003ca.kazinsky@ideco.ru\u003e\nLink: https://patch.msgid.link/20261023130854.93639-1-a.kazinsky@ideco.ru\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "ad45d5369c566d1ae332fb52e8d9ffabe85465fc", "tree": "2f23d49eb1dd5fdd12d2c299a54d5c808a5b728b", "parents": [ "8731e33a3b98ea1ccade059b3a1ce06b7dd66b17" ], "author": { "name": "Shuming Fan", "email": "shumingf@realtek.com", "time": "Wed Oct 21 17:09:29 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 22 17:43:57 2026 +0100" }, "message": "ASoC: rt722: enable mono speaker on Dell SKU 0EBA\n\nDell SKU 0EBA uses only the left audio channel and a single speaker.\nAdd the corresponding settings to support this configuration.\n\nSigned-off-by: Shuming Fan \u003cshumingf@realtek.com\u003e\nLink: https://patch.msgid.link/20261021090929.2135891-1-shumingf@realtek.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "8731e33a3b98ea1ccade059b3a1ce06b7dd66b17", "tree": "c4259503caa8cf43a6bb5bf02518c6ab0a951841", "parents": [ "d153f261a56dc08bbda19a356e9d8f8fa2f2969e" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Thu Oct 22 12:15:28 2026 +0200" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 22 14:20:42 2026 +0100" }, "message": "ASoC: wm8994: follow AIF clock source changes in MCLK gating\n\nThe AIF clock source can be changed by configure_aif_clock() while the\nAIF clock is running, for example the Midas machine driver switches\nAIF1 between MCLK2 and FLL1 while AIF1CLK is kept enabled for jack\ndetection. aif_mclk_set() only enables the MCLK selected at the time\nthe AIF clock is turned on, so an MCLK selected later this way is never\nenabled, and the codec may run from a stopped clock.\n\nTrack whether the AIF clock is running and, if so, enable the newly\nselected MCLK in configure_aif_clock() before switching to it, then\nrelease the previously enabled one.\n\nFixes: 001b83d395ab (\"ASoC: wm8994: Add support for MCLKn clock gating\")\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nLink: https://patch.msgid.link/20261022101531.775891-1-m.szyprowski@samsung.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "d153f261a56dc08bbda19a356e9d8f8fa2f2969e", "tree": "98f8fe7e3e7a34a885e65cfe15287b512b5e1e86", "parents": [ "bef34efba74d87d5c20e3bb93539fa45b3cb8a83", "d9c23ac1217ab094e6bd9ab95e159ec72c8baca5" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Wed Oct 21 16:25:53 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Wed Oct 21 16:25:53 2026 +0100" }, "message": "ASoC: wm8994/midas_wm1811: fix codec clocking issues\n\nMarek Szyprowski \u003cm.szyprowski@samsung.com\u003e says:\n\nThis patchset fixes a few issues in the WM8994/WM1811 codec clocking\ncode, which show up on the Exynos4412 Trats2 board. On that board the\ncodec AIF1 and SYSCLK run from MCLK2 (the 32768Hz clock provided by the\nPMIC) when idle, and from FLL1 (fed by MCLK1, a fixed 24MHz clock) when\na stream is active.\n\nThe symptoms are the codec flooding the kernel log with FIFO error\ninterrupts every 10ms once any digital path is powered up, for example\nby the mixer state restored by alsactl, and FLL1 failing to lock:\n\n wm8994-codec wm8994-codec: Timed out waiting for FLL lock\n wm8994-codec wm8994-codec: FIFO error\n wm8994-codec wm8994-codec: FIFO error\n ...\n\nBoth issues disappear when booting with clk_ignore_unused, or after the\nWLAN/Bluetooth drivers enable the shared 32kHz clock. This went\nunnoticed during the initial Midas audio contribution probably because\nthe WLAN/Bluetooth drivers kept their clocks enabled that time. Several\nbugs contribute to this:\n\n1. aif_mclk_set() never enables MCLK2 for an AIF clocked from it, due\n to a missing shift of the AIFnCLK_SRC field value, so the codec runs\n from a stopped clock until another user enables it.\n\n2. The AIFnCLK rate ratio saved when SYSCLK drops to 32kHz gets\n overwritten on each subsequent clock reconfiguration done in the low\n SYSCLK mode, so AIF1 ends up at 128fs instead of 256fs.\n\n3. wm8994_set_dai_sysclk() passes the AIF index instead of the MCLK\n index to wm8994_set_mclk_rate(), so the rate of MCLK1 is reported for\n MCLK2 and the low SYSCLK handling is skipped.\n\n4. The midas_wm1811 machine driver starts FLL1 at 11.2896MHz when no\n stream is active, while AIF1 keeps the configuration of the last\n stream (or the 48kHz reset default), which needs 12.288MHz.\n\nPatches have been developed with LLM assistance and have been tested on\nthe real Trats2 board. The built-in speaker as well as headphones jack\nprovide proper audio now.\n\nLink: https://patch.msgid.link/20261021101750.3297770-1-m.szyprowski@samsung.com\n" }, { "commit": "d9c23ac1217ab094e6bd9ab95e159ec72c8baca5", "tree": "93c0413a1baeeec33352ff2d1799e2b1d4c090bf", "parents": [ "7916b55b100973b5fb5b974e8f7c8ae9f3ac1d2e" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Wed Oct 21 12:17:45 2026 +0200" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Wed Oct 21 16:25:52 2026 +0100" }, "message": "ASoC: samsung: midas_wm1811: run FLL1 at the AIF1 configured rate when idle\n\nWhen the codec is brought up without an active stream, for example\nbecause the mixer state restored by alsactl powers up a digital path,\nmidas_start_fll1() sets FLL1 to the default 11.2896MHz rate. The\ncodec\u0027s AIF1 however keeps the configuration of the last stream, or its\nreset default of 48kHz at 256fs before the first stream, which needs\na 12.288MHz AIF1 clock. The digital paths then run with AIF1 clocked\nat a rate not matching its configuration.\n\nRemember the FLL1 rate requested by the last hw_params() call, which\nmatches the AIF1 configuration kept in the codec, and use it when no\nspecific rate is requested. Change the default rate used before the\nfirst stream to 12.288MHz, matching the codec\u0027s default AIF1\nconfiguration.\n\nFixes: fd0ea9cd9698 (\"ASoC: samsung: Add sound support for Midas boards\")\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nLink: https://patch.msgid.link/20261021101750.3297770-5-m.szyprowski@samsung.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "7916b55b100973b5fb5b974e8f7c8ae9f3ac1d2e", "tree": "17240b27a04b8306669723afdac2398514fc94aa", "parents": [ "693574504051a19383640cfb99524a6b69e4624f" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Wed Oct 21 12:17:44 2026 +0200" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Wed Oct 21 16:25:52 2026 +0100" }, "message": "ASoC: wm8994: fix MCLK index used for setting MCLK rate\n\nwm8994_set_dai_sysclk() passes the AIF index (dai-\u003eid - 1) to\nwm8994_set_mclk_rate(), which uses it to index the MCLK clocks and\ntheir cached rates. As a result, selecting MCLK2 as the AIF1 clock\nsource sets and reads back the rate of MCLK1 instead, and the rate\nof MCLK1 is then stored as the MCLK2 rate.\n\nOn the Exynos4412 Trats2 board, where MCLK1 is a fixed 24MHz clock and\nMCLK2 a 32768Hz clock used when the codec is idle, this gives:\n\n wm8994-codec wm8994-codec: AIF1 using MCLK2 at 24000000Hz\n\nso the driver assumes a 12MHz SYSCLK while it actually runs at 32kHz.\nThis skips the 128fs AIF clock ratio setup for low SYSCLK rates and\nmakes the mic detection rate configuration use the wrong clock rate.\n\nPass the MCLK index matching the selected clock source instead.\n\nFixes: 419e2f508336 (\"ASoC: wm8994: Add support for setting MCLK clock rate\")\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nReviewed-by: Charles Keepax \u003cckeepax@opensource.cirrus.com\u003e\nReviewed-by: Sylwester Nawrocki \u003cs.nawrocki@samsung.com\u003e\nLink: https://patch.msgid.link/20261021101750.3297770-4-m.szyprowski@samsung.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "693574504051a19383640cfb99524a6b69e4624f", "tree": "928131d85e8767d640760075627873f1777f142e", "parents": [ "872215109fc880de7a03fa30437346f9212649e8" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Wed Oct 21 12:17:43 2026 +0200" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Wed Oct 21 16:25:52 2026 +0100" }, "message": "ASoC: wm8994: don\u0027t lose the AIF clock ratio when staying at 32kHz SYSCLK\n\nWhen SYSCLK drops below 50kHz, the AIFnCLK rate ratio is saved and\ntemporarily lowered to 128fs for accessory detection, then restored\nonce SYSCLK gets fast enough again. The ratio is however saved again\non each clock reconfiguration done while SYSCLK is still slow, which\noverwrites the original ratio with the 128fs one.\n\nThis happens on the Exynos4412 Trats2 board, which set MCLK2 as SYSCLK\ntwice during the card probe and then configure FLL1 while still running\nfrom MCLK2. Once SYSCLK is switched to FLL1, the 128fs ratio is\n\"restored\", so AIF1 is left configured for 48kHz at 128fs while being\nclocked at 256fs. If any digital path is powered up before a stream\nreconfigures the AIF, the codec raises FIFO error interrupts every\n10ms, flooding the kernel log:\n\n wm8994-codec wm8994-codec: FIFO error\n\nSave the original ratio only when entering the low SYSCLK mode. While\nat it, move the code duplicated in _wm8994_set_fll() and\nwm8994_set_dai_sysclk() to a common helper.\n\nFixes: 6730049a4763 (\"ASoC: wm8994: Lower AIFnCLK divisor when dropping to 32kHz\")\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nReviewed-by: Charles Keepax \u003cckeepax@opensource.cirrus.com\u003e\nReviewed-by: Sylwester Nawrocki \u003cs.nawrocki@samsung.com\u003e\nLink: https://patch.msgid.link/20261021101750.3297770-3-m.szyprowski@samsung.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "872215109fc880de7a03fa30437346f9212649e8", "tree": "5b7a11743f40644b20de28d584b05edc395e9ffc", "parents": [ "6cc7db9fdd06c992ee38793b2d556524fc0cf574" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Wed Oct 21 12:17:42 2026 +0200" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Wed Oct 21 16:25:52 2026 +0100" }, "message": "ASoC: wm8994: fix MCLK gating for AIF clocks sourced from MCLK2\n\naif_mclk_set() masks the AIFnCLK_SRC field of the AIFn clocking\nregister, but compares the result with unshifted field values. The\nMCLK2 source (0x08) therefore never matches, so MCLK2 is never enabled\nfor an AIF clocked from it, and the AIF relies on other users of that\nclock to keep it running.\n\nOn the Exynos4412 Trats2 board, AIF1 and SYSCLK run from MCLK2, the\n32768Hz PMIC clock, while the codec is idle. That clock is shared with\nthe WLAN and Bluetooth chips, which enable it only once their drivers\nare loaded. Until then the codec runs from a stopped clock: FLL1 fails\nto lock when configured from that state, and the codec floods the\nkernel log with FIFO error interrupts once a digital path is powered\nup:\n\n wm8994-codec wm8994-codec: Timed out waiting for FLL lock\n wm8994-codec wm8994-codec: FIFO error\n\nBooting with clk_ignore_unused, which keeps that clock running from\nthe bootloader, makes both issues disappear.\n\nFixing just the comparison is not enough. The AIF clock source can\nbe changed while the AIF clock is running, for example the Midas\nmachine driver switches AIF1 between MCLK2 and FLL1 while AIF1CLK is\nkept enabled for jack detection. Looking up the clock again on disable\ncan then release a different MCLK than the one enabled, leaking the\nenable count of one clock and underflowing the other.\n\nShift the field value before decoding it, and remember which MCLK has\nbeen enabled for each AIF, so that the same clock is released on\ndisable. While at it, report the MCLK number 1-based in the error\nmessage.\n\nFixes: 001b83d395ab (\"ASoC: wm8994: Add support for MCLKn clock gating\")\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nReviewed-by: Charles Keepax \u003cckeepax@opensource.cirrus.com\u003e\nReviewed-by: Sylwester Nawrocki \u003cs.nawrocki@samsung.com\u003e\nLink: https://patch.msgid.link/20261021101750.3297770-2-m.szyprowski@samsung.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "bef34efba74d87d5c20e3bb93539fa45b3cb8a83", "tree": "1a2b71724788d0aedbc0b1da9f1cab6766211456", "parents": [ "6cc7db9fdd06c992ee38793b2d556524fc0cf574" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Tue Oct 20 10:46:33 2026 +0200" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Wed Oct 21 15:36:00 2026 +0100" }, "message": "ASoC: SOF: amd: add ACPI dependency\n\nThe newly added acp_asp_mailbox.c file makes no sense without ACPI\nand fails to build in that configuration:\n\nsound/soc/sof/amd/acp_asp_mailbox.c: In function \u0027acp7x_asp_send_cmd\u0027:\nsound/soc/sof/amd/acp_asp_mailbox.c:59:22: error: invalid use of undefined type \u0027struct acpi_device\u0027\n 59 | handle \u003d adev-\u003ehandle;\n | ^~\n\nAddress this by adding the required Kconfig dependency at the\ntop level here.\n\nFixes: cec3598305a6 (\"ASoC: SOF: amd: add ASP carveout firmware loading for ACP7.B/7.F\")\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nLink: https://patch.msgid.link/20261020084656.2725461-1-arnd@kernel.org\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "6cc7db9fdd06c992ee38793b2d556524fc0cf574", "tree": "123fb496b689a7a14e22887ac3446be425252ab8", "parents": [ "ff404ef11b975baf38c4472c51a6674c239e8021" ], "author": { "name": "Richard Fitzgerald", "email": "rf@opensource.cirrus.com", "time": "Tue Oct 20 14:57:06 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Tue Oct 20 15:54:26 2026 +0100" }, "message": "ASoC: cs35l56: Wait for firmware timer expiry before system suspend\n\nOn CS35L5x firmware older than 3.13.7 (B0 silicon) and 4.7.16 (B2 silicon)\na SoundWire bus reset is not allowed within 250ms of the last firmware\ntimer start.\n\nThis is already avoided during runtime suspend by the various idle\ntimeouts. System suspend can happen at any time so needs special\nprotection. The driver cannot cancel the firmware timer, so it must wait\nlong enough for the timer to expire.\n\nThe delay is placed in the suspend stage because typically this has less\nimpact on end users than delays in resuming. The amp is in PS3 power\nstate when suspending and no new timers will be started in this state.\nAn extra 10ms is added to the delay to avoid a race on the exact instant\nthe firmware timer expires.\n\nThere is no need to have the delay for every driver instance. The timers\non each amp will expire in parallel, so the delay is only needed once.\nA global flag is used so that the first instance to reach its suspend()\ncallback will delay and then clear the flag. The cs35l56_fw_idle_wait_lock\nmutex is to ensure this is still safe if async_suspend was ever enabled\nfor SoundWire devices.\n\nFixes: e496112529006 (\"ASoC: cs35l56: Add driver for Cirrus Logic CS35L56\")\nReported-by: Ferenc Lengyel \u003cleferi99@gmail.com\u003e\nCloses: https://github.com/thesofproject/linux/issues/5898\nSigned-off-by: Richard Fitzgerald \u003crf@opensource.cirrus.com\u003e\nLink: https://patch.msgid.link/20261020135706.3573260-1-rf@opensource.cirrus.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "ff404ef11b975baf38c4472c51a6674c239e8021", "tree": "ca72cee7e56cb09e63dca330bd6e097bf8a5cef5", "parents": [ "73be2ee656f2722d498504259b9f1fdef8419431" ], "author": { "name": "HyeongJun An", "email": "sammiee5311@gmail.com", "time": "Mon Oct 19 21:40:22 2026 +0900" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Tue Oct 20 14:48:41 2026 +0100" }, "message": "ASoC: cs42l56: Remove the ADC Mute Switch control\n\nThe ADC Mute Switch control writes bits 2 and 3 of the Misc ADC Control\nregister. These are the ADCA Invert and ADCB Invert bits, which have\ntheir own controls. The ADC mute bits are bits 0 and 1, and the DAI mute\ncallback already sets them.\n\nSo the control has never muted the ADCs, and nobody can be relying on\nit. Remove it rather than point it at the mute bits, so the ADCs are\nmuted in one place only.\n\nFixes: 272b5edd3b8f (\"ASoC: Add support for CS42L56 CODEC\")\nSuggested-by: Charles Keepax \u003cckeepax@opensource.cirrus.com\u003e\nLink: https://lore.kernel.org/all/atXh3Br+fuH83S0q@opensource.cirrus.com/\nAssisted-by: Claude:claude-opus-5-5\nSigned-off-by: HyeongJun An \u003csammiee5311@gmail.com\u003e\nReviewed-by: Charles Keepax \u003cckeepax@opensource.cirrus.com\u003e\nLink: https://patch.msgid.link/20261019124022.3410793-1-sammiee5311@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "73be2ee656f2722d498504259b9f1fdef8419431", "tree": "ed59066ada0fec22a8e57f40b643b2f014653955", "parents": [ "2d26ecb9830e3d2f9b6c853054cd16e1a1e8e6d4", "f28c09b7e62fb5ead65bdfab93012a86d64b6540" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Sun Oct 18 13:22:10 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Sun Oct 18 13:22:10 2026 +0100" }, "message": "ASoC: codecs: Fix more control definitions that write another control\u0027s bits\n\nHyeongJun An \u003csammiee5311@gmail.com\u003e says:\n\nThese are the last fixes found by the overlap scan from the first\nseries [1]. In sta32x and sta350 a 4-bit field has a maximum of 16, so\nthe control also writes the bit above it. In tlv320aic32x4 a TAS2505\ncontrol uses the wrong register.\n\n[1] https://lore.kernel.org/all/20261008130953.2446692-1-sammiee5311@gmail.com/\n\nLink: https://patch.msgid.link/cover.1792135145.git.sammiee5311@gmail.com\n" }, { "commit": "f28c09b7e62fb5ead65bdfab93012a86d64b6540", "tree": "d6c30e3147419897581806f8c5085de7a26c9881", "parents": [ "77623752c156763d7a80414afe5b769ba4532bd3" ], "author": { "name": "HyeongJun An", "email": "sammiee5311@gmail.com", "time": "Sun Oct 18 15:47:46 2026 +0900" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Sun Oct 18 13:22:10 2026 +0100" }, "message": "ASoC: tlv320aic32x4: Fix definition of TAS2505 HP Driver Gain Volume control\n\nThe TAS2505 HP volume is bits 6:0 of page 1 register 22, not of\nregister 16, which holds the HP driver mute (bit 6) and gain\n(bits 5:0).\n\nFixes: 2169d6a0f072 (\"ASoC: tlv320aic32x4: Fix TAS2505 volume controls\")\nAssisted-by: Claude:claude-opus-5-5\nSigned-off-by: HyeongJun An \u003csammiee5311@gmail.com\u003e\nLink: https://patch.msgid.link/e50b88689e8efd353ee597a6692ab4db30aa63e7.1792135145.git.sammiee5311@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "77623752c156763d7a80414afe5b769ba4532bd3", "tree": "af7709b66e48bf28c914207d0189e1b156333b01", "parents": [ "e06bf60ee5bffa9eeacff0bf8b03d4572b04f67d" ], "author": { "name": "HyeongJun An", "email": "sammiee5311@gmail.com", "time": "Sun Oct 18 15:47:45 2026 +0900" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Sun Oct 18 13:22:10 2026 +0100" }, "message": "ASoC: codecs: sta350: Fix definition of limiter threshold controls\n\nThe limiter attack and release thresholds are the two 4-bit halves of\none register, so their maximum is 15, not 16. With 16 the controls on\nbits 3:0 also write bit 4, which belongs to the other threshold.\n\nFixes: 2439ea1f0f8f (\"ASoC: sta350: Add codec driver\")\nAssisted-by: Claude:claude-opus-5-5\nSigned-off-by: HyeongJun An \u003csammiee5311@gmail.com\u003e\nLink: https://patch.msgid.link/d65a21665a1e0d63dec174dd3691bd97764b8ae0.1792135145.git.sammiee5311@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "e06bf60ee5bffa9eeacff0bf8b03d4572b04f67d", "tree": "e6a1f8beaac675d9a4525e3acb7c09cc643e0590", "parents": [ "fcea06d4598ed7072dc201bd659a2f253a514fb6" ], "author": { "name": "HyeongJun An", "email": "sammiee5311@gmail.com", "time": "Sun Oct 18 15:47:44 2026 +0900" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Sun Oct 18 13:22:10 2026 +0100" }, "message": "ASoC: codecs: sta32x: Fix definition of limiter threshold controls\n\nThe limiter attack and release thresholds are the two 4-bit halves of\none register, so their maximum is 15, not 16. With 16 the controls on\nbits 3:0 also write bit 4, which belongs to the other threshold.\n\nFixes: c034abf6e503 (\"ASoC: add STA32X codec driver\")\nAssisted-by: Claude:claude-opus-5-5\nSigned-off-by: HyeongJun An \u003csammiee5311@gmail.com\u003e\nLink: https://patch.msgid.link/179118fc7680b2b872d1f917b7fd21f54a73a6d8.1792135145.git.sammiee5311@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "2d26ecb9830e3d2f9b6c853054cd16e1a1e8e6d4", "tree": "e65c14198f75f7718ac7b243811be8739017bc24", "parents": [ "11017ad569df589488d9761474d8a69430b9d76c", "6e539c02b04bd6700eab5d5115639646118f7fde" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:17:17 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:20:58 2026 +0100" }, "message": "ASoC: qcom: Add Nord audio support\n\nMohammad Rafi Shaik \u003cmohammad.rafi.shaik@oss.qualcomm.com\u003e says:\n\nThis series adds audio support for the Qualcomm Nord Ride and\nRRD boards and includes the required machine driver, device tree\nbinding updates, and codec improvements needed for the board\u0027s\nexternal audio codec configuration.\n\nNord Ride uses a PCM1681 DAC for playback and an ADAU1979 ADC for capture.\nCompared to other SC8280XP based platforms, Nord Ride requires\nboard-specific DAI format and codec clock configuration to support\nthe external PCM1681 DAC and ADAU1979 ADC.\n\nLink: https://patch.msgid.link/20261009-nord-asoc-driver-support-v3-v3-0-0c1897f21ccf@oss.qualcomm.com\n" }, { "commit": "6e539c02b04bd6700eab5d5115639646118f7fde", "tree": "26c69f7eb703a647c0d90016bb206f135e9b113c", "parents": [ "22a72cf1d60c55e5cd3d03fcfdb5a92af0dc590e" ], "author": { "name": "Mohammad Rafi Shaik", "email": "mohammad.rafi.shaik@oss.qualcomm.com", "time": "Fri Oct 09 18:42:53 2026 +0530" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:16:25 2026 +0100" }, "message": "ASoC: qcom: sc8280xp: Add Nord sound card support\n\nAdd support for the Nord Ride and RRD sound cards by introducing the\nqcom,nord-sndcard compatible and associated platform-specific data.\n \nNord uses external codecs for its playback and capture paths and requires\nboard-specific DAI and clock configuration. Configure the codec DAI format\nfor DSP_A operation and enable MI2S bit clock handling for the platform.\n \nAdd a platform-specific sound card initialization callback to configure\nthe ADAU1979 capture codec to use LRCLK as its system clock source. This\nconfiguration is done during DAI link initialization so that the codec\nclock source and associated rate constraints are established before the\ncapture stream is opened.\n\nSigned-off-by: Mohammad Rafi Shaik \u003cmohammad.rafi.shaik@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261009-nord-asoc-driver-support-v3-v3-7-0c1897f21ccf@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "22a72cf1d60c55e5cd3d03fcfdb5a92af0dc590e", "tree": "fb5e4a313cfb11a556dd944f1132a819f3e9d859", "parents": [ "3b953d0e72a1dcbbe9c833ef114cbae246d63ed8" ], "author": { "name": "Mohammad Rafi Shaik", "email": "mohammad.rafi.shaik@oss.qualcomm.com", "time": "Fri Oct 09 18:42:52 2026 +0530" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:16:25 2026 +0100" }, "message": "ASoC: dt-bindings: qcom,sm8250: Add Nord sound card\n\nDocument the bindings for the Qualcomm Nord sound card.\n\nThe bindings are the same as for other newer Qualcomm ADSP\nsound cards, thus keep them in existing qcom,sm8250.yaml file.\n\nAcked-by: Rob Herring (Arm) \u003crobh@kernel.org\u003e\nSigned-off-by: Mohammad Rafi Shaik \u003cmohammad.rafi.shaik@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261009-nord-asoc-driver-support-v3-v3-6-0c1897f21ccf@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "3b953d0e72a1dcbbe9c833ef114cbae246d63ed8", "tree": "f7bcf611bb8e1ae49c26f47902ef184efebaf2c5", "parents": [ "f5f5bfcecf65a2a20ed391490b31ac7f6008a5be" ], "author": { "name": "Shawn Guo", "email": "shengchao.guo@oss.qualcomm.com", "time": "Fri Oct 09 18:42:51 2026 +0530" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:16:25 2026 +0100" }, "message": "ASoC: codec: pcm1681: Enable the PCM1681 supplies\n\nThe driver assumes that the analog and digital supplies of the DAC are\nalready up by the time it probes. That only holds when the rails are\nhardwired or left on by the bootloader. Boards which gate them, like\nthe Qualcomm Nord RRD and Ride, have no way to get them enabled, and\nthe first register access then fails.\n\nEnable the VCC1, VCC2 and VDD supplies before touching the clock or the\nregmap, so that the DAC is powered whenever the driver is bound. The\nsupplies are optional as far as the regulator core is concerned, so\nboards which do not describe them keep working through the dummy\nregulator.\n\nSigned-off-by: Shawn Guo \u003cshengchao.guo@oss.qualcomm.com\u003e\nSigned-off-by: Mohammad Rafi Shaik \u003cmohammad.rafi.shaik@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261009-nord-asoc-driver-support-v3-v3-5-0c1897f21ccf@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "f5f5bfcecf65a2a20ed391490b31ac7f6008a5be", "tree": "6f9aad6c570e9f79e98a0fd8a38dcb22c2c4454d", "parents": [ "a93f77e4187f210772b6024d2d05180b82521a92" ], "author": { "name": "Shawn Guo", "email": "shengchao.guo@oss.qualcomm.com", "time": "Fri Oct 09 18:42:50 2026 +0530" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:16:24 2026 +0100" }, "message": "ASoC: dt-bindings: ti,pcm1681: Document the PCM1681 supplies\n\nThe PCM1681 takes a 5V analog supply on VCC1 and VCC2 and a 3.3V\ndigital supply on VDD. On boards where these rails are switchable, the\ncodec has to know about them to be able to power the DAC up and down,\nwhich needs a way to describe the connections in Device Tree.\n\nDocument the VCC1, VCC2 and VDD supply properties.\n\nSigned-off-by: Shawn Guo \u003cshengchao.guo@oss.qualcomm.com\u003e\nSigned-off-by: Mohammad Rafi Shaik \u003cmohammad.rafi.shaik@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261009-nord-asoc-driver-support-v3-v3-4-0c1897f21ccf@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "a93f77e4187f210772b6024d2d05180b82521a92", "tree": "8e31bb3c9450b05393d472045e39c9a84c87f927", "parents": [ "8987e9a24f453e5080327ee5c71b4d40858c24eb" ], "author": { "name": "Mohammad Rafi Shaik", "email": "mohammad.rafi.shaik@oss.qualcomm.com", "time": "Fri Oct 09 18:42:49 2026 +0530" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:16:24 2026 +0100" }, "message": "ASoC: codec: pcm1681: Add TDM support\n\nThe PCM1681 selects the audio interface format using FMT[3:0] in the\nformat register. The driver currently supports only I2S, left-justified,\nand right-justified formats, preventing a machine driver from selecting\nTDM mode.\n \nAdd support for SND_SOC_DAIFMT_DSP_A and program the PCM1681 I2S TDM\nformat when it is selected. Also advertise DSP_A in the selectable DAI\nformats.\n \nWhile adding TDM support, correct the reset default for the format\nregister from 0x06 to 0x05. The current default does not match the\nhardware reset value. Although this has no effect while regmap caching\nis disabled, it could cause the TDM format write to be skipped if\nregmap caching is enabled in the future.\n \nThe existing I2S, left-justified, and right-justified formats remain\nunchanged.\n\nAssisted-by: LLM\nSigned-off-by: Mohammad Rafi Shaik \u003cmohammad.rafi.shaik@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261009-nord-asoc-driver-support-v3-v3-3-0c1897f21ccf@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "8987e9a24f453e5080327ee5c71b4d40858c24eb", "tree": "c414b8f8e49b6c3c384a5578e8ae5f638b71ef1c", "parents": [ "8855a9319c18d46db02ddbd11960a30436e642f5" ], "author": { "name": "Mohammad Rafi Shaik", "email": "mohammad.rafi.shaik@oss.qualcomm.com", "time": "Fri Oct 09 18:42:48 2026 +0530" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:16:24 2026 +0100" }, "message": "ASoC: codec: pcm1681: Add optional SCK clock and runtime PM support\n\nThe PCM1681 requires its SCK system clock to be running before register\naccess. On platforms where SCK is provided by a gateable clock, register\naccess may fail when the clock is disabled.\n \nAdd support for an optional \"sck\" clock and enable it before accessing the\ndevice. After enabling SCK, wait for the required 65536 system clock cycles\nto allow the device to complete its internal reset sequence.\n \nUse runtime PM to manage SCK instead of keeping it enabled for the lifetime\nof the device. Disable the clock during runtime suspend and restore it on\nruntime resume. Use autosuspend to avoid unnecessary clock toggling between\nclosely spaced accesses.\n \nSince the device register state may be lost when SCK is disabled, enable\nthe regmap cache. Switch regmap to cache-only mode and mark the cache\ndirty on runtime suspend, then synchronize the cached register state after\nSCK is restored on runtime resume. Mark the zero-detect status register\nvolatile since it is updated by hardware.\n \nDrop idle_bias_on so that the component can reach SND_SOC_BIAS_OFF and\nruntime suspend can gate SCK.\n\nAssisted-by: LLM\nSigned-off-by: Mohammad Rafi Shaik \u003cmohammad.rafi.shaik@oss.qualcomm.com\u003e\nReviewed-by: Shawn Guo \u003cshengchao.guo@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261009-nord-asoc-driver-support-v3-v3-2-0c1897f21ccf@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "8855a9319c18d46db02ddbd11960a30436e642f5", "tree": "deecef41b240a096c9580fd9daeb501e4076573a", "parents": [ "611680f6050a66b84e5cc0af33862a83d1f7a200" ], "author": { "name": "Mohammad Rafi Shaik", "email": "mohammad.rafi.shaik@oss.qualcomm.com", "time": "Fri Oct 09 18:42:47 2026 +0530" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:16:24 2026 +0100" }, "message": "ASoC: dt-bindings: ti,pcm1681: Document the optional SCK clock\n\nThe PCM1681 can use an external system clock supplied on the SCK input\npin. Platforms that provide this clock need a way to describe the clock\nconnection in Device Tree.\n\nDocument the optional \u0027clocks\u0027 and \u0027clock-names\u0027 properties and define\nthe clock name as \"sck\" to represent the external system clock source.\n\nThis allows boards using an externally supplied SCK clock to accurately\ndescribe the hardware configuration.\n\nReviewed-by: Shawn Guo \u003cshengchao.guo@oss.qualcomm.com\u003e\nSigned-off-by: Mohammad Rafi Shaik \u003cmohammad.rafi.shaik@oss.qualcomm.com\u003e\nLink: https://patch.msgid.link/20261009-nord-asoc-driver-support-v3-v3-1-0c1897f21ccf@oss.qualcomm.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "11017ad569df589488d9761474d8a69430b9d76c", "tree": "6251af03a9b16f3877cac1136a5c02917192d3c1", "parents": [ "5cb97cc86dd57c67976299639a3ec20dfd649e77", "32c9d661dab029348fcd389ca918402d341d2ff2" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:15:09 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:15:09 2026 +0100" }, "message": "ASoC: Enable soundcard on Motorola Edge 30\n\nVal Packett \u003cval@packett.cool\u003e says:\n\nThis series enables sound support on motorola-dubai, at least the\nspeakers.. The WCD that handles microphones and analog USB-C sound\nis left out because it would first need:\nhttps://lore.kernel.org/all/20260522-kodiak-elite-macros-v1-1-487661ac1270@fairphone.com/\n\nThe senary MI2S patches were previously part of:\nhttps://lore.kernel.org/all/20260506204142.659778-1-val@packett.cool/\n\nand that series mixed up too many things and got bogged down due to\nthe TDM stuff that\u0027s not relevant to this device..\n\nLink: https://patch.msgid.link/20261016073157.611956-1-val@packett.cool\n" }, { "commit": "32c9d661dab029348fcd389ca918402d341d2ff2", "tree": "3e047389ff1b6e63d11727d97edba7e97ad9e2d7", "parents": [ "a0f1887655af52892e4a9447f9434f286a7bce48" ], "author": { "name": "Val Packett", "email": "val@packett.cool", "time": "Fri Oct 16 04:31:52 2026 -0300" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:15:08 2026 +0100" }, "message": "ASoC: qcom: sm8250: Add motorola-dubai soundcard compatible\n\nAdd a compatible for the SM7325-based Motorola Edge 30 which can use this\nmachine driver.\n\nSigned-off-by: Val Packett \u003cval@packett.cool\u003e\nLink: https://patch.msgid.link/20261016073157.611956-5-val@packett.cool\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "a0f1887655af52892e4a9447f9434f286a7bce48", "tree": "2ccd83da56ca55d19b26f2e2b7e50c1998af1bab", "parents": [ "41c6eb15291fe201973561c293b44b19b6c2d595" ], "author": { "name": "Val Packett", "email": "val@packett.cool", "time": "Fri Oct 16 04:31:51 2026 -0300" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:15:08 2026 +0100" }, "message": "ASoC: dt-bindings: qcom,sm8250: Add Motorola Edge 30 sound card\n\nDocument the bindings for the sound card on motorola-dubai which uses the\nElite DSP architecture.\n\nSigned-off-by: Val Packett \u003cval@packett.cool\u003e\nLink: https://patch.msgid.link/20261016073157.611956-4-val@packett.cool\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "41c6eb15291fe201973561c293b44b19b6c2d595", "tree": "7e6e08822cc164acb6e6b34e3c7bd8133209ab11", "parents": [ "2b20c976bb630905993d47699085462a477bc7b6" ], "author": { "name": "Val Packett", "email": "val@packett.cool", "time": "Fri Oct 16 04:31:50 2026 -0300" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:15:08 2026 +0100" }, "message": "ASoC: qcom: sm8250: add Senary MI2S RX support\n\nAdd support for the SENARY_MI2S_RX DAI which is used on some devices to\nsend audio data to speaker amplifiers.\n\nReviewed-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nSigned-off-by: Val Packett \u003cval@packett.cool\u003e\nLink: https://patch.msgid.link/20261016073157.611956-3-val@packett.cool\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "2b20c976bb630905993d47699085462a477bc7b6", "tree": "7fe1906300c38381af47a1736e02c410c96ce38b", "parents": [ "ba982c33278c1fc739c8c220f410d6539de9d9b9" ], "author": { "name": "Val Packett", "email": "val@packett.cool", "time": "Fri Oct 16 04:31:49 2026 -0300" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:15:08 2026 +0100" }, "message": "ASoC: qcom: qdsp6: q6routing: add Senary MI2S ports\n\nThis commit adds support for senary MI2S mixers.\n\nReviewed-by: Srinivas Kandagatla \u003csrinivas.kandagatla@oss.qualcomm.com\u003e\nSigned-off-by: Val Packett \u003cval@packett.cool\u003e\nLink: https://patch.msgid.link/20261016073157.611956-2-val@packett.cool\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "5cb97cc86dd57c67976299639a3ec20dfd649e77", "tree": "4e6e72725ec011e904abde1bf4192b5723274f31", "parents": [ "8a4b7ffba62d1abd290f3170c6f6d84d80810f2f", "7308ce7c8459e994a36a22607e974e3e132a9275" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:13:43 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:13:43 2026 +0100" }, "message": "ASoC: codecs: Fix control definitions that write another control\u0027s register\n\nHyeongJun An \u003csammiee5311@gmail.com\u003e says:\n\nThese are more fixes found by the overlap scan from the first series\n[1]. In each driver a control writes the register of another control.\n\n[1] https://lore.kernel.org/all/20261008130953.2446692-1-sammiee5311@gmail.com/\n\nLink: https://patch.msgid.link/cover.1792135144.git.sammiee5311@gmail.com\n" }, { "commit": "7308ce7c8459e994a36a22607e974e3e132a9275", "tree": "aa0ddacecb31fc241100a1fe72e3a1d715d33ffe", "parents": [ "ea53ab9003d8655cf7e94428de3006e86fbd06a0" ], "author": { "name": "HyeongJun An", "email": "sammiee5311@gmail.com", "time": "Fri Oct 16 16:25:19 2026 +0900" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:13:43 2026 +0100" }, "message": "ASoC: codecs: sta350: Fix definition of Ch2 and Ch3 Volume Bypass controls\n\nEach channel\u0027s master volume bypass (CxVBP) is in its own\nconfiguration register, C2CFG and C3CFG, not in C1CFG, which holds the\nchannel 1 bit.\n\nFixes: 2439ea1f0f8f (\"ASoC: sta350: Add codec driver\")\nAssisted-by: Claude:claude-opus-5-5\nSigned-off-by: HyeongJun An \u003csammiee5311@gmail.com\u003e\nLink: https://patch.msgid.link/1107a42a563459b26038bdff4d8f6e2423816d0a.1792135144.git.sammiee5311@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "ea53ab9003d8655cf7e94428de3006e86fbd06a0", "tree": "89ce615cf3ecdfc5d39ffe3c556e6972695e0083", "parents": [ "0a9efcb663b5a4d468cbb90de29c6dd3794af124" ], "author": { "name": "HyeongJun An", "email": "sammiee5311@gmail.com", "time": "Fri Oct 16 16:25:18 2026 +0900" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:13:42 2026 +0100" }, "message": "ASoC: codecs: sta32x: Fix definition of Ch2 and Ch3 Volume Bypass controls\n\nEach channel\u0027s master volume bypass (CxVBP) is in its own\nconfiguration register, C2CFG and C3CFG, not in C1CFG, which holds the\nchannel 1 bit.\n\nFixes: c034abf6e503 (\"ASoC: add STA32X codec driver\")\nAssisted-by: Claude:claude-opus-5-5\nSigned-off-by: HyeongJun An \u003csammiee5311@gmail.com\u003e\nLink: https://patch.msgid.link/8576f091aa0fe172ce43f28dacd6a1bf638258c6.1792135144.git.sammiee5311@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "0a9efcb663b5a4d468cbb90de29c6dd3794af124", "tree": "39051846e9e92314f53ccc986d6cd38b98a0c02c", "parents": [ "ebef9212cb469706e28002a20f9d48307d1fd867" ], "author": { "name": "HyeongJun An", "email": "sammiee5311@gmail.com", "time": "Fri Oct 16 16:25:17 2026 +0900" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:13:42 2026 +0100" }, "message": "ASoC: codecs: tlv320adc3xxx: Fix definition of AGC Target Level control\n\nThe right channel AGC target level is in RIGHT_CHN_AGC_1, as on the\nleft, not in RIGHT_CHN_AGC_2, which holds the right noise threshold\nand hysteresis.\n\nFixes: e9a3b57efd28 (\"ASoC: codec: tlv320adc3xxx: New codec driver\")\nAssisted-by: Claude:claude-opus-5-5\nSigned-off-by: HyeongJun An \u003csammiee5311@gmail.com\u003e\nLink: https://patch.msgid.link/09cad9ec9bb382e44cad079a680bdf0f6163567e.1792135144.git.sammiee5311@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "ebef9212cb469706e28002a20f9d48307d1fd867", "tree": "feabed705ab5e2a1f87b92c7af194e162303beeb", "parents": [ "8bb622708387f7c6ef3e7a0c1fdf018f67aea7f7" ], "author": { "name": "HyeongJun An", "email": "sammiee5311@gmail.com", "time": "Fri Oct 16 16:25:16 2026 +0900" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:13:42 2026 +0100" }, "message": "ASoC: codecs: da732x: Fix definition of ADC2 EQ Overall Volume control\n\nThe ADC2 EQ overall volume is in DA732X_REG_ADC2_EQ5 (0x9F), not in\nDA732X_REG_ADC1_EQ5 (0x97), which holds the ADC1 one.\n\nFixes: 48e278746070 (\"ASoC: codecs: Add DA732x codec driver\")\nAssisted-by: Claude:claude-opus-5-5\nSigned-off-by: HyeongJun An \u003csammiee5311@gmail.com\u003e\nLink: https://patch.msgid.link/35bae3f84cdc3ceb6ca412153f44dee3647fdbd6.1792135144.git.sammiee5311@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "8a4b7ffba62d1abd290f3170c6f6d84d80810f2f", "tree": "61875dccd7dec365aca817c762b6222f6290de2e", "parents": [ "ba982c33278c1fc739c8c220f410d6539de9d9b9", "48ed45aa30ced064b3425be777028aa3bd0ce423" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:32 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:32 2026 +0100" }, "message": "ASoC: Address remaining PCM constraint issues\n\nbui duc phuc \u003cphucduc.bui@gmail.com\u003e says:\n\nSince v1 has already been applied, this series provides incremental\nchanges to address the remaining items from v2:\n - Add comments explaining why .open() and .startup() must return 0\n on success to prevent the issue from being reintroduced.\n - Add Reviewed-by tags from Vijendar Mukunda and Chancel Liu,\n and Acked-by tags from Morimoto-san and Cezary.\n - Remove redundant integer constraints already applied\n by snd_dmaengine_pcm_open().\n\nLink v1:\nhttps://lore.kernel.org/all/20261008103831.542533-1-phucduc.bui@gmail.com/\nLink v2:\nhttps://lore.kernel.org/all/20261015014324.5569-1-phucduc.bui@gmail.com/\n\nCompile-tested only.\n\nLink: https://patch.msgid.link/20261016040946.521195-1-phucduc.bui@gmail.com\n" }, { "commit": "48ed45aa30ced064b3425be777028aa3bd0ce423", "tree": "0796b9da6c36eb5d4eeb37bcf7ea7a1c3446fc62", "parents": [ "a0b64de6ea7e086f64ce97dec61e6639b334e13f" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:46 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:31 2026 +0100" }, "message": "ASoC: rockchip: Explain DAI link startup return value handling\n\nAdd comments explaining why the .startup() callbacks must return\n0 on success to ensure the DAI link is correctly marked as started\nand prevent future changes from reintroducing the issue.\n\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-12-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "a0b64de6ea7e086f64ce97dec61e6639b334e13f", "tree": "291df5683794f74dbd5c0d8fbd3efdf06066e79d", "parents": [ "65850cb2f9ce16a19c739e119a902927f3841c11" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:45 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:31 2026 +0100" }, "message": "ASoC: renesas: rz-ssi: Remove redundant component open callback\n\nIn DMA mode, the generic dmaengine PCM component already applies\nthe integer PERIODS constraint in snd_dmaengine_pcm_open().\n\nSince rz_ssi_pcm_open_dma() only applies this constraint, remove\nthe redundant component .open callback.\n\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-11-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "65850cb2f9ce16a19c739e119a902927f3841c11", "tree": "d383954b290b720060eb74febb175393e81252cd", "parents": [ "d2f4c848d0103027b16c4ed5171f3669031a69d4" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:44 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:31 2026 +0100" }, "message": "ASoC: renesas: rz-ssi: Explain component open return value handling\n\nAdd a comment explaining why .open() must return 0 on success\nto ensure the component is correctly marked as opened and\nprevent future changes from reintroducing the issue.\n\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-10-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "d2f4c848d0103027b16c4ed5171f3669031a69d4", "tree": "d03564902be8e0efb261fb29a97b8c80ae3c4388", "parents": [ "394f91bd0f7a3770201a53a104d37ca6a53b4df3" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:43 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:31 2026 +0100" }, "message": "ASoC: renesas: msiof: Remove redundant period constraint\n\nsnd_pcm_hw_constraint_integer() is already called by\nsnd_dmaengine_pcm_open(). Calling it again in msiof_open() is\nunnecessary, as the constraint is already applied and the second\ncall returns 0.\n\nRemove the redundant constraint call.\n\nAcked-by: Kuninori Morimoto \u003ckuninori.morimoto.gx@renesas.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-9-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "394f91bd0f7a3770201a53a104d37ca6a53b4df3", "tree": "f11d186bff8a50b18290d71938b7173d1d8cee39", "parents": [ "2f8d93394b7fe6af629760aca368bc55af7b2919" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:42 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:31 2026 +0100" }, "message": "ASoC: renesas: msiof: Explain component open return value handling\n\nAdd a comment explaining why .open() must return 0 on success\nto ensure the component is correctly marked as opened and\nprevent future changes from reintroducing the issue.\n\nAcked-by: Kuninori Morimoto \u003ckuninori.morimoto.gx@renesas.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-8-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "2f8d93394b7fe6af629760aca368bc55af7b2919", "tree": "6b5d8fbfdfc4f3190baa5efa85412f455c768103", "parents": [ "f3e3dbbbbfd6139a05f96c628a694df590b439cd" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:41 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:31 2026 +0100" }, "message": "ASoC: intel: atom: Explain DAI startup return value handling\n\nAdd a comment explaining why .startup() must return 0 on success\nto ensure proper rollback handling and prevent future changes\nfrom reintroducing the issue.\n\nAcked-by: Cezary Rojewski \u003ccezary.rojewski@intel.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-7-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "f3e3dbbbbfd6139a05f96c628a694df590b439cd", "tree": "b0ae73c5de6c70ab9af5c74573971f81eb8c1ba4", "parents": [ "a6b1f3ccca48f9aefcbb6f09487931064a1ebe76" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:40 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:31 2026 +0100" }, "message": "ASoC: imx-pcm-rpmsg: Explain component open return value handling\n\nAdd a comment explaining why .open() must return 0 on success\nto ensure proper rollback handling and prevent future changes\nfrom reintroducing the issue.\n\nReviewed-by: Chancel Liu \u003cchancel.liu@gmail.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-6-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "a6b1f3ccca48f9aefcbb6f09487931064a1ebe76", "tree": "365fc3b19a67e63898951599aa938f1efa87301d", "parents": [ "1554ce7a5d9972780c8ebdddfc78299a107a50d8" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:39 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:31 2026 +0100" }, "message": "ASoC: codecs: Explain DAI startup return value handling\n\nAdd comments explaining why the .startup() callbacks must return\n0 on success to ensure the DAI is correctly marked as started\nand prevent future changes from reintroducing the issue.\n\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nReviewed-by: Charles Keepax \u003cckeepax@opensource.cirrus.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-5-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "1554ce7a5d9972780c8ebdddfc78299a107a50d8", "tree": "bd950dfc1c2360c9b304fd9d0fcd2b9c228378b1", "parents": [ "ec2e1434c7f78f59ef26d12d3ed6560de9202e6c" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:38 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:31 2026 +0100" }, "message": "ASoC: atmel: Explain component open return value handling\n\nAdd a comment explaining why .open() must return 0 on success\nto ensure proper rollback handling and prevent future changes\nfrom reintroducing the issue.\n\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-4-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "ec2e1434c7f78f59ef26d12d3ed6560de9202e6c", "tree": "7888e57b8c59595a841045cd32c8514dae7b9983", "parents": [ "1ba2cb30eeab2b9b9d576f87a80a750f04b4bfa7" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:37 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:31 2026 +0100" }, "message": "ASoC: apple: Explain DAI startup return value handling\n\nAdd a comment explaining why .startup() must return 0 on success\nto ensure the DAI is correctly marked as started and prevent\nfuture changes from reintroducing the issue.\n\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-3-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "1ba2cb30eeab2b9b9d576f87a80a750f04b4bfa7", "tree": "43656d74532b5816fea6a108e11a08430d3ff04f", "parents": [ "303961c7daf1ce87848fa17260cd307577850461" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Fri Oct 16 11:09:36 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 22:12:30 2026 +0100" }, "message": "ASoC: amd: Explain component open return value handling\n\nAdd comments explaining why the .open() callbacks must return 0\non success to ensure proper rollback handling and prevent future\nchanges from reintroducing the issue.\n\nReviewed-by: Vijendar Mukunda \u003cVijendar.Mukunda@amd.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261016040946.521195-2-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "ba982c33278c1fc739c8c220f410d6539de9d9b9", "tree": "d58e684cfe85c53810b67d7b7ae69c445ce319e5", "parents": [ "fcea06d4598ed7072dc201bd659a2f253a514fb6" ], "author": { "name": "Jack Yu", "email": "jack.yu@realtek.com", "time": "Fri Oct 16 16:22:43 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 13:58:53 2026 +0100" }, "message": "ASoC: rt721-sdca: Fix inconsistent indenting in jack detect handler\n\nSmatch warns about inconsistent indenting in\nrt721_sdca_jack_detect_handler(): the rt_sdca_index_read() call that\nsamples the JD pin state, and the following mask of real_JD, are\nindented one level deeper than the surrounding statements, so they\nlook like part of the preceding block although they are not.\n\nRe-indent them to match the rest of the block. No functional change.\n\nFixes: e2eb4873b901 (\"ASoC: rt721-sdca: Adjust blindwrite flow to fix type detection issue\")\nReported-by: kernel test robot \u003clkp@intel.com\u003e\nCloses: https://lore.kernel.org/oe-kbuild-all/202610080041.JAcitVQd-lkp@intel.com/\n\nSigned-off-by: Jack Yu \u003cjack.yu@realtek.com\u003e\nLink: https://patch.msgid.link/20261016082243.1352940-1-jack.yu@realtek.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "fcea06d4598ed7072dc201bd659a2f253a514fb6", "tree": "8460a3ed723a462d877b4c7d828d45e84e3d12dd", "parents": [ "38cb2ef26b6411277826da54c6bcf94523541058" ], "author": { "name": "Zhang Heng", "email": "zhangheng@kylinos.cn", "time": "Fri Oct 16 20:40:30 2026 +0800" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 13:57:53 2026 +0100" }, "message": "ASoC: amd: yc: Add DMI quirk for MSI Alpha 17 C7VF\n\nThe DMIC does not work on the MSI Alpha 17 C7VF because the ACP6x\nmachine driver lacks a matching DMI quirk. Add the DMI entry so the\ndriver binds correctly and the DMIC is functional.\n\nCloses: https://bugzilla.kernel.org/show_bug.cgi?id\u003d222112\nSigned-off-by: Zhang Heng \u003czhangheng@kylinos.cn\u003e\nLink: https://patch.msgid.link/20261016124030.664895-1-zhangheng@kylinos.cn\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "38cb2ef26b6411277826da54c6bcf94523541058", "tree": "5833c83b1d3bca9af1532072003ec58690facde4", "parents": [ "8bb622708387f7c6ef3e7a0c1fdf018f67aea7f7" ], "author": { "name": "Art O Cathain", "email": "art.home@gmail.com", "time": "Fri Oct 16 11:29:30 2026 +0200" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Fri Oct 16 13:12:11 2026 +0100" }, "message": "ASoC: amd: acp-config: force SoundWire probe on Dell 14S DS14265\n\nThe BIOS on the Dell 14S DS14265 (ACP PCI revision 0x72) reports\nacp-audio-config-flag \u003d FLAG_AMD_LEGACY_ONLY_DMIC. As a result\nsnd_pci_ps returns early and the SoundWire links are never scanned,\nwhile the legacy snd_acp_pci driver probes the device, finds no\nmatching machine driver (\"No matching ASoC machine driver found\") and\nno internal sound card is created. The CS42L45 headset codec on link 0\nand the two CS35L63 speaker amplifiers on link 1 never enumerate.\n\nAdd a DMI entry for the model to the ACP70 ACPI flag override table so\nthe firmware-provided flag is overridden and snd_pci_ps probes instead.\nMatch on the product name rather than the board name, as the same\nsymptom has been reported on several boards of this model (09PVND,\n0M0J65, 0C7F12).\n\nTested on a DS14265 (board 09PVND, BIOS 1.5.3) with Debian\u0027s 7.2.6\nkernel, with and without this entry. With it, snd_pci_ps binds, both\nSoundWire links come up, the CS42L45 and both CS35L63 enumerate, the\nexisting CS42L45 + 2x CS35L63 machine entry matches, the amplifiers\nload their firmware and calibration, and the amd-soundwire card plays\nthrough both the internal speakers and the headphone jack. Also\nbuild-tested on asoc-next with W\u003d1.\n\nDeveloped with AI assistance. Claude read the ACP driver source,\nidentified the BIOS flag as the cause and the override table as the\nfix, wrote the DMI entry and the out-of-tree test module, and drafted\nthis changelog. All hardware testing was done by the submitter, who\nhas reviewed the change, understands it and takes responsibility for\nit.\n\nCc: stable@vger.kernel.org\nAssisted-by: Claude:claude-opus-5-5\nSigned-off-by: Art O Cathain \u003cart.home@gmail.com\u003e\nReviewed-by: Vijendar Mukunda \u003cVijendar.Mukunda@amd.com\u003e\nLink: https://patch.msgid.link/20261016-dell-14s-acp-v1-1-89b40d95720c@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "8bb622708387f7c6ef3e7a0c1fdf018f67aea7f7", "tree": "ac6bef21643b20fda72c28df25b2123843dd529e", "parents": [ "5c92a5c561d5a0f1923724c240b9796a28537b4b", "a4276a80c62e773829925b24c5269b47ca54b131" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:10 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:10 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix clock error handling\n\nbui duc phuc \u003cphucduc.bui@gmail.com\u003e says:\n\nThis series improves error handling in the MT8195 ASoC driver,\nmainly by checking and propagating errors from clock operations.\n\nCompile-tested only.\n\nLink: https://patch.msgid.link/20261014112752.683032-1-phucduc.bui@gmail.com\n" }, { "commit": "a4276a80c62e773829925b24c5269b47ca54b131", "tree": "213bfe57089acdd035297b0d5f4046bb58346779", "parents": [ "ca3ac9a7eec1884bfff2d2dd92caf30f86a9eea7" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:51 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:09 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix clock parent error handling\n\nmtk_audio_hires_event() ignores the return value of\nmt8195_afe_set_clk_parent(), so a failure to set the clock parent\ngoes unnoticed.\n\nReturn the error so that the DAPM core reports it.\n\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-17-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "ca3ac9a7eec1884bfff2d2dd92caf30f86a9eea7", "tree": "39f039c3eb2f87bdb20a2494084f2fbe7f83df98", "parents": [ "1d6f1785d90334b66809a57ebfc40a5b1cfa80ec" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:50 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:09 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix ETDM probe error handling\n\nUse pm_runtime_resume_and_get() to properly handle runtime PM errors\nduring ETDM probe.\n\nPropagate errors from MCLK configuration and enabling instead of\nignoring them.\n\nFixes: 1de9a54acafb (\"ASoC: mediatek: mt8195: support etdm in platform driver\")\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-16-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "1d6f1785d90334b66809a57ebfc40a5b1cfa80ec", "tree": "b19374e94f9e35ad55cf4c56d537cdfd4fbeef38", "parents": [ "8e67c67f3fd2505b8b7a9dd38d8dabe47273490d" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:49 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:08 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix HDMI TX startup error handling\n\nCheck and propagate errors when enabling the clock gate and MCLK\nduring HDMI TX/DP TX startup.\n\nIf MCLK enabling fails, disable the clock gate that was already\nenabled before returning the error.\n\nFixes: 1de9a54acafb (\"ASoC: mediatek: mt8195: support etdm in platform driver\")\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-15-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "8e67c67f3fd2505b8b7a9dd38d8dabe47273490d", "tree": "93f9ba252ba1790f050d2d4d93b34040e79a74a7", "parents": [ "91dce9c7eec25e95b5ca32e17e60e2c27333d411" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:48 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:08 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix ETDM startup error handling\n\nCheck and propagate errors when enabling the ETDM MCLK and clock\ngates during startup.\n\nIf enabling a clock fails, disable the clocks that were already\nenabled to keep the clock state balanced.\n\nFixes: 1de9a54acafb (\"ASoC: mediatek: mt8195: support etdm in platform driver\")\nReviewed-by: Ajay Kumar Nandam \u003cajay.nandam@oss.qualcomm.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-14-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "91dce9c7eec25e95b5ca32e17e60e2c27333d411", "tree": "74c5ba59cc256848fa4d553e084f6908bb7841b2", "parents": [ "9d5dedb285fb61a40e04f337d9e06fc59c065857" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:47 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:07 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix ETDM MCLK error handling\n\nPropagate errors from mt8195_afe_enable_clk() when enabling the\nETDM MCLK instead of always returning success.\n\nThis allows callers to properly handle failures when enabling the\nMCLK.\n\nFixes: 1de9a54acafb (\"ASoC: mediatek: mt8195: support etdm in platform driver\")\nReviewed-by: Ajay Kumar Nandam \u003cajay.nandam@oss.qualcomm.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-13-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "9d5dedb285fb61a40e04f337d9e06fc59c065857", "tree": "5058b45a100b8ff1d80f8935ac854fb955342b81", "parents": [ "9f9ba582ac82b7b1584308a1978b3e2e890080fc" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:46 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:07 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Propagate IRQ lookup errors\n\nPropagate the error returned by platform_get_irq() instead of\nreplacing it with -ENXIO.\n\nThis preserves errors such as -EPROBE_DEFER for proper handling\nby the caller.\n\nFixes: 6746cc858259 (\"ASoC: mediatek: mt8195: add platform driver\")\nReviewed-by: Ajay Kumar Nandam \u003cajay.nandam@oss.qualcomm.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-12-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "9f9ba582ac82b7b1584308a1978b3e2e890080fc", "tree": "0d4eb6741ff89fb0826d9dec4a0d5ca3fd4aa3e6", "parents": [ "933fbfb6648850e003a1fc47b7bcc08fe3687961" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:45 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:06 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Remove redundant error message\n\nThe errors handled here are already reported by the called functions,\neither directly or deeper in the call chain. Therefore, the additional\ndev_warn() and dev_err_probe() call is redundant and can be removed.\n\nReviewed-by: Ajay Kumar Nandam \u003cajay.nandam@oss.qualcomm.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-11-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "933fbfb6648850e003a1fc47b7bcc08fe3687961", "tree": "81cc52ed9ed236b857ccc5642444f34eef937b54", "parents": [ "a2ae972c75a18ecbdcbf331ddaab21e1a08333fb" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:44 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:06 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix runtime resume error handling\n\nCheck and propagate errors when enabling the register access and main\nclocks during runtime resume.\n\nIf regcache_sync() or main clock enable fails, restore regmap cache-only\nmode and disable the register access clocks before returning the error.\n\nFixes: 6746cc858259 (\"ASoC: mediatek: mt8195: add platform driver\")\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-10-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "a2ae972c75a18ecbdcbf331ddaab21e1a08333fb", "tree": "52cc99954ab5bc7fae738e84b804f3d07662cc77", "parents": [ "b1db7408c8e0761d17b49b74f8f2d60c0c1929e8" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:43 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:06 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Check paired MEMIF clock enable in FE trigger\n\nCheck the return value of mt8195_afe_paired_memif_clk_enable() on\nSTART/RESUME. On failure, stop the MEMIF and disable the channel\nmerge before returning the error.\n\nAlso skip enabling the paired clock if mtk_afe_fe_trigger() fails.\n\nFixes: 6746cc858259 (\"ASoC: mediatek: mt8195: add platform driver\")\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-9-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "b1db7408c8e0761d17b49b74f8f2d60c0c1929e8", "tree": "9184b7190b43913785689a3417e6d69b86069147", "parents": [ "c0ec135cf3fd7c7c7cdefd234111e5d4f069a7e6" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:42 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:05 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix FE startup error handling\n\nCheck and propagate errors from paired memif clock preparation and\nPCM hardware constraints during FE startup.\n\nUnprepare the paired memif clocks and shut down the FE when a later\nstartup step fails to avoid leaving resources enabled on error.\n\nFixes: 6746cc858259 (\"ASoC: mediatek: mt8195: add platform driver\")\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-8-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "c0ec135cf3fd7c7c7cdefd234111e5d4f069a7e6", "tree": "aff0e89bf099fba5ccce1ebd1dc74c1b06c8ed1f", "parents": [ "9f1b48c658ac38be81c04fbc29ed1522f89fb0c9" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:41 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:05 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix paired memif clock error handling\n\nCheck and propagate errors when preparing and enabling the paired\nDL8/DL10 memif clocks.\n\nIf enabling the second clock fails, undo the clock that was already\nprepared or enabled to keep the clock state balanced.\n\nFixes: 6746cc858259 (\"ASoC: mediatek: mt8195: add platform driver\")\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-7-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "9f1b48c658ac38be81c04fbc29ed1522f89fb0c9", "tree": "2aaea8966c81bbdae1dd9f29ea5d45e787bf4b7b", "parents": [ "f18c0a8e528eb8844ee362324220ab8df3664afe" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:40 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:05 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix main clock error handling\n\nCheck the return values of clock enable functions and propagate\nerrors to the caller.\n\nDisable previously enabled clocks on failure to match the\nmain clock disable sequence.\n\nFixes: 6746cc858259 (\"ASoC: mediatek: mt8195: add platform driver\")\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-6-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "f18c0a8e528eb8844ee362324220ab8df3664afe", "tree": "90670d3322616e4e2e374bd8904d7968050dab2e", "parents": [ "c23390ecf5c068976f25d9c8bfa8e298fa12ea3d" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:39 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:04 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix timing system clock error handling\n\nCheck the return value of mt8195_afe_enable_clk() when enabling the\ntiming system clocks.\n\nIf enabling a clock fails, disable the clocks that were already\nenabled and propagate the error to the caller. In\nmt8195_afe_enable_main_clock(), return the error instead of continuing\nwith AFE clock enable.\n\nFixes: 6746cc858259 (\"ASoC: mediatek: mt8195: add platform driver\")\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-5-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "c23390ecf5c068976f25d9c8bfa8e298fa12ea3d", "tree": "f5b461d9bc03d457287482e82d3d74d2391b785a", "parents": [ "ad1617e536092e53c65687e744b1820602e61fd8" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:38 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:04 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix register access clock error handling\n\nCheck the return value of mt8195_afe_enable_clk() when enabling the\nregister access clocks.\n\nIf enabling a clock fails, disable the clocks that were already\nenabled and propagate the error to the caller\n\nFixes: 6746cc858259 (\"ASoC: mediatek: mt8195: add platform driver\")\nReviewed-by: Ajay Kumar Nandam \u003cajay.nandam@oss.qualcomm.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-4-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "ad1617e536092e53c65687e744b1820602e61fd8", "tree": "368dd3e4d6ec83d784b0b65c789bfa1ebefd525b", "parents": [ "8e5a2eabb0d7cbd6db0b94f7f30e1ca2c0a8994f" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:37 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:03 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Use dev_err_probe() in mt8195_afe_init_clock()\n\nUse dev_err_probe() when obtaining clocks to avoid redundant error\nmessages, particularly for probe deferral.\n\nReviewed-by: Ajay Kumar Nandam \u003cajay.nandam@oss.qualcomm.com\u003e\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-3-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "8e5a2eabb0d7cbd6db0b94f7f30e1ca2c0a8994f", "tree": "c5bdd8316646eb2c3a8c759cc3888dda3a6f76bc", "parents": [ "4169b6a5cdd350a6ad47525ec117eb887234b5f5" ], "author": { "name": "bui duc phuc", "email": "phucduc.bui@gmail.com", "time": "Wed Oct 14 18:27:36 2026 +0700" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:20:03 2026 +0100" }, "message": "ASoC: mediatek: mt8195: Fix tuner clock error handling\n\nCheck and propagate errors from mt8195_afe_enable_clk(). If enabling\nthe tuner clock fails, disable the previously enabled APLL clock.\n\nFixes: ff5a90173d98 (\"ASoC: mediatek: mt8195: enable apll tuner\")\nSigned-off-by: bui duc phuc \u003cphucduc.bui@gmail.com\u003e\nLink: https://patch.msgid.link/20261014112752.683032-2-phucduc.bui@gmail.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "5c92a5c561d5a0f1923724c240b9796a28537b4b", "tree": "3b1dc46590e0dec57fca5284bd8f76316228e912", "parents": [ "f500b6437f205dc824d3045c109f5f9ca377b3cb", "19224d29ffb4e341400cbfcafe07b19a2af97b72" ], "author": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:13:23 2026 +0100" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:13:23 2026 +0100" }, "message": "ASoC: soc-component: move snd_soc_component_xxx() to soc-component.c\n\nKuninori Morimoto \u003ckuninori.morimoto.gx@renesas.com\u003e says:\n\nI\u0027m now posting ASoC Capsuling patches.\nCurrent status, and this patch-set postion is below.\nThis patch-set moves Component related functions to soc-component.c\n\nx: done\no: This patch-set\n\n[x] move DAI functions\n[x] add new DAI functions\n[o] move Component functions\n[ ] move Card functions\n[ ] add new Component functions\n[ ] rename DAI/Component list\n[ ] move Card functions\n[ ] add new Card functions\n[ ] adjust Test\n[ ] use new Card register\n[ ] use new functions on all drivers\n[ ] Capsule DAI/Component/Card\n\nLink: https://patch.msgid.link/87pkxdyoml.wl-kuninori.morimoto.gx@renesas.com\n" }, { "commit": "19224d29ffb4e341400cbfcafe07b19a2af97b72", "tree": "0f6ce910adeaacbf271561b6fd911ad566fc7d51", "parents": [ "1fec554d55aa41830d7a3c54fce904bbff7e056f" ], "author": { "name": "Kuninori Morimoto", "email": "kuninori.morimoto.gx@renesas.com", "time": "Wed Oct 14 02:59:28 2026 +0000" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:13:22 2026 +0100" }, "message": "ASoC: soc-component: rename snd_soc_component_async_complete()\n\nsnd_soc_component_async_complete() is regmap related function.\nLet\u0027s add _regmap_ on function name.\n\nIt renames function name\n-\tsnd_soc_component_async_complete()\n+\tsnd_soc_component_regmap_async_complete()\n\nSigned-off-by: Kuninori Morimoto \u003ckuninori.morimoto.gx@renesas.com\u003e\nReviewed-by: Alvin Šipraga \u003calvin.sipraga@analog.com\u003e\nLink: https://patch.msgid.link/877bjlyokw.wl-kuninori.morimoto.gx@renesas.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "1fec554d55aa41830d7a3c54fce904bbff7e056f", "tree": "219d8fc0d3c25248e6fc97f9c3911c8f237f0ec1", "parents": [ "8c186bc6b77be4913f5869a68d547dc52976fa9d" ], "author": { "name": "Kuninori Morimoto", "email": "kuninori.morimoto.gx@renesas.com", "time": "Wed Oct 14 02:59:24 2026 +0000" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:13:21 2026 +0100" }, "message": "ASoC: soc-component: move snd_soc_lookup_component() to soc-component.c\n\nstruct snd_soc_component will be capsuled soon, its member will not be\nable to access from non soc-component.c.\n\nMove snd_soc_lookup_component() to soc-component.c\n\nIt renames function name\n\tsnd_soc_lookup_component_nolocked()\t-\u003e snd_soc_component_lookup_nolock()\n\tsnd_soc_lookup_component()\t\t-\u003e snd_soc_component_lookup()\n\tsnd_soc_lookup_component_by_name()\t-\u003e snd_soc_component_lookup_by_name()\n\nSigned-off-by: Kuninori Morimoto \u003ckuninori.morimoto.gx@renesas.com\u003e\nReviewed-by: Alvin Šipraga \u003calvin.sipraga@analog.com\u003e\nLink: https://patch.msgid.link/878q41yokz.wl-kuninori.morimoto.gx@renesas.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" }, { "commit": "8c186bc6b77be4913f5869a68d547dc52976fa9d", "tree": "d63ecf0291fdfe722c28795929194378a985ddc0", "parents": [ "614749f16e94a23f0c46fb04f694f9415540d394" ], "author": { "name": "Kuninori Morimoto", "email": "kuninori.morimoto.gx@renesas.com", "time": "Wed Oct 14 02:59:21 2026 +0000" }, "committer": { "name": "Mark Brown", "email": "broonie@kernel.org", "time": "Thu Oct 15 23:13:21 2026 +0100" }, "message": "ASoC: soc-component: move component_list to soc-component.c\n\nstruct snd_soc_component will be capsuled soon, its member will not be\nable to access from non soc-component.c.\n\nMove component_list to soc-component.c\n\nSigned-off-by: Kuninori Morimoto \u003ckuninori.morimoto.gx@renesas.com\u003e\nReviewed-by: Alvin Šipraga \u003calvin.sipraga@analog.com\u003e\nLink: https://patch.msgid.link/87a4ohyol2.wl-kuninori.morimoto.gx@renesas.com\nSigned-off-by: Mark Brown \u003cbroonie@kernel.org\u003e\n" } ], "next": "614749f16e94a23f0c46fb04f694f9415540d394" }