IXP4xx: Fix LE data-coherent mode.

Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 486a15a..d8e3c71 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -273,6 +273,9 @@
 	add	r0, r4, r3
 	mov	r3, r7, lsr #SECTION_SHIFT
 	ldr	r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
+#if defined(CONFIG_ARCH_IXP4XX) && defined(CONFIG_CPU_LITTLE_ENDIAN_DATA_COHERENT)
+	and	r7, r7, #~0x200			@ P bit - region is value-coherent
+#endif
 	orr	r3, r7, r3, lsl #SECTION_SHIFT
 #ifdef CONFIG_ARM_LPAE
 	mov	r7, #1 << (54 - 32)		@ XN
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index 71b8484..7a7d287 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -27,7 +27,7 @@
 #include "ixp4xx-regs.h"
 
 #ifdef CONFIG_CPU_LITTLE_ENDIAN_DATA_COHERENT
-#define MEM_VALUE_COHERENT_BASE_VIRT 0xFFA00000
+#define MEM_VALUE_COHERENT_BASE_VIRT 0xFEE00000
 #define MEM_VALUE_COHERENT_ADDR_MASK 0xFFE00000 /* 2 MB */
 #endif