)]}'
{
  "log": [
    {
      "commit": "5f139826c76eff88d48fd9b4a4155ba47338af5f",
      "tree": "f3d78451c7f8f98992b727376bd081cdcf0c8983",
      "parents": [
        "50c387fdce005e2496517bca6684248e5bb7a9b7"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Sep 10 10:48:16 2021 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Sep 10 10:48:16 2021 +0100"
      },
      "message": "asidalloc: Fix inadvertently removed line from UniqueASIDActiveTask\n\nA previous commit inadvertently removed the implication line in the\nUniqueASIDActiveTask invariant. Add it back.\n\nFixes: 50c387fdce00 (\"asidalloc: Model PTEs and an asynchronous try_to_unmap_one() call\")\nReported-by: Shameerali Kolothum Thodi \u003cshameerali.kolothum.thodi@huawei.com\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "50c387fdce005e2496517bca6684248e5bb7a9b7",
      "tree": "dd83939d50110a32691d49164eb28743f3e1e937",
      "parents": [
        "0278effeedd3fc6d2a951983e9d0859f5fbf97c5"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Aug 05 10:23:34 2021 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Aug 05 10:46:32 2021 +0100"
      },
      "message": "asidalloc: Model PTEs and an asynchronous try_to_unmap_one() call\n\nFollowing a kernel bug where try_to_unmap_one() may race with the ASID\nroll-over and invalidate the VA corresponding to the unmapped PTE using\nthe old ASID, update the model to capture this scenario and the correct\nkernel behaviour.\n\nReported-by: Will Deacon \u003cwill@kernel.org\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "0278effeedd3fc6d2a951983e9d0859f5fbf97c5",
      "tree": "99e99df5f001516a2eb6a4b7ec2577f7b9f4aa1d",
      "parents": [
        "49bc145ce3a1b2d246915061fa0e98726765df44"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Oct 15 16:44:18 2020 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Oct 15 16:44:18 2020 +0100"
      },
      "message": "fpsimd: Termination added by PlusCal\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "49bc145ce3a1b2d246915061fa0e98726765df44",
      "tree": "75588f0b214ba7790be7dbf2d08ab8954dc35767",
      "parents": [
        "7d90d0772d3fd43e92162ac75438331bbcd66bdc"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Oct 15 16:42:01 2020 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Oct 15 16:42:01 2020 +0100"
      },
      "message": "Add fpsimd.tla to README\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "7d90d0772d3fd43e92162ac75438331bbcd66bdc",
      "tree": "ed20a55b1d2c2e06029c9716fa35436a24655d50",
      "parents": [
        "efdeef93402b5766911f06447154b8a781d9e8a6"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Oct 15 16:40:10 2020 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Oct 15 16:40:10 2020 +0100"
      },
      "message": "Change check.sh to use the TLA+ tools wrapper scripts\n\nAlso update README to point at the tla-bit project.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "efdeef93402b5766911f06447154b8a781d9e8a6",
      "tree": "479f4f1569ee8de2cdc13b5524c7c5b3e079ed2d",
      "parents": [
        "b62ac94f64d04f722d9f2595378a6faa76ae2204"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Aug 22 11:41:55 2019 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Sep 20 17:05:06 2019 +0100"
      },
      "message": "fpsimd: Add SVE support\n\nModel the SVE state access. Software signals are not handled yet.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "b62ac94f64d04f722d9f2595378a6faa76ae2204",
      "tree": "5ec97bc65987d5c3e240882ec4679fa71b698ff3",
      "parents": [
        "fd5db28de0eb2913c70cfc16f72d74ead8ea03a1"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Wed Aug 21 16:03:21 2019 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Wed Aug 21 16:06:28 2019 +0100"
      },
      "message": "fpsimd: Initial support for the kernel FPSIMD state tracking\n\nEmulate user threads, context switching, interrupts and access to the\nFPSIMD registers. This models the 5.3 kernel version but without SVE\nsupport and signal handling.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "fd5db28de0eb2913c70cfc16f72d74ead8ea03a1",
      "tree": "81b2e61d71bee9381b5dd5d05a522ed2600e8b94",
      "parents": [
        "ffaaad7a6aea638c7c36c0ce4c7ae3ad7f1caf68"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Tue Aug 20 11:14:25 2019 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Tue Aug 20 17:52:36 2019 +0100"
      },
      "message": "check.sh: Update variable parsing/splitting to use awk\n\nThis allows for greater flexibility on managing local variables as vars\nwill be split into:\n\nglobal_vars \u003d \u003c\u003c ... \u003e\u003e\nlocal_vars \u003d \u003c\u003c ... \u003e\u003e\nvars \u003d \u003c\u003c global_vars, local_vars, pc, stack \u003e\u003e\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "ffaaad7a6aea638c7c36c0ce4c7ae3ad7f1caf68",
      "tree": "35ffb999158c513cd36ab390c666647aef9c1623",
      "parents": [
        "3192561de7c8f40a7f9dd5ad7740fbd9fa09ce8c"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Mar 01 17:24:51 2019 +0000"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Mar 01 17:24:51 2019 +0000"
      },
      "message": "check.sh: Remove the java.activation module option\n\nThis is only necessary with slightly older version of TLA tools.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "3192561de7c8f40a7f9dd5ad7740fbd9fa09ce8c",
      "tree": "c3e2071426d051b19fbbf01f348f4fe4f6e9fb81",
      "parents": [
        "fc4503b81314924b7abaf291ca41fc4027786491"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Feb 07 16:12:48 2019 +0000"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Feb 07 16:12:48 2019 +0000"
      },
      "message": "Fix check.sh to deal with single-line \u0027vars\u0027 definition\n\nThe sed script replacing vars with proc_vars incorrectly handled\nsingle-line vars definition.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "fc4503b81314924b7abaf291ca41fc4027786491",
      "tree": "194fa8f209365f87d894aa3a02c9b8a13d2ea064",
      "parents": [
        "cc63c04bdbe980df6e0c92bb88154ff23068e121"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Jan 18 14:01:12 2019 +0000"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Jan 18 14:01:12 2019 +0000"
      },
      "message": "check.sh: Fix typo\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "cc63c04bdbe980df6e0c92bb88154ff23068e121",
      "tree": "509c0343110977e1236d613508425e74136608da",
      "parents": [
        "3a1aacf90e6a9d9404940a6ab0a00cd7eba7371f"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Mon Oct 01 17:11:22 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Mon Oct 01 17:11:22 2018 +0100"
      },
      "message": "check.sh: Add java option so that TLC still works with Java 10\n\nTLA+ tools bug to be subsequently fixed.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "3a1aacf90e6a9d9404940a6ab0a00cd7eba7371f",
      "tree": "3a4d1d8f2fb6dff2942797e592f08b9a6f5eb4e9",
      "parents": [
        "0b67a9ad08dfc2b55ef2201ba2094360ff914562"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Mon Oct 01 17:10:15 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Mon Oct 01 17:10:15 2018 +0100"
      },
      "message": "check.sh: Remove the tlc -cleanup option\n\nThis doesn\u0027t seem to work in the latest TLA+ tools if the states\ndirectory is not present.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "0b67a9ad08dfc2b55ef2201ba2094360ff914562",
      "tree": "130e89eed544b1e36e08488dfdb77ed880bbf14c",
      "parents": [
        "b22b2b0a098189482c496d43413a9e4c0b17f690"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 17:46:54 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 17:46:54 2018 +0100"
      },
      "message": "ctxsw: Add switch_mm() (a.k.a. activate_mm) call in exec_mmap()\n\nThe MMInv was updated to check whether a CPU mm is in the freemms list\nand the exec_mmap() model was updated accordingly.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "b22b2b0a098189482c496d43413a9e4c0b17f690",
      "tree": "abeff6cf2195be32b8e571a114612d92a5ed1c8e",
      "parents": [
        "5b1667786fbe8334d36acdec4c48f49ccb36e381"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 16:38:28 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 16:38:28 2018 +0100"
      },
      "message": "ctxsw: Replace some local variables with \u0027with\u0027 statements\n\nThis, together with some label removals, is aimed to reduce the state\nspace.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "5b1667786fbe8334d36acdec4c48f49ccb36e381",
      "tree": "14af9ddbd9939d49540ef1778f6c3d28bfdb7ebd",
      "parents": [
        "ac7564f4d649945cd492723c5cec4bd7678e5137"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 14:50:05 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 14:50:05 2018 +0100"
      },
      "message": "ctxsw: Introduce a task.state variable to track dead threads\n\nWith the change to interrupt handling and rescheduling, pc[self] #\n\"Done\" no longer tracks dead threads. This patch introduced a new\n\u0027state\u0027 variable. In addition, a new switch_to() macro is also added\nwhich marks the next thread running on a CPU.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "ac7564f4d649945cd492723c5cec4bd7678e5137",
      "tree": "e7b8b06763875ce3af1a0554971597a88cba7b5c",
      "parents": [
        "7a7c34936f0fd034905478f5731e4a7e8289a95e"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 14:48:42 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 14:48:42 2018 +0100"
      },
      "message": "ctxsw: Remove the sleep() macro\n\nThis is rather confusing, better use \"await Running(self)\" explicitly.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "7a7c34936f0fd034905478f5731e4a7e8289a95e",
      "tree": "b9722fd1b76c6a170b03cef66846e0a872bccbbd",
      "parents": [
        "4e461793535597d80c0af359ba7f9c2c7ec1ccae"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 14:46:53 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 14:46:53 2018 +0100"
      },
      "message": "ctxsw: Introduce proc_mm[] to keep track of the current mm on a CPU\n\nThe switching id done by a new switch_mm() macro.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "4e461793535597d80c0af359ba7f9c2c7ec1ccae",
      "tree": "b273bafe0fab99c6a687e75c533e89eb8302adee",
      "parents": [
        "0f8cf64b6733fffa795fef1b2b1f38873db5efd3"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 13:09:34 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 13:09:34 2018 +0100"
      },
      "message": "ctxsw: Introduce an IntCall() action\n\nThis replaces the explicit pc/stack manipulation in the Interrupt()\naction.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "0f8cf64b6733fffa795fef1b2b1f38873db5efd3",
      "tree": "4418030c28a9bed782a2162f12ff9f08b312c4a9",
      "parents": [
        "692d4a8b6cfe5eaada0ec0b200d67b10fb11e9e5"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 13:02:08 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 13:02:08 2018 +0100"
      },
      "message": "ctxsw: Move \u0027cpu\u0027 into the task structure\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "692d4a8b6cfe5eaada0ec0b200d67b10fb11e9e5",
      "tree": "0861deae8cd5980d750a2ef5e258cb17b7bf7e20",
      "parents": [
        "464c3a9c0f7bbfa260ac16287f1f347cd71492d0"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 12:37:17 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Aug 10 12:41:57 2018 +0100"
      },
      "message": "ctxsw: Re-write the idle thread and interrupt handling\n\nNow the interrupt (responsible for rescheduling) is injected by TLA+\ncode via PreemptNext which hijacks the \u0027pc\u0027 of the currently running\nthread. Note that the check.sh script was modified to extract\n\u0027proc_vars\u0027 out of \u0027vars\u0027 by removing \u0027pc\u0027 and \u0027stack\u0027\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "464c3a9c0f7bbfa260ac16287f1f347cd71492d0",
      "tree": "7e09255f06cfe3ecb787495dd1a69f811ee7765f",
      "parents": [
        "d4311248e9ef2b3e3ccef891a28c2afb4f6298b6"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Tue Aug 07 15:40:45 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Tue Aug 07 15:42:16 2018 +0100"
      },
      "message": "check.sh: Add sed script to extract proc_vars from vars\n\nThis is needed to be able to add a custom Next step which intercepts the\nexecution flow by modifying \u0027pc\u0027 and \u0027stack\u0027.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "d4311248e9ef2b3e3ccef891a28c2afb4f6298b6",
      "tree": "f92d56a971e8840fb92733b3f47998b2aab9efb3",
      "parents": [
        "b99340f3d7540986e7e646c5a7a5a39393b34c1e"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Aug 02 11:43:55 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Aug 02 11:43:55 2018 +0100"
      },
      "message": "arm64kpti: Speculative TLB walking as a separate process\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "b99340f3d7540986e7e646c5a7a5a39393b34c1e",
      "tree": "2130088033cf13eb748ec026d9b8e81bf37f12ea",
      "parents": [
        "92f30bcc46f364c51f69e9eaf8dd4857a1198eab"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Mon Apr 16 18:21:09 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Mon Apr 16 18:21:09 2018 +0100"
      },
      "message": "Initial commit of the arm64 Linux KPTI model\n\nModel of the arm64 Linux KPTI support, checking the TLB separation\n(page table and ASIDs) between user, kernel, EFI mapping and idmap.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "92f30bcc46f364c51f69e9eaf8dd4857a1198eab",
      "tree": "29fe7d84ccbc4ddbc633d3686f71dbd79e534e27",
      "parents": [
        "eeee4923e8225d1a646dc2a867be3703ea9379aa"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Apr 13 10:02:06 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Apr 13 10:02:06 2018 +0100"
      },
      "message": "qspinlock: Added bounded loop for the pending-\u003elocked handovers\n\nFollowing latest kernel patches, the queued_spin_lock_slowpath(), the\npending-\u003elocked handover loop is bounded by an arch-specific limit\n(PENDING_LOOPS).\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "eeee4923e8225d1a646dc2a867be3703ea9379aa",
      "tree": "7ee37d90939390959a7630b64daf56475e24a634",
      "parents": [
        "36fda4a2786711d5c8153ce23e7d6bc905fd0a49"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Wed Mar 28 13:12:04 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Wed Mar 28 13:12:04 2018 +0100"
      },
      "message": "Initial commit of the queued spinlocks model\n\nThis is based on the Linux kernel implementation with additional\nmodifications by Will Deacon to avoid the cmpxchg() loops which cannot\nguarantee forward progress.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "36fda4a2786711d5c8153ce23e7d6bc905fd0a49",
      "tree": "932220860d2cac95c37827ee1ab976813cb98a23",
      "parents": [
        "e4312e7f4895104fecadcd394b23834a2af3be35"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Wed Mar 28 11:23:06 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Wed Mar 28 11:23:06 2018 +0100"
      },
      "message": "check.sh: Updated for a lightweight preemption model\n\nFor PlusCal specs, if a ProcessEnabled() operator is defined, all\npc[self] \u003d \"...\" conditions will gain an additional ProcessEnabled(self)\ncheck.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "e4312e7f4895104fecadcd394b23834a2af3be35",
      "tree": "bf942c03ed417c0ab75aa607804744aa158136a8",
      "parents": [
        "2049ecda4e8994cbde3f6b8e2d224571fbd9dc44"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Wed Mar 28 11:19:01 2018 +0100"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Wed Mar 28 11:19:01 2018 +0100"
      },
      "message": "qrwlock: Updated the code path for in-interrupt\n\nPreviously, this path could have been skipped and always enter the slow\npath.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "2049ecda4e8994cbde3f6b8e2d224571fbd9dc44",
      "tree": "d47b18c04084627b3c444993a9ac6de1bd95864d",
      "parents": [
        "4329ffee596b4e73fe0189e5826bc3d3ce9efe48"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Mon Feb 19 10:27:01 2018 +0000"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Mon Feb 19 10:27:01 2018 +0000"
      },
      "message": "Initial commit of the context_switch() model\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "4329ffee596b4e73fe0189e5826bc3d3ce9efe48",
      "tree": "24d9af9fe43ae494b71b45f0fb6a3d719a49b402",
      "parents": [
        "c39435e83a4e3c10e95946d5521197c557ed5bf2"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Feb 09 18:44:50 2018 +0000"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Feb 09 18:44:50 2018 +0000"
      },
      "message": "Initial commit of the ticketlock model\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "c39435e83a4e3c10e95946d5521197c557ed5bf2",
      "tree": "458d31a8c01caa5b476bea25cc7ec9f937044b37",
      "parents": [
        "de0c2f5990068c88d0076ff683f386a72271ea65"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Feb 09 18:44:17 2018 +0000"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Feb 09 18:44:17 2018 +0000"
      },
      "message": "Initial commit of the qrwlock model\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    },
    {
      "commit": "de0c2f5990068c88d0076ff683f386a72271ea65",
      "tree": "552b9e258b309819899b11e67e792df12aee0f1c",
      "parents": [],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Jan 04 13:32:59 2018 +0000"
      },
      "committer": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Jan 04 15:33:20 2018 +0000"
      },
      "message": "Initial commit of the arm64 ASID allocator specs\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n"
    }
  ]
}