arch/arm/boot/dts/armada-388-gp.dts - pub/scm/linux/kernel/git/dacohen/intel-mid - Git at Google

 /*
  * Device Tree file for Marvell Armada 385 development board
  * (RD-88F6820-GP)
  *
  * Copyright (C) 2014 Marvell
  *
  * Gregory CLEMENT <gregory.clement@free-electrons.com>
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
  * licensing only applies to this file, and not this project as a
  * whole.
  *
  *  a) This file is licensed under the terms of the GNU General Public
  *     License version 2.  This program is licensed "as is" without
  *     any warranty of any kind, whether express or implied.
  *
  * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
  *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
  *     conditions:
  *
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
  */

 /dts-v1/;
 #include "armada-388.dtsi"
 #include <dt-bindings/gpio/gpio.h>

 / {
 	model = "Marvell Armada 385 GP";
 	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";

 	chosen {
 		stdout-path = "serial0:115200n8";
 	};

 	memory {
 		device_type = "memory";
 		reg = <0x00000000 0x80000000>; /* 2 GB */
 	};

 	soc {
 		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
 			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;

 		internal-regs {
 			spi@10600 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&spi0_pins>;
 				status = "okay";

 				spi-flash@0 {
 					#address-cells = <1>;
 					#size-cells = <1>;
 					compatible = "st,m25p128", "jedec,spi-nor";
 					reg = <0>; /* Chip select 0 */
 					spi-max-frequency = <50000000>;
 					m25p,fast-read;
 				};
 			};

 			i2c@11000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&i2c0_pins>;
 				status = "okay";
 				clock-frequency = <100000>;
 				/*
 				 * The EEPROM located at adresse 54 is needed
 				 * for the boot - DO NOT ERASE IT -
 				 */

 				expander0: pca9555@20 {
 					compatible = "nxp,pca9555";
 					pinctrl-names = "default";
 					pinctrl-0 = <&pca0_pins>;
 					interrupt-parent = <&gpio0>;
 					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
 					gpio-controller;
 					#gpio-cells = <2>;
 					interrupt-controller;
 					#interrupt-cells = <2>;
 					reg = <0x20>;
 				};

 				expander1: pca9555@21 {
 					compatible = "nxp,pca9555";
 					pinctrl-names = "default";
 					interrupt-parent = <&gpio0>;
 					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
 					gpio-controller;
 					#gpio-cells = <2>;
 					interrupt-controller;
 					#interrupt-cells = <2>;
 					reg = <0x21>;
 				};

 			};

 			serial@12000 {
 				/*
 				 * Exported on the micro USB connector CON16
 				 * through an FTDI
 				 */

 				pinctrl-names = "default";
 				pinctrl-0 = <&uart0_pins>;
 				status = "okay";
 			};

 			/* GE1 CON15 */
 			ethernet@30000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&ge1_rgmii_pins>;
 				status = "okay";
 				phy = <&phy1>;
 				phy-mode = "rgmii-id";
 			};

 			/* CON4 */
 			usb@58000 {
 				vcc-supply = <&reg_usb2_0_vbus>;
 				status = "okay";
 			};

 			/* GE0 CON1 */
 			ethernet@70000 {
 				pinctrl-names = "default";
 				/*
 				 * The Reference Clock 0 is used to provide a
 				 * clock to the PHY
 				 */
 				pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
 				status = "okay";
 				phy = <&phy0>;
 				phy-mode = "rgmii-id";
 			};


 			mdio@72004 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&mdio_pins>;

 				phy0: ethernet-phy@1 {
 					reg = <1>;
 				};

 				phy1: ethernet-phy@0 {
 					reg = <0>;
 				};
 			};

 			sata@a8000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
 				status = "okay";
 				#address-cells = <1>;
 				#size-cells = <0>;

 				sata0: sata-port@0 {
 					reg = <0>;
 					target-supply = <&reg_5v_sata0>;
 				};

 				sata1: sata-port@1 {
 					reg = <1>;
 					target-supply = <&reg_5v_sata1>;
 				};
 			};

 			sata@e0000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
 				status = "okay";
 				#address-cells = <1>;
 				#size-cells = <0>;

 				sata2: sata-port@0 {
 					reg = <0>;
 					target-supply = <&reg_5v_sata2>;
 				};

 				sata3: sata-port@1 {
 					reg = <1>;
 					target-supply = <&reg_5v_sata3>;
 				};
 			};

 			sdhci@d8000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&sdhci_pins>;
 				cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
 				no-1-8-v;
 				wp-inverted;
 				bus-width = <8>;
 				status = "okay";
 			};

 			/* CON5 */
 			usb3@f0000 {
 				vcc-supply = <&reg_usb2_1_vbus>;
 				status = "okay";
 			};

 			/* CON7 */
 			usb3@f8000 {
 				vcc-supply = <&reg_usb3_vbus>;
 				status = "okay";
 			};
 		};

 		pcie-controller {
 			status = "okay";
 			/*
 			 * One PCIe units is accessible through
 			 * standard PCIe slot on the board.
 			 */
 			pcie@1,0 {
 				/* Port 0, Lane 0 */
 				status = "okay";
 			};

 			/*
 			 * The two other PCIe units are accessible
 			 * through mini PCIe slot on the board.
 			 */
 			pcie@2,0 {
 				/* Port 1, Lane 0 */
 				status = "okay";
 			};
 			pcie@3,0 {
 				/* Port 2, Lane 0 */
 				status = "okay";
 			};
 		};

 		gpio-fan {
 			compatible = "gpio-fan";
 			gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
 			gpio-fan,speed-map = <	 0 0
 					      3000 1>;
 		};
 	};

 	reg_usb3_vbus: usb3-vbus {
 		compatible = "regulator-fixed";
 		regulator-name = "usb3-vbus";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		enable-active-high;
 		regulator-always-on;
 		gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
 	};

 	reg_usb2_0_vbus: v5-vbus0 {
 		compatible = "regulator-fixed";
 		regulator-name = "v5.0-vbus0";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		enable-active-high;
 		regulator-always-on;
 		gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
 	};

 	reg_usb2_1_vbus: v5-vbus1 {
 		compatible = "regulator-fixed";
 		regulator-name = "v5.0-vbus1";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		enable-active-high;
 		regulator-always-on;
 		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
 	};

 	reg_usb2_1_vbus: v5-vbus1 {
 		compatible = "regulator-fixed";
 		regulator-name = "v5.0-vbus1";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		enable-active-high;
 		regulator-always-on;
 		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
 	};

 	reg_sata0: pwr-sata0 {
 		compatible = "regulator-fixed";
 		regulator-name = "pwr_en_sata0";
 		enable-active-high;
 		regulator-always-on;

 	};

 	reg_5v_sata0: v5-sata0 {
 		compatible = "regulator-fixed";
 		regulator-name = "v5.0-sata0";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		regulator-always-on;
 		vin-supply = <&reg_sata0>;
 	};

 	reg_12v_sata0: v12-sata0 {
 		compatible = "regulator-fixed";
 		regulator-name = "v12.0-sata0";
 		regulator-min-microvolt = <12000000>;
 		regulator-max-microvolt = <12000000>;
 		regulator-always-on;
 		vin-supply = <&reg_sata0>;
 	};

 	reg_sata1: pwr-sata1 {
 		regulator-name = "pwr_en_sata1";
 		compatible = "regulator-fixed";
 		regulator-min-microvolt = <12000000>;
 		regulator-max-microvolt = <12000000>;
 		enable-active-high;
 		regulator-always-on;
 		gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
 	};

 	reg_5v_sata1: v5-sata1 {
 		compatible = "regulator-fixed";
 		regulator-name = "v5.0-sata1";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		regulator-always-on;
 		vin-supply = <&reg_sata1>;
 	};

 	reg_12v_sata1: v12-sata1 {
 		compatible = "regulator-fixed";
 		regulator-name = "v12.0-sata1";
 		regulator-min-microvolt = <12000000>;
 		regulator-max-microvolt = <12000000>;
 		regulator-always-on;
 		vin-supply = <&reg_sata1>;
 	};

 	reg_sata2: pwr-sata2 {
 		compatible = "regulator-fixed";
 		regulator-name = "pwr_en_sata2";
 		enable-active-high;
 		regulator-always-on;
 		gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
 	};

 	reg_5v_sata2: v5-sata2 {
 		compatible = "regulator-fixed";
 		regulator-name = "v5.0-sata2";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		regulator-always-on;
 		vin-supply = <&reg_sata2>;
 	};

 	reg_12v_sata2: v12-sata2 {
 		compatible = "regulator-fixed";
 		regulator-name = "v12.0-sata2";
 		regulator-min-microvolt = <12000000>;
 		regulator-max-microvolt = <12000000>;
 		regulator-always-on;
 		vin-supply = <&reg_sata2>;
 	};

 	reg_sata3: pwr-sata3 {
 		compatible = "regulator-fixed";
 		regulator-name = "pwr_en_sata3";
 		enable-active-high;
 		regulator-always-on;
 		gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
 	};

 	reg_5v_sata3: v5-sata3 {
 		compatible = "regulator-fixed";
 		regulator-name = "v5.0-sata3";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		regulator-always-on;
 		vin-supply = <&reg_sata3>;
 	};

 	reg_12v_sata3: v12-sata3 {
 		compatible = "regulator-fixed";
 		regulator-name = "v12.0-sata3";
 		regulator-min-microvolt = <12000000>;
 		regulator-max-microvolt = <12000000>;
 		regulator-always-on;
 		vin-supply = <&reg_sata3>;
 	};
 };

 &pinctrl {
 	pca0_pins: pca0_pins {
 		marvell,pins = "mpp18";
 		marvell,function = "gpio";
 	};
 };
	/*
	* Device Tree file for Marvell Armada 385 development board
	* (RD-88F6820-GP)
	*
	* Copyright (C) 2014 Marvell
	*
	* Gregory CLEMENT <gregory.clement@free-electrons.com>
	*
	* This file is dual-licensed: you can use it either under the terms
	* of the GPL or the X11 license, at your option. Note that this dual
	* licensing only applies to this file, and not this project as a
	* whole.
	*
	* a) This file is licensed under the terms of the GNU General Public
	* License version 2. This program is licensed "as is" without
	* any warranty of any kind, whether express or implied.
	*
	* Or, alternatively,
	*
	* b) Permission is hereby granted, free of charge, to any person
	* obtaining a copy of this software and associated documentation
	* files (the "Software"), to deal in the Software without
	* restriction, including without limitation the rights to use,
	* copy, modify, merge, publish, distribute, sublicense, and/or
	* sell copies of the Software, and to permit persons to whom the
	* Software is furnished to do so, subject to the following
	* conditions:
	*
	* The above copyright notice and this permission notice shall be
	* included in all copies or substantial portions of the Software.
	*
	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	* OTHER DEALINGS IN THE SOFTWARE.
	*/

	/dts-v1/;
	#include "armada-388.dtsi"
	#include <dt-bindings/gpio/gpio.h>

	/ {
	model = "Marvell Armada 385 GP";
	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";

	chosen {
	stdout-path = "serial0:115200n8";
	};

	memory {
	device_type = "memory";
	reg = <0x00000000 0x80000000>; /* 2 GB */
	};

	soc {
	ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
	MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;

	internal-regs {
	spi@10600 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>;
	status = "okay";

	spi-flash@0 {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "st,m25p128", "jedec,spi-nor";
	reg = <0>; /* Chip select 0 */
	spi-max-frequency = <50000000>;
	m25p,fast-read;
	};
	};

	i2c@11000 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	status = "okay";
	clock-frequency = <100000>;
	/*
	* The EEPROM located at adresse 54 is needed
	* for the boot - DO NOT ERASE IT -
	*/

	expander0: pca9555@20 {
	compatible = "nxp,pca9555";
	pinctrl-names = "default";
	pinctrl-0 = <&pca0_pins>;
	interrupt-parent = <&gpio0>;
	interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
	gpio-controller;
	#gpio-cells = <2>;
	interrupt-controller;
	#interrupt-cells = <2>;
	reg = <0x20>;
	};

	expander1: pca9555@21 {
	compatible = "nxp,pca9555";
	pinctrl-names = "default";
	interrupt-parent = <&gpio0>;
	interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
	gpio-controller;
	#gpio-cells = <2>;
	interrupt-controller;
	#interrupt-cells = <2>;
	reg = <0x21>;
	};

	};

	serial@12000 {
	/*
	* Exported on the micro USB connector CON16
	* through an FTDI
	*/

	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	status = "okay";
	};

	/* GE1 CON15 */
	ethernet@30000 {
	pinctrl-names = "default";
	pinctrl-0 = <&ge1_rgmii_pins>;
	status = "okay";
	phy = <&phy1>;
	phy-mode = "rgmii-id";
	};

	/* CON4 */
	usb@58000 {
	vcc-supply = <&reg_usb2_0_vbus>;
	status = "okay";
	};

	/* GE0 CON1 */
	ethernet@70000 {
	pinctrl-names = "default";
	/*
	* The Reference Clock 0 is used to provide a
	* clock to the PHY
	*/
	pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
	status = "okay";
	phy = <&phy0>;
	phy-mode = "rgmii-id";
	};


	mdio@72004 {
	pinctrl-names = "default";
	pinctrl-0 = <&mdio_pins>;

	phy0: ethernet-phy@1 {
	reg = <1>;
	};

	phy1: ethernet-phy@0 {
	reg = <0>;
	};
	};

	sata@a8000 {
	pinctrl-names = "default";
	pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;

	sata0: sata-port@0 {
	reg = <0>;
	target-supply = <&reg_5v_sata0>;
	};

	sata1: sata-port@1 {
	reg = <1>;
	target-supply = <&reg_5v_sata1>;
	};
	};

	sata@e0000 {
	pinctrl-names = "default";
	pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;

	sata2: sata-port@0 {
	reg = <0>;
	target-supply = <&reg_5v_sata2>;
	};

	sata3: sata-port@1 {
	reg = <1>;
	target-supply = <&reg_5v_sata3>;
	};
	};

	sdhci@d8000 {
	pinctrl-names = "default";
	pinctrl-0 = <&sdhci_pins>;
	cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
	no-1-8-v;
	wp-inverted;
	bus-width = <8>;
	status = "okay";
	};

	/* CON5 */
	usb3@f0000 {
	vcc-supply = <&reg_usb2_1_vbus>;
	status = "okay";
	};

	/* CON7 */
	usb3@f8000 {
	vcc-supply = <&reg_usb3_vbus>;
	status = "okay";
	};
	};

	pcie-controller {
	status = "okay";
	/*
	* One PCIe units is accessible through
	* standard PCIe slot on the board.
	*/
	pcie@1,0 {
	/* Port 0, Lane 0 */
	status = "okay";
	};

	/*
	* The two other PCIe units are accessible
	* through mini PCIe slot on the board.
	*/
	pcie@2,0 {
	/* Port 1, Lane 0 */
	status = "okay";
	};
	pcie@3,0 {
	/* Port 2, Lane 0 */
	status = "okay";
	};
	};

	gpio-fan {
	compatible = "gpio-fan";
	gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
	gpio-fan,speed-map = < 0 0
	3000 1>;
	};
	};

	reg_usb3_vbus: usb3-vbus {
	compatible = "regulator-fixed";
	regulator-name = "usb3-vbus";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	enable-active-high;
	regulator-always-on;
	gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_0_vbus: v5-vbus0 {
	compatible = "regulator-fixed";
	regulator-name = "v5.0-vbus0";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	enable-active-high;
	regulator-always-on;
	gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_1_vbus: v5-vbus1 {
	compatible = "regulator-fixed";
	regulator-name = "v5.0-vbus1";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	enable-active-high;
	regulator-always-on;
	gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_1_vbus: v5-vbus1 {
	compatible = "regulator-fixed";
	regulator-name = "v5.0-vbus1";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	enable-active-high;
	regulator-always-on;
	gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
	};

	reg_sata0: pwr-sata0 {
	compatible = "regulator-fixed";
	regulator-name = "pwr_en_sata0";
	enable-active-high;
	regulator-always-on;

	};

	reg_5v_sata0: v5-sata0 {
	compatible = "regulator-fixed";
	regulator-name = "v5.0-sata0";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	regulator-always-on;
	vin-supply = <&reg_sata0>;
	};

	reg_12v_sata0: v12-sata0 {
	compatible = "regulator-fixed";
	regulator-name = "v12.0-sata0";
	regulator-min-microvolt = <12000000>;
	regulator-max-microvolt = <12000000>;
	regulator-always-on;
	vin-supply = <&reg_sata0>;
	};

	reg_sata1: pwr-sata1 {
	regulator-name = "pwr_en_sata1";
	compatible = "regulator-fixed";
	regulator-min-microvolt = <12000000>;
	regulator-max-microvolt = <12000000>;
	enable-active-high;
	regulator-always-on;
	gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata1: v5-sata1 {
	compatible = "regulator-fixed";
	regulator-name = "v5.0-sata1";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	regulator-always-on;
	vin-supply = <&reg_sata1>;
	};

	reg_12v_sata1: v12-sata1 {
	compatible = "regulator-fixed";
	regulator-name = "v12.0-sata1";
	regulator-min-microvolt = <12000000>;
	regulator-max-microvolt = <12000000>;
	regulator-always-on;
	vin-supply = <&reg_sata1>;
	};

	reg_sata2: pwr-sata2 {
	compatible = "regulator-fixed";
	regulator-name = "pwr_en_sata2";
	enable-active-high;
	regulator-always-on;
	gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata2: v5-sata2 {
	compatible = "regulator-fixed";
	regulator-name = "v5.0-sata2";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	regulator-always-on;
	vin-supply = <&reg_sata2>;
	};

	reg_12v_sata2: v12-sata2 {
	compatible = "regulator-fixed";
	regulator-name = "v12.0-sata2";
	regulator-min-microvolt = <12000000>;
	regulator-max-microvolt = <12000000>;
	regulator-always-on;
	vin-supply = <&reg_sata2>;
	};

	reg_sata3: pwr-sata3 {
	compatible = "regulator-fixed";
	regulator-name = "pwr_en_sata3";
	enable-active-high;
	regulator-always-on;
	gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata3: v5-sata3 {
	compatible = "regulator-fixed";
	regulator-name = "v5.0-sata3";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	regulator-always-on;
	vin-supply = <&reg_sata3>;
	};

	reg_12v_sata3: v12-sata3 {
	compatible = "regulator-fixed";
	regulator-name = "v12.0-sata3";
	regulator-min-microvolt = <12000000>;
	regulator-max-microvolt = <12000000>;
	regulator-always-on;
	vin-supply = <&reg_sata3>;
	};
	};

	&pinctrl {
	pca0_pins: pca0_pins {
	marvell,pins = "mpp18";
	marvell,function = "gpio";
	};
	};