rust: dma: allow drivers to tune max segment size

Make dma_set_max_seg_size() available to Rust so drivers can perform
standard DMA setup steps.

Signed-off-by: Beata Michalska <beata.michalska@arm.com>
Acked-by: Robin Murphy <robvin.murphy@arm.com>
Reviewed-by: Alice Ryhl <aliceryhl@google.com>
Link: https://patch.msgid.link/20260128135320.689046-1-beata.michalska@arm.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
diff --git a/rust/helpers/dma.c b/rust/helpers/dma.c
index e7defee..20232ac 100644
--- a/rust/helpers/dma.c
+++ b/rust/helpers/dma.c
@@ -43,3 +43,9 @@ size_t rust_helper_dma_max_mapping_size(struct device *dev)
 {
 	return dma_max_mapping_size(dev);
 }
+
+__rust_helper void rust_helper_dma_set_max_seg_size(struct device *dev,
+						    unsigned int size)
+{
+	dma_set_max_seg_size(dev, size);
+}
diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs
index acc65b1..909d56f 100644
--- a/rust/kernel/dma.rs
+++ b/rust/kernel/dma.rs
@@ -85,6 +85,23 @@ unsafe fn dma_set_mask_and_coherent(&self, mask: DmaMask) -> Result {
             bindings::dma_set_mask_and_coherent(self.as_ref().as_raw(), mask.value())
         })
     }
+
+    /// Set the maximum size of a single DMA segment the device may request.
+    ///
+    /// This method is usually called once from `probe()` as soon as the device capabilities are
+    /// known.
+    ///
+    /// # Safety
+    ///
+    /// This method must not be called concurrently with any DMA allocation or mapping primitives,
+    /// such as [`CoherentAllocation::alloc_attrs`].
+    unsafe fn dma_set_max_seg_size(&self, size: u32) {
+        // SAFETY:
+        // - By the type invariant of `device::Device`, `self.as_ref().as_raw()` is valid.
+        // - The safety requirement of this function guarantees that there are no concurrent calls
+        //   to DMA allocation and mapping primitives using this parameter.
+        unsafe { bindings::dma_set_max_seg_size(self.as_ref().as_raw(), size) }
+    }
 }
 
 /// A DMA mask that holds a bitmask with the lowest `n` bits set.