Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt

SMI (Smart Multimedia Interface) Local Arbiter

The hardware block diagram please check bindings/iommu/mediatek,iommu.txt

Required properties:
- compatible : must be one of :
		"mediatek,mt2701-smi-larb"
		"mediatek,mt2712-smi-larb"
		"mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb"
		"mediatek,mt8173-smi-larb"
		"mediatek,mt8183-smi-larb"
- reg : the register and size of this local arbiter.
- mediatek,smi : a phandle to the smi_common node.
- power-domains : a phandle to the power domain of this local arbiter.
- clocks : Must contain an entry for each entry in clock-names.
- clock-names: must contain 2 entries, as follows:
  - "apb" : Advanced Peripheral Bus clock, It's the clock for setting
	    the register.
  - "smi" : It's the clock for transfer data and command.
  and this optional clock name:
  - "gals": the clock for GALS(Global Async Local Sync).
  Here is the list which has this GALS: mt8183.

Required property for mt2701, mt2712 and mt7623:
- mediatek,larb-id :the hardware id of this larb.

Example:
	larb1: larb@16010000 {
		compatible = "mediatek,mt8173-smi-larb";
		reg = <0 0x16010000 0 0x1000>;
		mediatek,smi = <&smi_common>;
		power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
		clocks = <&vdecsys CLK_VDEC_CKEN>,
			 <&vdecsys CLK_VDEC_LARB_CKEN>;
		clock-names = "apb", "smi";
	};

Example for mt2701:
	larb0: larb@14010000 {
		compatible = "mediatek,mt2701-smi-larb";
		reg = <0 0x14010000 0 0x1000>;
		mediatek,smi = <&smi_common>;
		mediatek,larb-id = <0>;
		clocks = <&mmsys CLK_MM_SMI_LARB0>,
			 <&mmsys CLK_MM_SMI_LARB0>;
		clock-names = "apb", "smi";
		power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
	};