)]}'
{
  "commit": "798082be69fea995a475ca1db8f9873589e207d9",
  "tree": "3a2ee444f694e42df926c0b54d9a75e37c76be36",
  "parents": [
    "2de8b4cc2051ee1d40eedbcf94de0e7d04507c37"
  ],
  "author": {
    "name": "John David Anglin",
    "email": "dave.anglin@bell.net",
    "time": "Mon May 16 15:32:00 2022 +0000"
  },
  "committer": {
    "name": "Helge Deller",
    "email": "deller@gmx.de",
    "time": "Tue May 17 21:52:59 2022 +0200"
  },
  "message": "parisc: Fix patch code locking and flushing\n\nThis change fixes the following:\n\n1) The flags variable is not initialized. Always use raw_spin_lock_irqsave\nand raw_spin_unlock_irqrestore to serialize patching.\n\n2) flush_kernel_vmap_range is primarily intended for DMA flushes.\nThe whole cache flush in flush_kernel_vmap_range is only possible\nwhen interrupts are enabled on SMP machines. Since __patch_text_multiple\ncalls flush_kernel_vmap_range with interrupts disabled, it is better\nto directly call flush_kernel_dcache_range_asm and\nflush_kernel_icache_range_asm.\n\n3) The final call to flush_icache_range is unnecessary.\n\nTested with `[PATCH, V3] parisc: Rewrite cache flush code for\nPA8800/PA8900\u0027 change on rp3440, c8000 and c3750 (32 and 64-bit).\n\nNote by Helge:\nThis patch had been temporarily reverted shortly before v5.18-rc6 in order\nto fix boot issues. Now it can be re-applied.\n\nSigned-off-by: John David Anglin \u003cdave.anglin@bell.net\u003e\nSigned-off-by: Helge Deller \u003cdeller@gmx.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "80a0ab372802db148a1ccb0867bc0eb8ae3b7b69",
      "old_mode": 33188,
      "old_path": "arch/parisc/kernel/patch.c",
      "new_id": "e59574f65e641a09cbedb2e0ca7fa5e6045f3650",
      "new_mode": 33188,
      "new_path": "arch/parisc/kernel/patch.c"
    }
  ]
}