Merge tag 'v6.10-dts-raw'
Linux 6.10
diff --git a/Bindings/cache/qcom,llcc.yaml b/Bindings/cache/qcom,llcc.yaml
index 07ccbda..b9a9f2c 100644
--- a/Bindings/cache/qcom,llcc.yaml
+++ b/Bindings/cache/qcom,llcc.yaml
@@ -66,7 +66,6 @@
compatible:
contains:
enum:
- - qcom,qdu1000-llcc
- qcom,sc7180-llcc
- qcom,sm6350-llcc
then:
@@ -104,6 +103,7 @@
compatible:
contains:
enum:
+ - qcom,qdu1000-llcc
- qcom,sc8180x-llcc
- qcom,sc8280xp-llcc
- qcom,x1e80100-llcc
diff --git a/src/arm64/allwinner/sun50i-h64-remix-mini-pc.dts b/src/arm64/allwinner/sun50i-h64-remix-mini-pc.dts
index c204dd4..ce90327 100644
--- a/src/arm64/allwinner/sun50i-h64-remix-mini-pc.dts
+++ b/src/arm64/allwinner/sun50i-h64-remix-mini-pc.dts
@@ -191,7 +191,7 @@
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
x-powers,drive-vbus-en;
vin1-supply = <®_vcc5v>;
diff --git a/src/arm64/qcom/qdu1000.dtsi b/src/arm64/qcom/qdu1000.dtsi
index f2a5e2e..f90f03f 100644
--- a/src/arm64/qcom/qdu1000.dtsi
+++ b/src/arm64/qcom/qdu1000.dtsi
@@ -1459,9 +1459,23 @@
system-cache-controller@19200000 {
compatible = "qcom,qdu1000-llcc";
- reg = <0 0x19200000 0 0xd80000>,
+ reg = <0 0x19200000 0 0x80000>,
+ <0 0x19300000 0 0x80000>,
+ <0 0x19600000 0 0x80000>,
+ <0 0x19700000 0 0x80000>,
+ <0 0x19a00000 0 0x80000>,
+ <0 0x19b00000 0 0x80000>,
+ <0 0x19e00000 0 0x80000>,
+ <0 0x19f00000 0 0x80000>,
<0 0x1a200000 0 0x80000>;
reg-names = "llcc0_base",
+ "llcc1_base",
+ "llcc2_base",
+ "llcc3_base",
+ "llcc4_base",
+ "llcc5_base",
+ "llcc6_base",
+ "llcc7_base",
"llcc_broadcast_base";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
};
diff --git a/src/arm64/qcom/sa8775p.dtsi b/src/arm64/qcom/sa8775p.dtsi
index 31de735..1b3dc0e 100644
--- a/src/arm64/qcom/sa8775p.dtsi
+++ b/src/arm64/qcom/sa8775p.dtsi
@@ -3605,7 +3605,7 @@
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
pcie0: pcie@1c00000 {
diff --git a/src/arm64/qcom/sc8180x.dtsi b/src/arm64/qcom/sc8180x.dtsi
index 0677123..581a70c 100644
--- a/src/arm64/qcom/sc8180x.dtsi
+++ b/src/arm64/qcom/sc8180x.dtsi
@@ -2647,11 +2647,14 @@
system-cache-controller@9200000 {
compatible = "qcom,sc8180x-llcc";
- reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>,
- <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>,
- <0 0x09600000 0 0x50000>;
+ reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>,
+ <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>,
+ <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>,
+ <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>,
+ <0 0x09600000 0 0x58000>;
reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
- "llcc3_base", "llcc_broadcast_base";
+ "llcc3_base", "llcc4_base", "llcc5_base",
+ "llcc6_base", "llcc7_base", "llcc_broadcast_base";
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};
diff --git a/src/arm64/qcom/sc8280xp-crd.dts b/src/arm64/qcom/sc8280xp-crd.dts
index 4121556..372b35f 100644
--- a/src/arm64/qcom/sc8280xp-crd.dts
+++ b/src/arm64/qcom/sc8280xp-crd.dts
@@ -977,8 +977,7 @@
reset-n-pins {
pins = "gpio99";
function = "gpio";
- output-high;
- drive-strength = <16>;
+ bias-disable;
};
};
diff --git a/src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index e937732..4bf99b6 100644
--- a/src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -655,15 +655,16 @@
status = "okay";
- /* FIXME: verify */
touchscreen@10 {
- compatible = "hid-over-i2c";
+ compatible = "elan,ekth5015m", "elan,ekth6915";
reg = <0x10>;
- hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
- vdd-supply = <&vreg_misc_3p3>;
- vddl-supply = <&vreg_s10b>;
+ reset-gpios = <&tlmm 99 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+ no-reset-on-power-off;
+
+ vcc33-supply = <&vreg_misc_3p3>;
+ vccio-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&ts0_default>;
@@ -1496,8 +1497,8 @@
reset-n-pins {
pins = "gpio99";
function = "gpio";
- output-high;
- drive-strength = <16>;
+ drive-strength = <2>;
+ bias-disable;
};
};
diff --git a/src/arm64/qcom/sc8280xp.dtsi b/src/arm64/qcom/sc8280xp.dtsi
index 0549ba1..59f0a85 100644
--- a/src/arm64/qcom/sc8280xp.dtsi
+++ b/src/arm64/qcom/sc8280xp.dtsi
@@ -4623,6 +4623,8 @@
restart@c264000 {
compatible = "qcom,pshold";
reg = <0 0x0c264000 0 0x4>;
+ /* TZ seems to block access */
+ status = "reserved";
};
tsens1: thermal-sensor@c265000 {
diff --git a/src/arm64/qcom/sm6115.dtsi b/src/arm64/qcom/sm6115.dtsi
index aca0a87..9ed0621 100644
--- a/src/arm64/qcom/sm6115.dtsi
+++ b/src/arm64/qcom/sm6115.dtsi
@@ -1090,6 +1090,7 @@
power-domains = <&rpmpd SM6115_VDDCX>;
operating-points-v2 = <&sdhc1_opp_table>;
+ iommus = <&apps_smmu 0x00c0 0x0>;
interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG
&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
diff --git a/src/arm64/qcom/x1e80100-crd.dts b/src/arm64/qcom/x1e80100-crd.dts
index c5c2895..be6b1e7 100644
--- a/src/arm64/qcom/x1e80100-crd.dts
+++ b/src/arm64/qcom/x1e80100-crd.dts
@@ -49,6 +49,15 @@
stdout-path = "serial0:115200n8";
};
+ reserved-memory {
+ linux,cma {
+ compatible = "shared-dma-pool";
+ size = <0x0 0x8000000>;
+ reusable;
+ linux,cma-default;
+ };
+ };
+
sound {
compatible = "qcom,x1e80100-sndcard";
model = "X1E80100-CRD";
@@ -93,7 +102,7 @@
};
codec {
- sound-dai = <&wcd938x 1>, <&swr2 0>, <&lpass_txmacro 0>;
+ sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
};
platform {
@@ -744,7 +753,7 @@
wcd_tx: codec@0,3 {
compatible = "sdw20217010d00";
reg = <0 3>;
- qcom,tx-port-mapping = <1 1 2 3>;
+ qcom,tx-port-mapping = <2 2 3 4>;
};
};
diff --git a/src/arm64/qcom/x1e80100-qcp.dts b/src/arm64/qcom/x1e80100-qcp.dts
index 2061fbe..8f67c39 100644
--- a/src/arm64/qcom/x1e80100-qcp.dts
+++ b/src/arm64/qcom/x1e80100-qcp.dts
@@ -23,6 +23,15 @@
stdout-path = "serial0:115200n8";
};
+ reserved-memory {
+ linux,cma {
+ compatible = "shared-dma-pool";
+ size = <0x0 0x8000000>;
+ reusable;
+ linux,cma-default;
+ };
+ };
+
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
diff --git a/src/arm64/qcom/x1e80100.dtsi b/src/arm64/qcom/x1e80100.dtsi
index 5f90a0b..05e4d49 100644
--- a/src/arm64/qcom/x1e80100.dtsi
+++ b/src/arm64/qcom/x1e80100.dtsi
@@ -2737,15 +2737,17 @@
device_type = "pci";
compatible = "qcom,pcie-x1e80100";
reg = <0 0x01bf8000 0 0x3000>,
- <0 0x70000000 0 0xf1d>,
- <0 0x70000f20 0 0xa8>,
+ <0 0x70000000 0 0xf20>,
+ <0 0x70000f40 0 0xa8>,
<0 0x70001000 0 0x1000>,
- <0 0x70100000 0 0x100000>;
+ <0 0x70100000 0 0x100000>,
+ <0 0x01bfb000 0 0x1000>;
reg-names = "parf",
"dbi",
"elbi",
"atu",
- "config";
+ "config",
+ "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,
