Merge tag 'soc-fixes-5.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:

 - A fix for a regression caused by the previous set of bugfixes
   changing tegra and at91 pinctrl properties.

   More work is needed to figure out what this should actually be, but a
   revert makes it work for the moment.

 - Defconfig regression fixes for tegra after renamed symbols

 - Build-time warning and static checker fixes for imx, op-tee, sunxi,
   meson, at91, and omap

 - More at91 DT fixes for audio, regulator and spi nodes

 - A regression fix for Renesas Hyperflash memory probe

 - A stability fix for amlogic boards, modifying the allowed cpufreq
   states

 - Multiple fixes for system suspend on omap2+

 - DT fixes for various i.MX bugs

 - A probe error fix for imx6ull-colibri MMC

 - A MAINTAINERS file entry for samsung bug reports

* tag 'soc-fixes-5.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (42 commits)
  Revert "arm: dts: at91: Fix boolean properties with values"
  bus: sunxi-rsb: Fix the return value of sunxi_rsb_device_create()
  Revert "arm64: dts: tegra: Fix boolean properties with values"
  arm64: dts: imx8mn-ddr4-evk: Describe the 32.768 kHz PMIC clock
  ARM: dts: imx6ull-colibri: fix vqmmc regulator
  MAINTAINERS: add Bug entry for Samsung and memory controller drivers
  memory: renesas-rpc-if: Fix HF/OSPI data transfer in Manual Mode
  ARM: dts: logicpd-som-lv: Fix wrong pinmuxing on OMAP35
  ARM: dts: am3517-evm: Fix misc pinmuxing
  ARM: dts: am33xx-l4: Add missing touchscreen clock properties
  ARM: dts: Fix mmc order for omap3-gta04
  ARM: dts: at91: fix pinctrl phandles
  ARM: dts: at91: sama5d4_xplained: fix pinctrl phandle name
  ARM: dts: at91: Describe regulators on at91sam9g20ek
  ARM: dts: at91: Map MCLK for wm8731 on at91sam9g20ek
  ARM: dts: at91: Fix boolean properties with values
  ARM: dts: at91: use generic node name for dataflash
  ARM: dts: at91: align SPI NOR node name with dtschema
  ARM: dts: at91: sama7g5ek: Align the impedance of the QSPI0's HSIO and PCB lines
  ARM: dts: at91: sama7g5ek: enable pull-up on flexcom3 console lines
  ...

[ upstream commit: 8013d1d3d2e33236dee13a133fba49ad55045e79 ]
diff --git a/Bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/Bindings/arm/tegra/nvidia,tegra20-pmc.yaml
index 0afec83..564ae6a 100644
--- a/Bindings/arm/tegra/nvidia,tegra20-pmc.yaml
+++ b/Bindings/arm/tegra/nvidia,tegra20-pmc.yaml
@@ -14,7 +14,6 @@
   compatible:
     enum:
       - nvidia,tegra20-pmc
-      - nvidia,tegra20-pmc
       - nvidia,tegra30-pmc
       - nvidia,tegra114-pmc
       - nvidia,tegra124-pmc
diff --git a/Bindings/bus/ti-sysc.yaml b/Bindings/bus/ti-sysc.yaml
index bd40213..fced408 100644
--- a/Bindings/bus/ti-sysc.yaml
+++ b/Bindings/bus/ti-sysc.yaml
@@ -35,7 +35,6 @@
       - items:
           - enum:
               - ti,sysc-omap2
-              - ti,sysc-omap2
               - ti,sysc-omap4
               - ti,sysc-omap4-simple
               - ti,sysc-omap2-timer
diff --git a/Bindings/clock/microchip,mpfs.yaml b/Bindings/clock/microchip,mpfs.yaml
index 0c15afa..016a4f3 100644
--- a/Bindings/clock/microchip,mpfs.yaml
+++ b/Bindings/clock/microchip,mpfs.yaml
@@ -22,7 +22,16 @@
     const: microchip,mpfs-clkcfg
 
   reg:
-    maxItems: 1
+    items:
+      - description: |
+          clock config registers:
+          These registers contain enable, reset & divider tables for the, cpu,
+          axi, ahb and rtc/mtimer reference clocks as well as enable and reset
+          for the peripheral clocks.
+      - description: |
+          mss pll dri registers:
+          Block of registers responsible for dynamic reconfiguration of the mss
+          pll
 
   clocks:
     maxItems: 1
@@ -51,7 +60,7 @@
             #size-cells = <2>;
             clkcfg: clock-controller@20002000 {
                 compatible = "microchip,mpfs-clkcfg";
-                reg = <0x0 0x20002000 0x0 0x1000>;
+                reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
                 clocks = <&ref>;
                 #clock-cells = <1>;
         };
diff --git a/Bindings/display/bridge/chipone,icn6211.yaml b/Bindings/display/bridge/chipone,icn6211.yaml
index 62c3bd4..7257fd0 100644
--- a/Bindings/display/bridge/chipone,icn6211.yaml
+++ b/Bindings/display/bridge/chipone,icn6211.yaml
@@ -51,7 +51,6 @@
           Video port for MIPI DPI output (panel or connector).
 
     required:
-      - port@0
       - port@1
 
 required:
diff --git a/Bindings/display/bridge/toshiba,tc358762.yaml b/Bindings/display/bridge/toshiba,tc358762.yaml
index 5216c27..a412a1d 100644
--- a/Bindings/display/bridge/toshiba,tc358762.yaml
+++ b/Bindings/display/bridge/toshiba,tc358762.yaml
@@ -39,7 +39,6 @@
           Video port for MIPI DPI output (panel or connector).
 
     required:
-      - port@0
       - port@1
 
 required:
diff --git a/Bindings/display/msm/dpu-qcm2290.yaml b/Bindings/display/msm/dpu-qcm2290.yaml
index d31483a..6fb7e32 100644
--- a/Bindings/display/msm/dpu-qcm2290.yaml
+++ b/Bindings/display/msm/dpu-qcm2290.yaml
@@ -160,7 +160,7 @@
     mdss: mdss@5e00000 {
         #address-cells = <1>;
         #size-cells = <1>;
-        compatible = "qcom,qcm2290-mdss", "qcom,mdss";
+        compatible = "qcom,qcm2290-mdss";
         reg = <0x05e00000 0x1000>;
         reg-names = "mdss";
         power-domains = <&dispcc MDSS_GDSC>;
@@ -180,7 +180,7 @@
                  <&apps_smmu 0x421 0x0>;
         ranges;
 
-        mdss_mdp: mdp@5e01000 {
+        mdss_mdp: display-controller@5e01000 {
                 compatible = "qcom,qcm2290-dpu";
                 reg = <0x05e01000 0x8f000>,
                       <0x05eb0000 0x2008>;
diff --git a/Bindings/display/panel/panel-mipi-dbi-spi.yaml b/Bindings/display/panel/panel-mipi-dbi-spi.yaml
index f297899..c2df8d2 100644
--- a/Bindings/display/panel/panel-mipi-dbi-spi.yaml
+++ b/Bindings/display/panel/panel-mipi-dbi-spi.yaml
@@ -83,6 +83,8 @@
 required:
   - compatible
   - reg
+  - width-mm
+  - height-mm
   - panel-timing
 
 unevaluatedProperties: false
diff --git a/Bindings/display/panel/panel-timing.yaml b/Bindings/display/panel/panel-timing.yaml
index 9bf592d..7749de9 100644
--- a/Bindings/display/panel/panel-timing.yaml
+++ b/Bindings/display/panel/panel-timing.yaml
@@ -71,78 +71,72 @@
 
   hfront-porch:
     description: Horizontal front porch panel timing
+    $ref: /schemas/types.yaml#/definitions/uint32-array
     oneOf:
-      - $ref: /schemas/types.yaml#/definitions/uint32
-        maxItems: 1
+      - maxItems: 1
         items:
           description: typical number of pixels
-      - $ref: /schemas/types.yaml#/definitions/uint32-array
-        minItems: 3
+      - minItems: 3
         maxItems: 3
         items:
           description: min, typ, max number of pixels
 
   hback-porch:
     description: Horizontal back porch timing
+    $ref: /schemas/types.yaml#/definitions/uint32-array
     oneOf:
-      - $ref: /schemas/types.yaml#/definitions/uint32
-        maxItems: 1
+      - maxItems: 1
         items:
           description: typical number of pixels
-      - $ref: /schemas/types.yaml#/definitions/uint32-array
-        minItems: 3
+      - minItems: 3
         maxItems: 3
         items:
           description: min, typ, max number of pixels
 
   hsync-len:
     description: Horizontal sync length panel timing
+    $ref: /schemas/types.yaml#/definitions/uint32-array
     oneOf:
-      - $ref: /schemas/types.yaml#/definitions/uint32
-        maxItems: 1
+      - maxItems: 1
         items:
           description: typical number of pixels
-      - $ref: /schemas/types.yaml#/definitions/uint32-array
-        minItems: 3
+      - minItems: 3
         maxItems: 3
         items:
           description: min, typ, max number of pixels
 
   vfront-porch:
     description: Vertical front porch panel timing
+    $ref: /schemas/types.yaml#/definitions/uint32-array
     oneOf:
-      - $ref: /schemas/types.yaml#/definitions/uint32
-        maxItems: 1
+      - maxItems: 1
         items:
           description: typical number of lines
-      - $ref: /schemas/types.yaml#/definitions/uint32-array
-        minItems: 3
+      - minItems: 3
         maxItems: 3
         items:
           description: min, typ, max number of lines
 
   vback-porch:
     description: Vertical back porch panel timing
+    $ref: /schemas/types.yaml#/definitions/uint32-array
     oneOf:
-      - $ref: /schemas/types.yaml#/definitions/uint32
-        maxItems: 1
+      - maxItems: 1
         items:
           description: typical number of lines
-      - $ref: /schemas/types.yaml#/definitions/uint32-array
-        minItems: 3
+      - minItems: 3
         maxItems: 3
         items:
           description: min, typ, max number of lines
 
   vsync-len:
     description: Vertical sync length panel timing
+    $ref: /schemas/types.yaml#/definitions/uint32-array
     oneOf:
-      - $ref: /schemas/types.yaml#/definitions/uint32
-        maxItems: 1
+      - maxItems: 1
         items:
           description: typical number of lines
-      - $ref: /schemas/types.yaml#/definitions/uint32-array
-        minItems: 3
+      - minItems: 3
         maxItems: 3
         items:
           description: min, typ, max number of lines
diff --git a/Bindings/dma/qcom,gpi.yaml b/Bindings/dma/qcom,gpi.yaml
index e614fe3..d09d79d 100644
--- a/Bindings/dma/qcom,gpi.yaml
+++ b/Bindings/dma/qcom,gpi.yaml
@@ -29,6 +29,7 @@
   interrupts:
     description:
       Interrupt lines for each GPI instance
+    minItems: 1
     maxItems: 13
 
   "#dma-cells":
diff --git a/Bindings/extcon/maxim,max77843.yaml b/Bindings/extcon/maxim,max77843.yaml
index 03d6b8d..1289605 100644
--- a/Bindings/extcon/maxim,max77843.yaml
+++ b/Bindings/extcon/maxim,max77843.yaml
@@ -25,7 +25,7 @@
     $ref: /schemas/connector/usb-connector.yaml#
 
   ports:
-    $ref: /schemas/graph.yaml#/properties/port
+    $ref: /schemas/graph.yaml#/properties/ports
     description:
       Any connector to the data bus of this controller should be modelled using
       the OF graph bindings specified
diff --git a/Bindings/gpu/arm,mali-bifrost.yaml b/Bindings/gpu/arm,mali-bifrost.yaml
index 4d6bfae..85f8d47 100644
--- a/Bindings/gpu/arm,mali-bifrost.yaml
+++ b/Bindings/gpu/arm,mali-bifrost.yaml
@@ -20,6 +20,7 @@
           - mediatek,mt8183-mali
           - realtek,rtd1619-mali
           - renesas,r9a07g044-mali
+          - renesas,r9a07g054-mali
           - rockchip,px30-mali
           - rockchip,rk3568-mali
       - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
@@ -109,7 +110,9 @@
       properties:
         compatible:
           contains:
-            const: renesas,r9a07g044-mali
+            enum:
+              - renesas,r9a07g044-mali
+              - renesas,r9a07g054-mali
     then:
       properties:
         interrupts:
diff --git a/Bindings/hwmon/ti,tmp464.yaml b/Bindings/hwmon/ti,tmp464.yaml
index 801ca9b..e7493e2 100644
--- a/Bindings/hwmon/ti,tmp464.yaml
+++ b/Bindings/hwmon/ti,tmp464.yaml
@@ -58,9 +58,8 @@
           The value (two's complement) to be programmed in the channel specific N correction register.
           For remote channels only.
         $ref: /schemas/types.yaml#/definitions/int32
-        items:
-          minimum: -128
-          maximum: 127
+        minimum: -128
+        maximum: 127
 
     required:
       - reg
diff --git a/Bindings/iio/adc/adi,ad7476.yaml b/Bindings/iio/adc/adi,ad7476.yaml
index cf71108..666414a 100644
--- a/Bindings/iio/adc/adi,ad7476.yaml
+++ b/Bindings/iio/adc/adi,ad7476.yaml
@@ -98,6 +98,7 @@
               - ti,adc121s
               - ti,ads7866
               - ti,ads7868
+    then:
       required:
         - vcc-supply
   # Devices with a vref
diff --git a/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml b/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml
index 7c260f2..92f9472 100644
--- a/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml
+++ b/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml
@@ -108,9 +108,7 @@
           - [1-5]: order 1 to 5.
           For audio purpose it is recommended to use order 3 to 5.
         $ref: /schemas/types.yaml#/definitions/uint32
-        items:
-          minimum: 0
-          maximum: 5
+        maximum: 5
 
       "#io-channel-cells":
         const: 1
@@ -174,7 +172,7 @@
               contains:
                 const: st,stm32-dfsdm-adc
 
-      - then:
+        then:
           properties:
             st,adc-channels:
               minItems: 1
@@ -206,7 +204,7 @@
               contains:
                 const: st,stm32-dfsdm-dmic
 
-      - then:
+        then:
           properties:
             st,adc-channels:
               maxItems: 1
@@ -254,7 +252,7 @@
           contains:
             const: st,stm32h7-dfsdm
 
-  - then:
+    then:
       patternProperties:
         "^filter@[0-9]+$":
           properties:
@@ -269,7 +267,7 @@
           contains:
             const: st,stm32mp1-dfsdm
 
-  - then:
+    then:
       patternProperties:
         "^filter@[0-9]+$":
           properties:
diff --git a/Bindings/iio/dac/adi,ad5360.yaml b/Bindings/iio/dac/adi,ad5360.yaml
index 0d8fb56..65f86f2 100644
--- a/Bindings/iio/dac/adi,ad5360.yaml
+++ b/Bindings/iio/dac/adi,ad5360.yaml
@@ -59,9 +59,9 @@
           contains:
             enum:
               - adi,ad5371
-      then:
-        required:
-          - vref2-supply
+    then:
+      required:
+        - vref2-supply
 
 examples:
   - |
diff --git a/Bindings/interconnect/qcom,rpm.yaml b/Bindings/interconnect/qcom,rpm.yaml
index 89853b4..8a676fe 100644
--- a/Bindings/interconnect/qcom,rpm.yaml
+++ b/Bindings/interconnect/qcom,rpm.yaml
@@ -93,48 +93,48 @@
               - qcom,sdm660-gnoc
               - qcom,sdm660-snoc
 
-      then:
-        properties:
-          clock-names:
-            items:
-              - const: bus
-              - const: bus_a
+    then:
+      properties:
+        clock-names:
+          items:
+            - const: bus
+            - const: bus_a
 
-          clocks:
-            items:
-              - description: Bus Clock
-              - description: Bus A Clock
+        clocks:
+          items:
+            - description: Bus Clock
+            - description: Bus A Clock
 
-        # Child node's properties
-        patternProperties:
-          '^interconnect-[a-z0-9]+$':
-            type: object
-            description:
-              snoc-mm is a child of snoc, sharing snoc's register address space.
+      # Child node's properties
+      patternProperties:
+        '^interconnect-[a-z0-9]+$':
+          type: object
+          description:
+            snoc-mm is a child of snoc, sharing snoc's register address space.
 
-            properties:
-              compatible:
-                enum:
-                  - qcom,msm8939-snoc-mm
+          properties:
+            compatible:
+              enum:
+                - qcom,msm8939-snoc-mm
 
-              '#interconnect-cells':
-                const: 1
+            '#interconnect-cells':
+              const: 1
 
-              clock-names:
-                items:
-                  - const: bus
-                  - const: bus_a
+            clock-names:
+              items:
+                - const: bus
+                - const: bus_a
 
-              clocks:
-                items:
-                  - description: Bus Clock
-                  - description: Bus A Clock
+            clocks:
+              items:
+                - description: Bus Clock
+                - description: Bus A Clock
 
-            required:
-              - compatible
-              - '#interconnect-cells'
-              - clock-names
-              - clocks
+          required:
+            - compatible
+            - '#interconnect-cells'
+            - clock-names
+            - clocks
 
   - if:
       properties:
diff --git a/Bindings/interrupt-controller/mrvl,intc.yaml b/Bindings/interrupt-controller/mrvl,intc.yaml
index 372ccbf..5a583bf 100644
--- a/Bindings/interrupt-controller/mrvl,intc.yaml
+++ b/Bindings/interrupt-controller/mrvl,intc.yaml
@@ -7,10 +7,8 @@
 title: Marvell MMP/Orion Interrupt controller bindings
 
 maintainers:
-  - Thomas Gleixner <tglx@linutronix.de>
-  - Jason Cooper <jason@lakedaemon.net>
-  - Marc Zyngier <maz@kernel.org>
-  - Rob Herring <robh+dt@kernel.org>
+  - Andrew Lunn <andrew@lunn.ch>
+  - Gregory Clement <gregory.clement@bootlin.com>
 
 allOf:
   - if:
diff --git a/Bindings/media/coda.yaml b/Bindings/media/coda.yaml
index 36781ee..c9d5adb 100644
--- a/Bindings/media/coda.yaml
+++ b/Bindings/media/coda.yaml
@@ -65,7 +65,6 @@
   iram:
     $ref: /schemas/types.yaml#/definitions/phandle
     description: phandle pointing to the SRAM device node
-    maxItems: 1
 
 required:
   - compatible
diff --git a/Bindings/media/mediatek,vcodec-decoder.yaml b/Bindings/media/mediatek,vcodec-decoder.yaml
index 9b179bb..aa55ca6 100644
--- a/Bindings/media/mediatek,vcodec-decoder.yaml
+++ b/Bindings/media/mediatek,vcodec-decoder.yaml
@@ -63,13 +63,11 @@
 
   mediatek,vpu:
     $ref: /schemas/types.yaml#/definitions/phandle
-    maxItems: 1
     description:
       Describes point to vpu.
 
   mediatek,scp:
     $ref: /schemas/types.yaml#/definitions/phandle
-    maxItems: 1
     description:
       Describes point to scp.
 
diff --git a/Bindings/media/mediatek,vcodec-encoder.yaml b/Bindings/media/mediatek,vcodec-encoder.yaml
index e7b65a9..deb5b65 100644
--- a/Bindings/media/mediatek,vcodec-encoder.yaml
+++ b/Bindings/media/mediatek,vcodec-encoder.yaml
@@ -55,13 +55,11 @@
 
   mediatek,vpu:
     $ref: /schemas/types.yaml#/definitions/phandle
-    maxItems: 1
     description:
       Describes point to vpu.
 
   mediatek,scp:
     $ref: /schemas/types.yaml#/definitions/phandle
-    maxItems: 1
     description:
       Describes point to scp.
 
@@ -106,7 +104,6 @@
           enum:
             - mediatek,mt8173-vcodec-enc
             - mediatek,mt8192-vcodec-enc
-            - mediatek,mt8173-vcodec-enc
 
     then:
       properties:
diff --git a/Bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Bindings/media/mediatek,vcodec-subdev-decoder.yaml
index 7687be0..c73bf23 100644
--- a/Bindings/media/mediatek,vcodec-subdev-decoder.yaml
+++ b/Bindings/media/mediatek,vcodec-subdev-decoder.yaml
@@ -61,7 +61,6 @@
 
   mediatek,scp:
     $ref: /schemas/types.yaml#/definitions/phandle
-    maxItems: 1
     description: |
       The node of system control processor (SCP), using
       the remoteproc & rpmsg framework.
diff --git a/Bindings/mmc/nvidia,tegra20-sdhci.yaml b/Bindings/mmc/nvidia,tegra20-sdhci.yaml
index ce64b34..f3f4d5b 100644
--- a/Bindings/mmc/nvidia,tegra20-sdhci.yaml
+++ b/Bindings/mmc/nvidia,tegra20-sdhci.yaml
@@ -197,6 +197,8 @@
               - nvidia,tegra30-sdhci
               - nvidia,tegra114-sdhci
               - nvidia,tegra124-sdhci
+    then:
+      properties:
         clocks:
           items:
             - description: module clock
diff --git a/Bindings/net/dsa/realtek.yaml b/Bindings/net/dsa/realtek.yaml
index 8756060..99ee4b5 100644
--- a/Bindings/net/dsa/realtek.yaml
+++ b/Bindings/net/dsa/realtek.yaml
@@ -27,32 +27,25 @@
   The realtek-mdio driver is an MDIO driver and it must be inserted inside
   an MDIO node.
 
+  The compatible string is only used to identify which (silicon) family the
+  switch belongs to. Roughly speaking, a family is any set of Realtek switches
+  whose chip identification register(s) have a common location and semantics.
+  The different models in a given family can be automatically disambiguated by
+  parsing the chip identification register(s) according to the given family,
+  avoiding the need for a unique compatible string for each model.
+
 properties:
   compatible:
     enum:
       - realtek,rtl8365mb
-      - realtek,rtl8366
       - realtek,rtl8366rb
-      - realtek,rtl8366s
-      - realtek,rtl8367
-      - realtek,rtl8367b
-      - realtek,rtl8367rb
-      - realtek,rtl8367s
-      - realtek,rtl8368s
-      - realtek,rtl8369
-      - realtek,rtl8370
     description: |
-      realtek,rtl8365mb: 4+1 ports
-      realtek,rtl8366: 5+1 ports
-      realtek,rtl8366rb: 5+1 ports
-      realtek,rtl8366s: 5+1 ports
-      realtek,rtl8367:
-      realtek,rtl8367b:
-      realtek,rtl8367rb: 5+2 ports
-      realtek,rtl8367s: 5+2 ports
-      realtek,rtl8368s: 8 ports
-      realtek,rtl8369: 8+1 ports
-      realtek,rtl8370: 8+2 ports
+      realtek,rtl8365mb:
+        Use with models RTL8363NB, RTL8363NB-VB, RTL8363SC, RTL8363SC-VB,
+        RTL8364NB, RTL8364NB-VB, RTL8365MB, RTL8366SC, RTL8367RB-VB, RTL8367S,
+        RTL8367SB, RTL8370MB, RTL8310SR
+      realtek,rtl8366rb:
+        Use with models RTL8366RB, RTL8366S
 
   mdc-gpios:
     description: GPIO line for the MDC clock line.
@@ -335,7 +328,7 @@
             #size-cells = <0>;
 
             switch@29 {
-                    compatible = "realtek,rtl8367s";
+                    compatible = "realtek,rtl8365mb";
                     reg = <29>;
 
                     reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
diff --git a/Bindings/net/ethernet-controller.yaml b/Bindings/net/ethernet-controller.yaml
index 817794e..4f15463 100644
--- a/Bindings/net/ethernet-controller.yaml
+++ b/Bindings/net/ethernet-controller.yaml
@@ -106,6 +106,12 @@
   phy-mode:
     $ref: "#/properties/phy-connection-type"
 
+  pcs-handle:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Specifies a reference to a node representing a PCS PHY device on a MDIO
+      bus to link with an external PHY (phy-handle) if exists.
+
   phy-handle:
     $ref: /schemas/types.yaml#/definitions/phandle
     description:
diff --git a/Bindings/net/micrel.txt b/Bindings/net/micrel.txt
index c5ab62c..8d157f0 100644
--- a/Bindings/net/micrel.txt
+++ b/Bindings/net/micrel.txt
@@ -45,20 +45,3 @@
 
 	In fiber mode, auto-negotiation is disabled and the PHY can only work in
 	100base-fx (full and half duplex) modes.
-
- - lan8814,ignore-ts: If present the PHY will not support timestamping.
-
-	This option acts as check whether Timestamping is supported by
-	hardware or not. LAN8814 phy support hardware tmestamping.
-
- - lan8814,latency_rx_10: Configures Latency value of phy in ingress at 10 Mbps.
-
- - lan8814,latency_tx_10: Configures Latency value of phy in egress at 10 Mbps.
-
- - lan8814,latency_rx_100: Configures Latency value of phy in ingress at 100 Mbps.
-
- - lan8814,latency_tx_100: Configures Latency value of phy in egress at 100 Mbps.
-
- - lan8814,latency_rx_1000: Configures Latency value of phy in ingress at 1000 Mbps.
-
- - lan8814,latency_tx_1000: Configures Latency value of phy in egress at 1000 Mbps.
diff --git a/Bindings/net/snps,dwmac.yaml b/Bindings/net/snps,dwmac.yaml
index 2d5248f..36c85eb 100644
--- a/Bindings/net/snps,dwmac.yaml
+++ b/Bindings/net/snps,dwmac.yaml
@@ -53,20 +53,18 @@
         - allwinner,sun8i-r40-gmac
         - allwinner,sun8i-v3s-emac
         - allwinner,sun50i-a64-emac
-        - loongson,ls2k-dwmac
-        - loongson,ls7a-dwmac
         - amlogic,meson6-dwmac
         - amlogic,meson8b-dwmac
         - amlogic,meson8m2-dwmac
         - amlogic,meson-gxbb-dwmac
         - amlogic,meson-axg-dwmac
-        - loongson,ls2k-dwmac
-        - loongson,ls7a-dwmac
         - ingenic,jz4775-mac
         - ingenic,x1000-mac
         - ingenic,x1600-mac
         - ingenic,x1830-mac
         - ingenic,x2000-mac
+        - loongson,ls2k-dwmac
+        - loongson,ls7a-dwmac
         - rockchip,px30-gmac
         - rockchip,rk3128-gmac
         - rockchip,rk3228-gmac
diff --git a/Bindings/net/socionext,uniphier-ave4.yaml b/Bindings/net/socionext,uniphier-ave4.yaml
index e602761..b0ebcef 100644
--- a/Bindings/net/socionext,uniphier-ave4.yaml
+++ b/Bindings/net/socionext,uniphier-ave4.yaml
@@ -13,9 +13,6 @@
   This describes the devicetree bindings for AVE ethernet controller
   implemented on Socionext UniPhier SoCs.
 
-allOf:
-  - $ref: ethernet-controller.yaml#
-
 properties:
   compatible:
     enum:
@@ -44,25 +41,13 @@
     minItems: 1
     maxItems: 4
 
-  clock-names:
-    oneOf:
-      - items:          # for Pro4
-          - const: gio
-          - const: ether
-          - const: ether-gb
-          - const: ether-phy
-      - const: ether    # for others
+  clock-names: true
 
   resets:
     minItems: 1
     maxItems: 2
 
-  reset-names:
-    oneOf:
-      - items:          # for Pro4
-          - const: gio
-          - const: ether
-      - const: ether    # for others
+  reset-names: true
 
   socionext,syscon-phy-mode:
     $ref: /schemas/types.yaml#/definitions/phandle-array
@@ -78,6 +63,42 @@
     $ref: mdio.yaml#
     unevaluatedProperties: false
 
+allOf:
+  - $ref: ethernet-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: socionext,uniphier-pro4-ave4
+    then:
+      properties:
+        clocks:
+          minItems: 4
+          maxItems: 4
+        clock-names:
+          items:
+            - const: gio
+            - const: ether
+            - const: ether-gb
+            - const: ether-phy
+        resets:
+          minItems: 2
+          maxItems: 2
+        reset-names:
+          items:
+            - const: gio
+            - const: ether
+    else:
+      properties:
+        clocks:
+          maxItems: 1
+        clock-names:
+          const: ether
+        resets:
+          maxItems: 1
+        reset-names:
+          const: ether
+
 required:
   - compatible
   - reg
@@ -90,7 +111,7 @@
   - reset-names
   - mdio
 
-additionalProperties: false
+unevaluatedProperties: false
 
 examples:
   - |
diff --git a/Bindings/net/ti,davinci-mdio.yaml b/Bindings/net/ti,davinci-mdio.yaml
index dbfca5e..6f44f95 100644
--- a/Bindings/net/ti,davinci-mdio.yaml
+++ b/Bindings/net/ti,davinci-mdio.yaml
@@ -56,6 +56,7 @@
     compatible:
       contains:
         const: ti,davinci_mdio
+then:
   required:
     - bus_freq
 
diff --git a/Bindings/net/xilinx_axienet.txt b/Bindings/net/xilinx_axienet.txt
index b8e4894..1aa4c60 100644
--- a/Bindings/net/xilinx_axienet.txt
+++ b/Bindings/net/xilinx_axienet.txt
@@ -26,7 +26,8 @@
 		  specified, the TX/RX DMA interrupts should be on that node
 		  instead, and only the Ethernet core interrupt is optionally
 		  specified here.
-- phy-handle	: Should point to the external phy device.
+- phy-handle	: Should point to the external phy device if exists. Pointing
+		  this to the PCS/PMA PHY is deprecated and should be avoided.
 		  See ethernet.txt file in the same directory.
 - xlnx,rxmem	: Set to allocated memory buffer for Rx/Tx in the hardware
 
@@ -68,6 +69,11 @@
 		  required through the core's MDIO interface (i.e. always,
 		  unless the PHY is accessed through a different bus).
 
+ - pcs-handle: 	  Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
+		  modes, where "pcs-handle" should be used to point
+		  to the PCS/PMA PHY, and "phy-handle" should point to an
+		  external PHY if exists.
+
 Example:
 	axi_ethernet_eth: ethernet@40c00000 {
 		compatible = "xlnx,axi-ethernet-1.00.a";
diff --git a/Bindings/phy/nvidia,tegra20-usb-phy.yaml b/Bindings/phy/nvidia,tegra20-usb-phy.yaml
index dfde0ea..d61585c 100644
--- a/Bindings/phy/nvidia,tegra20-usb-phy.yaml
+++ b/Bindings/phy/nvidia,tegra20-usb-phy.yaml
@@ -275,17 +275,17 @@
           - nvidia,hssquelch-level
           - nvidia,hsdiscon-level
 
-        else:
-          properties:
-            clocks:
-              maxItems: 4
+      else:
+        properties:
+          clocks:
+            maxItems: 4
 
-            clock-names:
-              items:
-                - const: reg
-                - const: pll_u
-                - const: timer
-                - const: utmi-pads
+          clock-names:
+            items:
+              - const: reg
+              - const: pll_u
+              - const: timer
+              - const: utmi-pads
 
   - if:
       properties:
diff --git a/Bindings/phy/qcom,usb-hs-phy.yaml b/Bindings/phy/qcom,usb-hs-phy.yaml
index e23e559..0655e48 100644
--- a/Bindings/phy/qcom,usb-hs-phy.yaml
+++ b/Bindings/phy/qcom,usb-hs-phy.yaml
@@ -14,24 +14,24 @@
     compatible:
       contains:
         const: qcom,usb-hs-phy-apq8064
-  then:
-    properties:
-      resets:
-        maxItems: 1
+then:
+  properties:
+    resets:
+      maxItems: 1
 
-      reset-names:
-        const: por
+    reset-names:
+      const: por
 
-  else:
-    properties:
-      resets:
-        minItems: 2
-        maxItems: 2
+else:
+  properties:
+    resets:
+      minItems: 2
+      maxItems: 2
 
-      reset-names:
-        items:
-          - const: phy
-          - const: por
+    reset-names:
+      items:
+        - const: phy
+        - const: por
 
 properties:
   compatible:
@@ -92,6 +92,8 @@
 examples:
   - |
     otg: usb-controller {
+      #reset-cells = <1>;
+
       ulpi {
         phy {
           compatible = "qcom,usb-hs-phy-msm8974", "qcom,usb-hs-phy";
diff --git a/Bindings/pinctrl/cirrus,madera.yaml b/Bindings/pinctrl/cirrus,madera.yaml
index 8a90d82..6bd42e4 100644
--- a/Bindings/pinctrl/cirrus,madera.yaml
+++ b/Bindings/pinctrl/cirrus,madera.yaml
@@ -48,13 +48,12 @@
               Name of one pin group to configure.
             enum: [ aif1, aif2, aif3, aif4, mif1, mif2, mif3, pdmspk1,
                     pdmspk2, dmic4, dmic5, dmic6, gpio1, gpio2, gpio3,
-                    gpio4, gpio5, gpio6, gpio7, gpio7, gpio8, gpio9,
+                    gpio4, gpio5, gpio6, gpio7, gpio8, gpio9,
                     gpio10, gpio11, gpio12, gpio13, gpio14, gpio15,
-                    gpio16, gpio17, gpio17, gpio18, gpio19, gpio20,
-                    gpio21, gpio22, gpio23, gpio24, gpio25, gpio26,
-                    gpio27, gpio27, gpio28, gpio29, gpio30, gpio31,
-                    gpio32, gpio33, gpio34, gpio35, gpio36, gpio37,
-                    gpio37, gpio38, gpio39 ]
+                    gpio16, gpio17, gpio18, gpio19, gpio20, gpio21,
+                    gpio22, gpio23, gpio24, gpio25, gpio26, gpio27,
+                    gpio28, gpio29, gpio30, gpio31, gpio32, gpio33,
+                    gpio34, gpio35, gpio36, gpio37, gpio38, gpio39 ]
 
           function:
             description:
diff --git a/Bindings/power/renesas,apmu.yaml b/Bindings/power/renesas,apmu.yaml
index 4d293b2..d77fc88 100644
--- a/Bindings/power/renesas,apmu.yaml
+++ b/Bindings/power/renesas,apmu.yaml
@@ -36,7 +36,8 @@
   cpus:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     items:
-      maxItems: 1
+      minItems: 1
+      maxItems: 4
     description: |
       Array of phandles pointing to CPU cores, which should match the order of
       CPU cores used by the WUPCR and PSTR registers in the Advanced Power
diff --git a/Bindings/power/supply/bq2415x.yaml b/Bindings/power/supply/bq2415x.yaml
index f8461f0..118cf48 100644
--- a/Bindings/power/supply/bq2415x.yaml
+++ b/Bindings/power/supply/bq2415x.yaml
@@ -17,7 +17,6 @@
   compatible:
     enum:
       - ti,bq24150
-      - ti,bq24150
       - ti,bq24150a
       - ti,bq24151
       - ti,bq24151a
diff --git a/Bindings/regulator/fixed-regulator.yaml b/Bindings/regulator/fixed-regulator.yaml
index 9b131c6..84eeaef 100644
--- a/Bindings/regulator/fixed-regulator.yaml
+++ b/Bindings/regulator/fixed-regulator.yaml
@@ -18,23 +18,23 @@
 
 allOf:
   - $ref: "regulator.yaml#"
-
-if:
-  properties:
-    compatible:
-      contains:
-        const: regulator-fixed-clock
-  required:
-    - clocks
-else:
-  if:
-    properties:
-      compatible:
-        contains:
-          const: regulator-fixed-domain
-    required:
-      - power-domains
-      - required-opps
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: regulator-fixed-clock
+    then:
+      required:
+        - clocks
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: regulator-fixed-domain
+    then:
+      required:
+        - power-domains
+        - required-opps
 
 properties:
   compatible:
diff --git a/Bindings/regulator/richtek,rt5190a-regulator.yaml b/Bindings/regulator/richtek,rt5190a-regulator.yaml
index 28725c5..edb411b 100644
--- a/Bindings/regulator/richtek,rt5190a-regulator.yaml
+++ b/Bindings/regulator/richtek,rt5190a-regulator.yaml
@@ -58,7 +58,7 @@
         type: object
         $ref: regulator.yaml#
         description: |
-          regulator description for buck1 and buck4.
+          regulator description for buck1 to buck4, and ldo.
 
         properties:
           regulator-allowed-modes:
diff --git a/Bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
index 2424de7..d99a729 100644
--- a/Bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
+++ b/Bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
@@ -104,8 +104,7 @@
   qcom,smem-state-names:
     $ref: /schemas/types.yaml#/definitions/string
     description: The names of the state bits used for SMP2P output
-    items:
-      - const: stop
+    const: stop
 
   glink-edge:
     type: object
@@ -130,7 +129,6 @@
       qcom,remote-pid:
         $ref: /schemas/types.yaml#/definitions/uint32
         description: ID of the shared memory used by GLINK for communication with WPSS
-        maxItems: 1
 
     required:
       - interrupts
diff --git a/Bindings/rtc/microchip,mfps-rtc.yaml b/Bindings/rtc/microchip,mfps-rtc.yaml
index a2e984e..500c62b 100644
--- a/Bindings/rtc/microchip,mfps-rtc.yaml
+++ b/Bindings/rtc/microchip,mfps-rtc.yaml
@@ -31,11 +31,19 @@
           to that of the RTC's count register.
 
   clocks:
-    maxItems: 1
+    items:
+      - description: |
+          AHB clock
+      - description: |
+          Reference clock: divided by the prescaler to create a time-based
+          strobe (typically 1 Hz) for the calendar counter. By default, the rtc
+          on the PolarFire SoC shares it's reference with MTIMER so this will
+          be a 1 MHz clock.
 
   clock-names:
     items:
       - const: rtc
+      - const: rtcref
 
 required:
   - compatible
@@ -48,11 +56,12 @@
 
 examples:
   - |
+    #include "dt-bindings/clock/microchip,mpfs-clock.h"
     rtc@20124000 {
         compatible = "microchip,mpfs-rtc";
         reg = <0x20124000 0x1000>;
-        clocks = <&clkcfg 21>;
-        clock-names = "rtc";
+        clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;
+        clock-names = "rtc", "rtcref";
         interrupts = <80>, <81>;
     };
 ...
diff --git a/Bindings/sound/st,stm32-sai.yaml b/Bindings/sound/st,stm32-sai.yaml
index b3dbcba..fe2e155 100644
--- a/Bindings/sound/st,stm32-sai.yaml
+++ b/Bindings/sound/st,stm32-sai.yaml
@@ -136,8 +136,7 @@
         compatible:
           contains:
             const: st,stm32f4-sai
-
-  - then:
+    then:
       properties:
         clocks:
           items:
@@ -148,8 +147,7 @@
           items:
             - const: x8k
             - const: x11k
-
-  - else:
+    else:
       properties:
         clocks:
           items:
diff --git a/Bindings/spi/renesas,sh-msiof.yaml b/Bindings/spi/renesas,sh-msiof.yaml
index b104899..5de710a 100644
--- a/Bindings/spi/renesas,sh-msiof.yaml
+++ b/Bindings/spi/renesas,sh-msiof.yaml
@@ -124,7 +124,6 @@
     description: |
       Override the default TX fifo size.  Unit is words.  Ignored if 0.
     $ref: /schemas/types.yaml#/definitions/uint32
-    maxItems: 1
     default: 64
 
   renesas,rx-fifo-size:
@@ -132,7 +131,6 @@
     description: |
       Override the default RX fifo size.  Unit is words.  Ignored if 0.
     $ref: /schemas/types.yaml#/definitions/uint32
-    maxItems: 1
     default: 64
 
 required:
diff --git a/Bindings/sram/sram.yaml b/Bindings/sram/sram.yaml
index 668a9a4..993430b 100644
--- a/Bindings/sram/sram.yaml
+++ b/Bindings/sram/sram.yaml
@@ -136,14 +136,14 @@
   - reg
 
 if:
-  properties:
-    compatible:
-      contains:
-        enum:
-          - qcom,rpm-msg-ram
-          - rockchip,rk3288-pmu-sram
-
-else:
+  not:
+    properties:
+      compatible:
+        contains:
+          enum:
+            - qcom,rpm-msg-ram
+            - rockchip,rk3288-pmu-sram
+then:
   required:
     - "#address-cells"
     - "#size-cells"
diff --git a/include/dt-bindings/clock/microchip,mpfs-clock.h b/include/dt-bindings/clock/microchip,mpfs-clock.h
index 73f2a93..4048669 100644
--- a/include/dt-bindings/clock/microchip,mpfs-clock.h
+++ b/include/dt-bindings/clock/microchip,mpfs-clock.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
 /*
  * Daire McNamara,<daire.mcnamara@microchip.com>
- * Copyright (C) 2020 Microchip Technology Inc.  All rights reserved.
+ * Copyright (C) 2020-2022 Microchip Technology Inc.  All rights reserved.
  */
 
 #ifndef _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_
@@ -42,4 +42,7 @@
 #define CLK_ATHENA	31
 #define CLK_CFM		32
 
+#define CLK_RTCREF	33
+#define CLK_MSSPLL	34
+
 #endif	/* _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_ */
diff --git a/include/dt-bindings/input/linux-event-codes.h b/include/dt-bindings/input/linux-event-codes.h
index 7989d94..dff8e7f 100644
--- a/include/dt-bindings/input/linux-event-codes.h
+++ b/include/dt-bindings/input/linux-event-codes.h
@@ -662,6 +662,27 @@
 /* Select an area of screen to be copied */
 #define KEY_SELECTIVE_SCREENSHOT	0x27a
 
+/* Move the focus to the next or previous user controllable element within a UI container */
+#define KEY_NEXT_ELEMENT               0x27b
+#define KEY_PREVIOUS_ELEMENT           0x27c
+
+/* Toggle Autopilot engagement */
+#define KEY_AUTOPILOT_ENGAGE_TOGGLE    0x27d
+
+/* Shortcut Keys */
+#define KEY_MARK_WAYPOINT              0x27e
+#define KEY_SOS                                0x27f
+#define KEY_NAV_CHART                  0x280
+#define KEY_FISHING_CHART              0x281
+#define KEY_SINGLE_RANGE_RADAR         0x282
+#define KEY_DUAL_RANGE_RADAR           0x283
+#define KEY_RADAR_OVERLAY              0x284
+#define KEY_TRADITIONAL_SONAR          0x285
+#define KEY_CLEARVU_SONAR              0x286
+#define KEY_SIDEVU_SONAR               0x287
+#define KEY_NAV_INFO                   0x288
+#define KEY_BRIGHTNESS_MENU            0x289
+
 /*
  * Some keyboards have keys which do not have a defined meaning, these keys
  * are intended to be programmed / bound to macros by the user. For most
diff --git a/src/arc/hsdk.dts b/src/arc/hsdk.dts
index dcaa44e..f48ba03 100644
--- a/src/arc/hsdk.dts
+++ b/src/arc/hsdk.dts
@@ -275,7 +275,7 @@
 			cs-gpios = <&creg_gpio 0 GPIO_ACTIVE_LOW>,
 				   <&creg_gpio 1 GPIO_ACTIVE_LOW>;
 
-			spi-flash@0 {
+			flash@0 {
 				compatible = "sst26wf016b", "jedec,spi-nor";
 				reg = <0>;
 				#address-cells = <1>;
diff --git a/src/riscv/microchip/microchip-mpfs-fabric.dtsi b/src/riscv/microchip/microchip-mpfs-fabric.dtsi
index 854320e..ccaac33 100644
--- a/src/riscv/microchip/microchip-mpfs-fabric.dtsi
+++ b/src/riscv/microchip/microchip-mpfs-fabric.dtsi
@@ -7,7 +7,7 @@
 		reg = <0x0 0x41000000 0x0 0xF0>;
 		microchip,sync-update-mask = /bits/ 32 <0>;
 		#pwm-cells = <2>;
-		clocks = <&clkcfg CLK_FIC3>;
+		clocks = <&fabric_clk3>;
 		status = "disabled";
 	};
 
@@ -16,10 +16,22 @@
 		reg = <0x0 0x44000000 0x0 0x1000>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		clocks = <&clkcfg CLK_FIC3>;
+		clocks = <&fabric_clk3>;
 		interrupt-parent = <&plic>;
 		interrupts = <122>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};
+
+	fabric_clk3: fabric-clk3 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <62500000>;
+	};
+
+	fabric_clk1: fabric-clk1 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <125000000>;
+	};
 };
diff --git a/src/riscv/microchip/microchip-mpfs-icicle-kit.dts b/src/riscv/microchip/microchip-mpfs-icicle-kit.dts
index cd2fe80..3392153 100644
--- a/src/riscv/microchip/microchip-mpfs-icicle-kit.dts
+++ b/src/riscv/microchip/microchip-mpfs-icicle-kit.dts
@@ -45,7 +45,7 @@
 };
 
 &refclk {
-	clock-frequency = <600000000>;
+	clock-frequency = <125000000>;
 };
 
 &mmuart1 {
diff --git a/src/riscv/microchip/microchip-mpfs.dtsi b/src/riscv/microchip/microchip-mpfs.dtsi
index c5c9d13..746c4d4 100644
--- a/src/riscv/microchip/microchip-mpfs.dtsi
+++ b/src/riscv/microchip/microchip-mpfs.dtsi
@@ -141,7 +141,7 @@
 		};
 	};
 
-	refclk: msspllclk {
+	refclk: mssrefclk {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
 	};
@@ -190,7 +190,7 @@
 
 		clkcfg: clkcfg@20002000 {
 			compatible = "microchip,mpfs-clkcfg";
-			reg = <0x0 0x20002000 0x0 0x1000>;
+			reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
 			clocks = <&refclk>;
 			#clock-cells = <1>;
 		};
@@ -393,8 +393,8 @@
 			reg = <0x0 0x20124000 0x0 0x1000>;
 			interrupt-parent = <&plic>;
 			interrupts = <80>, <81>;
-			clocks = <&clkcfg CLK_RTC>;
-			clock-names = "rtc";
+			clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;
+			clock-names = "rtc", "rtcref";
 			status = "disabled";
 		};
 
@@ -424,7 +424,7 @@
 					<0 0 0 3 &pcie_intc 2>,
 					<0 0 0 4 &pcie_intc 3>;
 			interrupt-map-mask = <0 0 0 7>;
-			clocks = <&clkcfg CLK_FIC0>, <&clkcfg CLK_FIC1>, <&clkcfg CLK_FIC3>;
+			clocks = <&fabric_clk1>, <&fabric_clk1>, <&fabric_clk3>;
 			clock-names = "fic0", "fic1", "fic3";
 			ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>;
 			msi-parent = <&pcie>;