)]}'
{
  "commit": "6ce3b78df9afdcf7ccb3db54d8cb51da7a3c19af",
  "tree": "58edc5950a8d0561aad8999afe1fa3d4b53ef392",
  "parents": [
    "5ea472f3bf7c866388d2eb775e9a079794dc8d89",
    "5d4c6f999c798df998730d93c8da09b33669c1eb"
  ],
  "author": {
    "name": "Krzysztof Kozlowski",
    "email": "krzk@kernel.org",
    "time": "Sat Mar 14 12:01:58 2026 +0100"
  },
  "committer": {
    "name": "Krzysztof Kozlowski",
    "email": "krzk@kernel.org",
    "time": "Sat Mar 14 12:01:58 2026 +0100"
  },
  "message": "Merge tag \u0027renesas-fixes-for-v7.0-tag1\u0027 of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes\n\nRenesas fixes for v7.0\n\n  - Fix SD card initialization on the RZ/T2H and RZ/N2H EVK boards,\n  - Remove WDT nodes meant for other CPU cores on the RZ/V2H(P) SoC,\n  - Fix Clock Pulse Generator registers on the RZ/T2H and RZ/N2H SoCs,\n  - Fix Versa3-related boot hangs on the RZ/G3S SoM,\n  - Fix Extended SPI interrupts on the R-Car X5H SoC.\n\n* tag \u0027renesas-fixes-for-v7.0-tag1\u0027 of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:\n  arm64: dts: renesas: r8a78000: Fix out-of-range SPI interrupt numbers\n  arm64: dts: renesas: rzg3s-smarc-som: Set bypass for Versa3 PLL2\n  arm64: dts: renesas: r9a09g087: Fix CPG register region sizes\n  arm64: dts: renesas: r9a09g077: Fix CPG register region sizes\n  arm64: dts: renesas: r9a09g057: Remove wdt{0,2,3} nodes\n  arm64: dts: renesas: rzv2-evk-cn15-sd: Add ramp delay for SD0 regulator\n  arm64: dts: renesas: rzt2h-n2h-evk: Add ramp delay for SD0 card regulator\n\nSigned-off-by: Krzysztof Kozlowski \u003ckrzk@kernel.org\u003e\n\n[ upstream commit: e2dcc248c3db0a420f07fba5638599e50866db62 ]\n",
  "tree_diff": []
}