)]}'
{
  "commit": "7e28131c064fda24300010a5ba526930ffad0ed2",
  "tree": "0b19073567bdf503d848f61fded0805495b8de50",
  "parents": [
    "74778076674493bdb69e9f1e9dcbb4555068672e"
  ],
  "author": {
    "name": "Lad Prabhakar",
    "email": "prabhakar.mahadev-lad.rj@bp.renesas.com",
    "time": "Fri May 01 11:24:07 2026 +0100"
  },
  "committer": {
    "name": "Bjorn Helgaas",
    "email": "bhelgaas@google.com",
    "time": "Tue Jun 23 12:24:30 2026 -0500"
  },
  "message": "dt-bindings: PCI: renesas,r9a08g045-pcie: Add RZ/V2N support\n\nDocument the Renesas RZ/V2N PCIe host controller, which is compatible with\nthe RZ/G3E PCIe IP and therefore uses it as a fallback compatible. The\nonly difference is that it uses device ID 0x003B.\n\nMake the binding title generic to avoid extending the title for each new\nSoC, and update the description to list the supported SoCs and their\ncapabilities.\n\nSigned-off-by: Lad Prabhakar \u003cprabhakar.mahadev-lad.rj@bp.renesas.com\u003e\nSigned-off-by: Manivannan Sadhasivam \u003cmani@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nReviewed-by: Claudiu Beznea \u003cclaudiu.beznea.uj@bp.renesas.com\u003e\nAcked-by: Rob Herring (Arm) \u003crobh@kernel.org\u003e\nLink: https://patch.msgid.link/20260501102407.29462-1-prabhakar.mahadev-lad.rj@bp.renesas.com\n\n[ upstream commit: e8433f632171c5a8c9c43dfa61d347b09ab1ecc3 ]\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a67108c48feb8a88a8b864a01ac5e53606411e7e",
      "old_mode": 33188,
      "old_path": "Bindings/pci/renesas,r9a08g045-pcie.yaml",
      "new_id": "90086909e92102e44748fec109786c72a459c9b9",
      "new_mode": 33188,
      "new_path": "Bindings/pci/renesas,r9a08g045-pcie.yaml"
    }
  ]
}
