| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/ti/ti,clksel.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Binding for TI clksel clock |
| |
| maintainers: |
| - Tony Lindgren <tony@atomide.com> |
| |
| description: | |
| The TI CLKSEL clocks consist of consist of input clock mux bits, and in some |
| cases also has divider, multiplier and gate bits. |
| |
| properties: |
| compatible: |
| const: ti,clksel |
| |
| reg: |
| maxItems: 1 |
| description: The CLKSEL register range |
| |
| '#address-cells': |
| enum: [ 0, 1, 2 ] |
| |
| '#size-cells': |
| enum: [ 0, 1, 2 ] |
| |
| ranges: true |
| |
| "#clock-cells": |
| const: 2 |
| description: The CLKSEL register and bit offset |
| |
| required: |
| - compatible |
| - reg |
| - "#clock-cells" |
| |
| additionalProperties: |
| type: object |
| |
| examples: |
| - | |
| clksel_gfx_fclk: clock@52c { |
| compatible = "ti,clksel"; |
| reg = <0x25c 0x4>; |
| #clock-cells = <2>; |
| }; |
| ... |
