src/powerpc/mucmc52.dts

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Manroland mucmc52 board Device Tree Source
 *
 * Copyright (C) 2009 DENX Software Engineering GmbH
 * Heiko Schocher <hs@denx.de>
 * Copyright 2006-2007 Secret Lab Technologies Ltd.
 */

/include/ "mpc5200b.dtsi"

/* Timer pins that need to be in GPIO mode */
&gpt0 { gpio-controller; };
&gpt1 { gpio-controller; };
&gpt2 { gpio-controller; };
&gpt3 { gpio-controller; };

/* Disabled timers */
&gpt4 { status = "disabled"; };
&gpt5 { status = "disabled"; };
&gpt6 { status = "disabled"; };
&gpt7 { status = "disabled"; };

/ {
	model = "manroland,mucmc52";
	compatible = "manroland,mucmc52";

	soc5200@f0000000 {
		rtc@800 {
			status = "disabled";
		};

		can@900 {
			status = "disabled";
		};

		can@980 {
			status = "disabled";
		};

		spi@f00 {
			status = "disabled";
		};

		usb@1000 {
			status = "disabled";
		};

		psc@2000 {		// PSC1
			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
		};

		psc@2200 {		// PSC2
			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
		};

		psc@2400 {		// PSC3
			status = "disabled";
		};

		psc@2600 {		// PSC4
			status = "disabled";
		};

		psc@2800 {		// PSC5
			status = "disabled";
		};

		psc@2c00 {		// PSC6
			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
		};

		ethernet@3000 {
			phy-handle = <&phy0>;
		};

		mdio@3000 {
			phy0: ethernet-phy@0 {
				compatible = "intel,lxt971";
				reg = <0>;
			};
		};

		i2c@3d00 {
			status = "disabled";
		};

		i2c@3d40 {
			hwmon@2c {
				compatible = "ad,adm9240";
				reg = <0x2c>;
			};
			rtc@51 {
				compatible = "nxp,pcf8563";
				reg = <0x51>;
			};
		};
	};

	pci@f0000d00 {
		interrupt-map-mask = <0xf800 0 0 7>;
		interrupt-map = <
				/* IDSEL 0x10 */
				0x8000 0 0 1 &mpc5200_pic 0 3 3
				0x8000 0 0 2 &mpc5200_pic 0 3 3
				0x8000 0 0 3 &mpc5200_pic 0 2 3
				0x8000 0 0 4 &mpc5200_pic 0 1 3
				>;
		ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000>,
			 <0x02000000 0 0x90000000 0x90000000 0 0x10000000>,
			 <0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
	};

	localbus {
		ranges = <0 0 0xff800000 0x00800000
			  1 0 0x80000000 0x00800000
			  3 0 0x80000000 0x00800000>;

		flash@0,0 {
			compatible = "cfi-flash";
			reg = <0 0 0x00800000>;
			bank-width = <4>;
			device-width = <2>;
			#size-cells = <1>;
			#address-cells = <1>;
			partition@0 {
				label = "DTS";
				reg = <0x0 0x00100000>;
			};
			partition@100000 {
				label = "Kernel";
				reg = <0x100000 0x00200000>;
			};
			partition@300000 {
				label = "RootFS";
				reg = <0x00300000 0x00200000>;
			};
			partition@500000 {
				label = "user";
				reg = <0x00500000 0x00200000>;
			};
			partition@700000 {
				label = "U-Boot";
				reg = <0x00700000 0x00040000>;
			};
			partition@740000 {
				label = "Env";
				reg = <0x00740000 0x00020000>;
			};
			partition@760000 {
				label = "red. Env";
				reg = <0x00760000 0x00020000>;
			};
			partition@780000 {
				label = "reserve";
				reg = <0x00780000 0x00080000>;
			};
		};

		simple100: gpio-controller-100@3,600100 {
			compatible = "manroland,mucmc52-aux-gpio";
			reg = <3 0x00600100 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};
		simple104: gpio-controller-104@3,600104 {
			compatible = "manroland,mucmc52-aux-gpio";
			reg = <3 0x00600104 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};
		simple200: gpio-controller-200@3,600200 {
			compatible = "manroland,mucmc52-aux-gpio";
			reg = <3 0x00600200 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};
		simple201: gpio-controller-201@3,600201 {
			compatible = "manroland,mucmc52-aux-gpio";
			reg = <3 0x00600201 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};
		simple202: gpio-controller-202@3,600202 {
			compatible = "manroland,mucmc52-aux-gpio";
			reg = <3 0x00600202 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};
		simple203: gpio-controller-203@3,600203 {
			compatible = "manroland,mucmc52-aux-gpio";
			reg = <3 0x00600203 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};
		simple204: gpio-controller-204@3,600204 {
			compatible = "manroland,mucmc52-aux-gpio";
			reg = <3 0x00600204 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};
		simple206: gpio-controller-206@3,600206 {
			compatible = "manroland,mucmc52-aux-gpio";
			reg = <3 0x00600206 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};
		simple207: gpio-controller-207@3,600207 {
			compatible = "manroland,mucmc52-aux-gpio";
			reg = <3 0x00600207 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};
		simple20f: gpio-controller-20f@3,60020f {
			compatible = "manroland,mucmc52-aux-gpio";
			reg = <3 0x0060020f 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};

	};
};