Merge tag 'v6.4-rc3-dts-raw' Linux 6.4-rc3
diff --git a/Bindings/ata/ceva,ahci-1v84.yaml b/Bindings/ata/ceva,ahci-1v84.yaml index 9b31f86..71364c6 100644 --- a/Bindings/ata/ceva,ahci-1v84.yaml +++ b/Bindings/ata/ceva,ahci-1v84.yaml
@@ -32,7 +32,7 @@ maxItems: 1 iommus: - maxItems: 1 + maxItems: 4 power-domains: maxItems: 1
diff --git a/Bindings/display/msm/dsi-controller-main.yaml b/Bindings/display/msm/dsi-controller-main.yaml index e6c1ebf..130e16d 100644 --- a/Bindings/display/msm/dsi-controller-main.yaml +++ b/Bindings/display/msm/dsi-controller-main.yaml
@@ -82,6 +82,18 @@ Indicates if the DSI controller is driving a panel which needs 2 DSI links. + qcom,master-dsi: + type: boolean + description: | + Indicates if the DSI controller is the master DSI controller when + qcom,dual-dsi-mode enabled. + + qcom,sync-dual-dsi: + type: boolean + description: | + Indicates if the DSI controller needs to sync the other DSI controller + with MIPI DCS commands when qcom,dual-dsi-mode enabled. + assigned-clocks: minItems: 2 maxItems: 4
diff --git a/Bindings/net/can/st,stm32-bxcan.yaml b/Bindings/net/can/st,stm32-bxcan.yaml index 769fa5c..de1d429 100644 --- a/Bindings/net/can/st,stm32-bxcan.yaml +++ b/Bindings/net/can/st,stm32-bxcan.yaml
@@ -21,11 +21,22 @@ st,can-primary: description: - Primary and secondary mode of the bxCAN peripheral is only relevant - if the chip has two CAN peripherals. In that case they share some - of the required logic. + Primary mode of the bxCAN peripheral is only relevant if the chip has + two CAN peripherals in dual CAN configuration. In that case they share + some of the required logic. + Not to be used if the peripheral is in single CAN configuration. To avoid misunderstandings, it should be noted that ST documentation - uses the terms master/slave instead of primary/secondary. + uses the terms master instead of primary. + type: boolean + + st,can-secondary: + description: + Secondary mode of the bxCAN peripheral is only relevant if the chip + has two CAN peripherals in dual CAN configuration. In that case they + share some of the required logic. + Not to be used if the peripheral is in single CAN configuration. + To avoid misunderstandings, it should be noted that ST documentation + uses the terms slave instead of secondary. type: boolean reg:
diff --git a/Bindings/sound/tas2562.yaml b/Bindings/sound/tas2562.yaml index a5bb561..31a3024 100644 --- a/Bindings/sound/tas2562.yaml +++ b/Bindings/sound/tas2562.yaml
@@ -55,7 +55,9 @@ description: TDM TX current sense time slot. '#sound-dai-cells': - const: 1 + # The codec has a single DAI, the #sound-dai-cells=<1>; case is left in for backward + # compatibility but is deprecated. + enum: [0, 1] required: - compatible @@ -72,7 +74,7 @@ codec: codec@4c { compatible = "ti,tas2562"; reg = <0x4c>; - #sound-dai-cells = <1>; + #sound-dai-cells = <0>; interrupt-parent = <&gpio1>; interrupts = <14>; shutdown-gpios = <&gpio1 15 0>;
diff --git a/Bindings/sound/tas2770.yaml b/Bindings/sound/tas2770.yaml index 26088ad..8908bf1 100644 --- a/Bindings/sound/tas2770.yaml +++ b/Bindings/sound/tas2770.yaml
@@ -57,7 +57,9 @@ - 1 # Falling edge '#sound-dai-cells': - const: 1 + # The codec has a single DAI, the #sound-dai-cells=<1>; case is left in for backward + # compatibility but is deprecated. + enum: [0, 1] required: - compatible @@ -74,7 +76,7 @@ codec: codec@41 { compatible = "ti,tas2770"; reg = <0x41>; - #sound-dai-cells = <1>; + #sound-dai-cells = <0>; interrupt-parent = <&gpio1>; interrupts = <14>; reset-gpio = <&gpio1 15 0>;
diff --git a/Bindings/sound/tas27xx.yaml b/Bindings/sound/tas27xx.yaml index 8cba013..a876545 100644 --- a/Bindings/sound/tas27xx.yaml +++ b/Bindings/sound/tas27xx.yaml
@@ -50,7 +50,9 @@ description: TDM TX voltage sense time slot. '#sound-dai-cells': - const: 1 + # The codec has a single DAI, the #sound-dai-cells=<1>; case is left in for backward + # compatibility but is deprecated. + enum: [0, 1] required: - compatible @@ -67,7 +69,7 @@ codec: codec@38 { compatible = "ti,tas2764"; reg = <0x38>; - #sound-dai-cells = <1>; + #sound-dai-cells = <0>; interrupt-parent = <&gpio1>; interrupts = <14>; reset-gpios = <&gpio1 15 0>;
diff --git a/src/arm/stm32f429.dtsi b/src/arm/stm32f429.dtsi index c9e05e3..00bf53f 100644 --- a/src/arm/stm32f429.dtsi +++ b/src/arm/stm32f429.dtsi
@@ -387,6 +387,7 @@ interrupt-names = "tx", "rx0", "rx1", "sce"; resets = <&rcc STM32F4_APB1_RESET(CAN2)>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; + st,can-secondary; st,gcan = <&gcan>; status = "disabled"; };
diff --git a/src/arm/stm32f7-pinctrl.dtsi b/src/arm/stm32f7-pinctrl.dtsi index c8e6c52..9f65403 100644 --- a/src/arm/stm32f7-pinctrl.dtsi +++ b/src/arm/stm32f7-pinctrl.dtsi
@@ -283,6 +283,88 @@ slew-rate = <2>; }; }; + + can1_pins_a: can1-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can1_pins_b: can1-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can1_pins_c: can1-2 { + pins1 { + pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ + bias-pull-up; + + }; + }; + + can1_pins_d: can1-3 { + pins1 { + pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */ + bias-pull-up; + + }; + }; + + can2_pins_a: can2-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can2_pins_b: can2-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can3_pins_a: can3-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */ + bias-pull-up; + }; + }; + + can3_pins_b: can3-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */ + bias-pull-up; + }; + }; }; }; };