commit 2f8ba037c45925b372194df4bc27fca85fbeeffb
author Dinh Nguyen <dinguyen@kernel.org> Wed Jan 25 14:07:00 2023 -0600
committer Dinh Nguyen <dinguyen@kernel.org> Thu Jan 26 08:27:10 2023 -0600
tree 957b40643ea9b77fc8534dccc32e7024b395ed45
parent d17c1a3d6a091afdc3b65116faa98d3363082f6a

arm64: dts: socfpga: change address-cells to support 64-bit addressing

Update the address-cells and size-cells to 2 in order to support 64-bit
addressing.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index b488e8d..41c9eb5 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -134,9 +134,8 @@
 		ranges = <0 0 0 0xffffffff>;
 
 		base_fpga_region {
-			#address-cells = <0x1>;
-			#size-cells = <0x1>;
-
+			#address-cells = <0x2>;
+			#size-cells = <0x2>;
 			compatible = "fpga-region";
 			fpga-mgr = <&fpga_mgr>;
 		};

arch/arm64/boot/dts/intel/socfpga_agilex.dtsi

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index f22302a..f9674cc 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -139,8 +139,8 @@
 		ranges = <0 0 0 0xffffffff>;
 
 		base_fpga_region {
-			#address-cells = <0x1>;
-			#size-cells = <0x1>;
+			#address-cells = <0x2>;
+			#size-cells = <0x2>;
 			compatible = "fpga-region";
 			fpga-mgr = <&fpga_mgr>;
 		};