)]}'
{
  "commit": "62f392ea5b5f87b641e16e61a4cedda21ef7341f",
  "tree": "3392e1c0b10f851df98b18797c0637608887d624",
  "parents": [
    "d387a8d66670371e6be3b6d6bde2e38b8cade076"
  ],
  "author": {
    "name": "Jon Mason",
    "email": "mason@myri.com",
    "time": "Fri Oct 14 14:56:14 2011 -0500"
  },
  "committer": {
    "name": "Jesse Barnes",
    "email": "jbarnes@virtuousgeek.org",
    "time": "Thu Oct 27 12:45:43 2011 -0700"
  },
  "message": "PCI: enable MPS \"performance\" setting to properly handle bridge MPS\n\nRework the \"performance\" MPS option to configure the device MPS with the\nsmaller of the device MPSS or the bridge MPS (which is assumed to be\nproperly configured at this point to the largest allowable MPS based on\nits parent bus).\n\nAlso, rework the MRRS setting to report an inability to set the MRRS to\na valid setting.\n\nSigned-off-by: Jon Mason \u003cmason@myri.com\u003e\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6ab6bd3df4b25582f8fec61fbda9779333273a95",
      "old_mode": 33188,
      "old_path": "drivers/pci/probe.c",
      "new_id": "4829424398521a659755ae7135075645fe87afd3",
      "new_mode": 33188,
      "new_path": "drivers/pci/probe.c"
    }
  ]
}