FPGA Manager changes for 6.17-rc1

- Matthew hands over the maintainership of Intel MAX10 BMC secure
  update to Yilun.

- Fabio adds missing spi_device_id table for xilinx-spi

- Dihn updates link for Altera & AMD's dt-bindings.

- Andy uses pci_find_vsec_capability() instead of open-codes for
  altera-cvp.

All patches have been reviewed on the mailing list, and have been in the
last linux-next releases (as part of our for-next branch).

Signed-off-by: Xu Yilun <yilun.xu@intel.com>

fpga: altera-cvp: Use pci_find_vsec_capability() when probing FPGA device

Currently altera_cvp_probe() open-codes pci_find_vsec_capability().
Refactor the former to use the latter.

With that done:
- use the VSEC ID as per datasheet [1]
- update the error message accordingly

Link: https://www.intel.com/content/www/us/en/docs/programmable/683763/23-1/vendor-specific-header-register.html [1]
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20251109201729.3220460-1-andriy.shevchenko@linux.intel.com
Reviewed-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>