| From a691805bccb105f7bd61f1bd77c9032250119e31 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Fri, 24 Feb 2017 14:59:28 +0100 |
| Subject: [PATCH 021/286] arm64: dts: r8a7795: Add Cortex-A53 PMU node |
| |
| Enable the performance monitor unit for the Cortex-A53 cores on the |
| R8A7795 SoC. |
| |
| Extracted from a patch by Takeshi Kihara in the BSP. |
| |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 9190748fd608dc3aa80edacab9e6818f2d6f71b6) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++++++ |
| 1 file changed, 12 insertions(+) |
| |
| --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi |
| @@ -340,6 +340,18 @@ |
| <&a57_3>; |
| }; |
| |
| + pmu_a53 { |
| + compatible = "arm,cortex-a53-pmu"; |
| + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; |
| + interrupt-affinity = <&a53_0>, |
| + <&a53_1>, |
| + <&a53_2>, |
| + <&a53_3>; |
| + }; |
| + |
| timer { |
| compatible = "arm,armv8-timer"; |
| interrupts = <GIC_PPI 13 |
