| From c1bee37fcaf3a0b95972ed5705c16f9f643d1211 Mon Sep 17 00:00:00 2001 |
| From: Chris Brandt <chris.brandt@renesas.com> |
| Date: Thu, 30 Mar 2017 14:16:09 -0700 |
| Subject: [PATCH 272/286] ARM: dts: r7s72100: fix ethernet clock parent |
| |
| Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not |
| the 33MHz Peripheral 0 (P0) clock. |
| |
| Fixes: 969244f9c720 ("ARM: dts: r7s72100: add ethernet clock to device tree") |
| Signed-off-by: Chris Brandt <chris.brandt@renesas.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 91a7c50cb4fabfba218549dfa84356069918bfbf) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/boot/dts/r7s72100.dtsi | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/arch/arm/boot/dts/r7s72100.dtsi |
| +++ b/arch/arm/boot/dts/r7s72100.dtsi |
| @@ -121,7 +121,7 @@ |
| #clock-cells = <1>; |
| compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| reg = <0xfcfe0430 4>; |
| - clocks = <&p0_clk>; |
| + clocks = <&b_clk>; |
| clock-indices = <R7S72100_CLK_ETHER>; |
| clock-output-names = "ether"; |
| }; |
