| From dd696cdcf4973ec6ba54ed24283548c1e57948cf Mon Sep 17 00:00:00 2001 |
| From: Thor Thayer <tthayer@opensource.altera.com> |
| Date: Thu, 2 Jun 2016 17:52:26 +0000 |
| Subject: [PATCH 067/103] ARM: dts: socfpga: Add Devkit A10-SR fields for |
| Arria10 |
| |
| Add the Altera Arria10 System Resource node. This is a Multi-Function |
| device with GPIO expander support. |
| |
| Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> |
| Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> |
| --- |
| arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 21 +++++++++++++++++++++ |
| 1 file changed, 21 insertions(+) |
| |
| --- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi |
| +++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi |
| @@ -75,6 +75,27 @@ |
| status = "okay"; |
| }; |
| |
| +&spi1 { |
| + status = "okay"; |
| + |
| + resource-manager@0 { |
| + compatible = "altr,a10sr"; |
| + reg = <0>; |
| + spi-max-frequency = <100000>; |
| + /* low-level active IRQ at GPIO1_5 */ |
| + interrupt-parent = <&portb>; |
| + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; |
| + interrupt-controller; |
| + #interrupt-cells = <2>; |
| + |
| + a10sr_gpio: gpio-controller { |
| + compatible = "altr,a10sr-gpio"; |
| + gpio-controller; |
| + #gpio-cells = <2>; |
| + }; |
| + }; |
| +}; |
| + |
| &i2c1 { |
| speed-mode = <0>; |
| status = "okay"; |
