blob: a6c7578892ca135a88444e6f79d49c4bcba14de7 [file] [log] [blame]
From b731f5be9342650b498665e13e4de21b63612de6 Mon Sep 17 00:00:00 2001
From: Kazuya Mizuguchi <>
Date: Wed, 1 Feb 2017 09:42:00 +0100
Subject: [PATCH 008/286] arm64: dts: r8a7795: Use rgmii-txid phy-mode for
Since commit 61fccb2d6274 ("ravb: Add tx and rx clock internal delays mode
of APSR") the EthernetAVB driver enables tx and rx clock internal delay
modes (TDM and RDM) depending on the phy mode as follows:
phy mode | ASPR delay mode
rgmii-id | TDM and RDM
rgmii-rxid | RDM
rgmii-txid | TDM
And prior to the above commit no internal delay mode settings were
implemented for any phy mode.
With this and the above change present tx internal delay mode is enabled
which has been observed to address failures in the case of 1Gbps
communication using the by salvator-x board with the KSZ9031RNX phy. This
has been reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W)
With the above patch present but this patch present tx and rx internal
delay modes are enabled; and with the above patch and this present absent
no internal delay modes are enabled. In both cases failures have been
observed when using 1Gbps communication in the environments described
Signed-off-by: Kazuya Mizuguchi <>
Signed-off-by: Takeshi Kihara <>
Signed-off-by: Simon Horman <>
(cherry picked from commit dda3887907d743385f2599fa18c765bd295ae2da)
Signed-off-by: Simon Horman <>
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -564,7 +564,7 @@
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- phy-mode = "rgmii-id";
+ phy-mode = "rgmii-txid";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";