| From 66f6a0203fa7058cc5173f7537c480faad3b4f47 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Tue, 7 Mar 2017 19:03:26 +0100 |
| Subject: [PATCH 034/286] arm64: dts: r8a7796: Add Cortex-A53 PMU node |
| |
| Enable the performance monitor unit for the Cortex-A53 cores on the |
| R8A7796 SoC. |
| |
| Extracted from a patch by Takeshi Kihara in the BSP. |
| |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit ccc499330dbcaa8f6065bd1b10a64ca09fa96c3e) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm64/boot/dts/renesas/r8a7796.dtsi | 12 ++++++++++++ |
| 1 file changed, 12 insertions(+) |
| |
| --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| @@ -303,6 +303,18 @@ |
| <&a57_1>; |
| }; |
| |
| + pmu_a53 { |
| + compatible = "arm,cortex-a53-pmu"; |
| + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; |
| + interrupt-affinity = <&a53_0>, |
| + <&a53_1>, |
| + <&a53_2>, |
| + <&a53_3>; |
| + }; |
| + |
| cpg: clock-controller@e6150000 { |
| compatible = "renesas,r8a7796-cpg-mssr"; |
| reg = <0 0xe6150000 0 0x1000>; |
