| From 7a3649c6a909b6b59971ac3a8ebc4ff9070ff433 Mon Sep 17 00:00:00 2001 |
| From: Simon Horman <horms+renesas@verge.net.au> |
| Date: Tue, 13 Dec 2016 12:45:55 +0100 |
| Subject: [PATCH 034/255] arm64: dts: r8a7796: Use R-Car Gen 3 fallback binding |
| for i2c nodes |
| |
| Use recently added R-Car Gen 3 fallback binding for i2c nodes in |
| DT for r8a7796 SoC. |
| |
| This has no run-time effect for the current driver as the initialisation |
| sequence is the same for the SoC-specific binding for r8a7796 and the |
| fallback binding for R-Car Gen 3. |
| |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| (cherry picked from commit 5553e2196229501346f262a9ebdc4e4ed74ff45c) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm64/boot/dts/renesas/r8a7796.dtsi | 21 ++++++++++++++------- |
| 1 file changed, 14 insertions(+), 7 deletions(-) |
| |
| --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| @@ -269,7 +269,8 @@ |
| i2c0: i2c@e6500000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| - compatible = "renesas,i2c-r8a7796"; |
| + compatible = "renesas,i2c-r8a7796", |
| + "renesas,rcar-gen3-i2c"; |
| reg = <0 0xe6500000 0 0x40>; |
| interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 931>; |
| @@ -284,7 +285,8 @@ |
| i2c1: i2c@e6508000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| - compatible = "renesas,i2c-r8a7796"; |
| + compatible = "renesas,i2c-r8a7796", |
| + "renesas,rcar-gen3-i2c"; |
| reg = <0 0xe6508000 0 0x40>; |
| interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 930>; |
| @@ -299,7 +301,8 @@ |
| i2c2: i2c@e6510000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| - compatible = "renesas,i2c-r8a7796"; |
| + compatible = "renesas,i2c-r8a7796", |
| + "renesas,rcar-gen3-i2c"; |
| reg = <0 0xe6510000 0 0x40>; |
| interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 929>; |
| @@ -314,7 +317,8 @@ |
| i2c3: i2c@e66d0000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| - compatible = "renesas,i2c-r8a7796"; |
| + compatible = "renesas,i2c-r8a7796", |
| + "renesas,rcar-gen3-i2c"; |
| reg = <0 0xe66d0000 0 0x40>; |
| interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 928>; |
| @@ -328,7 +332,8 @@ |
| i2c4: i2c@e66d8000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| - compatible = "renesas,i2c-r8a7796"; |
| + compatible = "renesas,i2c-r8a7796", |
| + "renesas,rcar-gen3-i2c"; |
| reg = <0 0xe66d8000 0 0x40>; |
| interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 927>; |
| @@ -342,7 +347,8 @@ |
| i2c5: i2c@e66e0000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| - compatible = "renesas,i2c-r8a7796"; |
| + compatible = "renesas,i2c-r8a7796", |
| + "renesas,rcar-gen3-i2c"; |
| reg = <0 0xe66e0000 0 0x40>; |
| interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 919>; |
| @@ -356,7 +362,8 @@ |
| i2c6: i2c@e66e8000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| - compatible = "renesas,i2c-r8a7796"; |
| + compatible = "renesas,i2c-r8a7796", |
| + "renesas,rcar-gen3-i2c"; |
| reg = <0 0xe66e8000 0 0x40>; |
| interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 918>; |
