| From 7beacd9e07c79c5ce325c5e8e4ceb1eff76ccf66 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Mon, 13 Mar 2017 11:28:39 +0100 |
| Subject: [PATCH 167/286] pinctrl: sh-pfc: r8a7795: Add SCIF_CLK support |
| |
| Add pins, groups, and a function for SCIF_CLK on R-Car H3 ES2.0. |
| SCIF_CLK is the external clock source for the Baud Rate Generator for |
| External Clock (BRG) on (H)SCIF serial ports. |
| |
| Extracted from a big patch in the BSP by Takeshi Kihara. |
| |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com> |
| (cherry picked from commit d14a39edf757f5bdd73cf25d0155d7cfb271e782) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 24 ++++++++++++++++++++++++ |
| 1 file changed, 24 insertions(+) |
| |
| --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c |
| +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c |
| @@ -1773,6 +1773,22 @@ static const unsigned int scif5_clk_b_mu |
| SCK5_B_MARK, |
| }; |
| |
| +/* - SCIF Clock ------------------------------------------------------------- */ |
| +static const unsigned int scif_clk_a_pins[] = { |
| + /* SCIF_CLK */ |
| + RCAR_GP_PIN(6, 23), |
| +}; |
| +static const unsigned int scif_clk_a_mux[] = { |
| + SCIF_CLK_A_MARK, |
| +}; |
| +static const unsigned int scif_clk_b_pins[] = { |
| + /* SCIF_CLK */ |
| + RCAR_GP_PIN(5, 9), |
| +}; |
| +static const unsigned int scif_clk_b_mux[] = { |
| + SCIF_CLK_B_MARK, |
| +}; |
| + |
| static const struct sh_pfc_pin_group pinmux_groups[] = { |
| SH_PFC_PIN_GROUP(scif0_data), |
| SH_PFC_PIN_GROUP(scif0_clk), |
| @@ -1801,6 +1817,8 @@ static const struct sh_pfc_pin_group pin |
| SH_PFC_PIN_GROUP(scif5_clk_a), |
| SH_PFC_PIN_GROUP(scif5_data_b), |
| SH_PFC_PIN_GROUP(scif5_clk_b), |
| + SH_PFC_PIN_GROUP(scif_clk_a), |
| + SH_PFC_PIN_GROUP(scif_clk_b), |
| }; |
| |
| static const char * const scif0_groups[] = { |
| @@ -1848,6 +1866,11 @@ static const char * const scif5_groups[] |
| "scif5_clk_b", |
| }; |
| |
| +static const char * const scif_clk_groups[] = { |
| + "scif_clk_a", |
| + "scif_clk_b", |
| +}; |
| + |
| static const struct sh_pfc_function pinmux_functions[] = { |
| SH_PFC_FUNCTION(scif0), |
| SH_PFC_FUNCTION(scif1), |
| @@ -1855,6 +1878,7 @@ static const struct sh_pfc_function pinm |
| SH_PFC_FUNCTION(scif3), |
| SH_PFC_FUNCTION(scif4), |
| SH_PFC_FUNCTION(scif5), |
| + SH_PFC_FUNCTION(scif_clk), |
| }; |
| |
| static const struct pinmux_cfg_reg pinmux_config_regs[] = { |