| From 1ab1d8daf7f59d3736fc4d9ca2d37e7035516b1b Mon Sep 17 00:00:00 2001 |
| From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Date: Tue, 18 Oct 2016 17:02:21 +0200 |
| Subject: [PATCH 228/299] ARM: dts: r8a7793: Enable VIN0-VIN2 |
| |
| Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 06b64afa6e981b332dccadcf0b5d52139525b4f6) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/boot/dts/r8a7793.dtsi | 27 +++++++++++++++++++++++++++ |
| 1 file changed, 27 insertions(+) |
| |
| --- a/arch/arm/boot/dts/r8a7793.dtsi |
| +++ b/arch/arm/boot/dts/r8a7793.dtsi |
| @@ -852,6 +852,33 @@ |
| status = "disabled"; |
| }; |
| |
| + vin0: video@e6ef0000 { |
| + compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin"; |
| + reg = <0 0xe6ef0000 0 0x1000>; |
| + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp8_clks R8A7793_CLK_VIN0>; |
| + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; |
| + status = "disabled"; |
| + }; |
| + |
| + vin1: video@e6ef1000 { |
| + compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin"; |
| + reg = <0 0xe6ef1000 0 0x1000>; |
| + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp8_clks R8A7793_CLK_VIN1>; |
| + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; |
| + status = "disabled"; |
| + }; |
| + |
| + vin2: video@e6ef2000 { |
| + compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin"; |
| + reg = <0 0xe6ef2000 0 0x1000>; |
| + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp8_clks R8A7793_CLK_VIN2>; |
| + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; |
| + status = "disabled"; |
| + }; |
| + |
| qspi: spi@e6b10000 { |
| compatible = "renesas,qspi-r8a7793", "renesas,qspi"; |
| reg = <0 0xe6b10000 0 0x2c>; |
