| From c311a85c223388fe5023c62e5af0de510f634a35 Mon Sep 17 00:00:00 2001 |
| From: Takeshi Kihara <takeshi.kihara.df@renesas.com> |
| Date: Tue, 7 Mar 2017 19:03:23 +0100 |
| Subject: [PATCH 031/286] arm64: dts: r8a7796: Add Cortex-A57 PMU node |
| |
| Enable the performance monitor unit for the Cortex-A57 cores on the |
| R8A7796 SoC. |
| |
| Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 9fccf4d6103eeb5db88c1ae026d61b87f722414a) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm64/boot/dts/renesas/r8a7796.dtsi | 8 ++++++++ |
| 1 file changed, 8 insertions(+) |
| |
| --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| @@ -252,6 +252,14 @@ |
| reg = <0 0xe6060000 0 0x50c>; |
| }; |
| |
| + pmu_a57 { |
| + compatible = "arm,cortex-a57-pmu"; |
| + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
| + interrupt-affinity = <&a57_0>, |
| + <&a57_1>; |
| + }; |
| + |
| cpg: clock-controller@e6150000 { |
| compatible = "renesas,r8a7796-cpg-mssr"; |
| reg = <0 0xe6150000 0 0x1000>; |
