| From 2ac5acd948c5dcbf1ef21d6df12c9812160d6cd3 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Tue, 28 Feb 2017 17:18:08 +0100 |
| Subject: [PATCH 154/286] clk: renesas: r8a7796: Correct name of watchdog clock |
| |
| There's only a single watchdog clock, and it's named "rwdt". |
| |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| (cherry picked from commit 89aa58a3951bcf242c7755075a7429d0ed6640de) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/clk/renesas/r8a7796-cpg-mssr.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c |
| +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c |
| @@ -135,7 +135,7 @@ static const struct mssr_mod_clk r8a7796 |
| DEF_MOD("sdif2", 312, R8A7796_CLK_SD2), |
| DEF_MOD("sdif1", 313, R8A7796_CLK_SD1), |
| DEF_MOD("sdif0", 314, R8A7796_CLK_SD0), |
| - DEF_MOD("rwdt0", 402, R8A7796_CLK_R), |
| + DEF_MOD("rwdt", 402, R8A7796_CLK_R), |
| DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1), |
| DEF_MOD("drif7", 508, R8A7796_CLK_S3D2), |
| DEF_MOD("drif6", 509, R8A7796_CLK_S3D2), |
