| From 7d7d0268cfe4401bd5a571771542032700670266 Mon Sep 17 00:00:00 2001 |
| From: Simon Horman <horms@verge.net.au> |
| Date: Wed, 28 Mar 2012 18:01:09 +0900 |
| Subject: mmc: sh_mmcif: double clock speed |
| |
| Correct an off-by one error when calculating the clock divisor in cases |
| where the host clock is a power of two of the target clock. Previously the |
| divisor was one greater than the correct value in these cases leading to |
| the clock being set at half the desired speed. |
| |
| Thanks to Guennadi Liakhovetski for working with me on the logic for this |
| change. |
| |
| Tested-by: Cao Minh Hiep <hiepcm@gmail.com> |
| Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
| Signed-off-by: Simon Horman <horms@verge.net.au> |
| Signed-off-by: Chris Ball <cjb@laptop.org> |
| (cherry picked from commit f93882570496aa02ba8a47bfaf81cce43046b978) |
| |
| Signed-off-by: Simon Horman <horms@verge.net.au> |
| --- |
| drivers/mmc/host/sh_mmcif.c | 3 ++- |
| 1 file changed, 2 insertions(+), 1 deletion(-) |
| |
| diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c |
| index f91ae31..6288046 100644 |
| --- a/drivers/mmc/host/sh_mmcif.c |
| +++ b/drivers/mmc/host/sh_mmcif.c |
| @@ -453,7 +453,8 @@ static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk) |
| sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_SUP_PCLK); |
| else |
| sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR & |
| - ((fls(host->clk / clk) - 1) << 16)); |
| + ((fls(DIV_ROUND_UP(host->clk, |
| + clk) - 1) - 1) << 16)); |
| |
| sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE); |
| } |
| -- |
| 1.7.10.2.565.gbd578b5 |
| |
