| From 2a2278d75807c8374cb358073e0fc503d2a0d8d9 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Fri, 29 Sep 2017 14:16:31 +0200 |
| Subject: [PATCH 0219/1795] pinctrl: sh-pfc: Add generic IOCTRL register |
| description |
| |
| Add a generic way to describe IOCTRL registers (for e.g. SD I/O voltage |
| and time delay control), like is already done for config, drive, and |
| bias registers. |
| |
| This makes the sh-pfc core code aware of these registers, which will |
| ease introducing suspend/resume support later. |
| |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| (cherry picked from commit 9e9bd06a353786ac3c01e76606e64aa660243aab) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| drivers/pinctrl/sh-pfc/sh_pfc.h | 5 +++++ |
| 1 file changed, 5 insertions(+) |
| |
| diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h |
| index 18fd87826629..b9bb56c91b6f 100644 |
| --- a/drivers/pinctrl/sh-pfc/sh_pfc.h |
| +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h |
| @@ -159,6 +159,10 @@ struct pinmux_bias_reg { |
| .pud = r2, \ |
| .pins = |
| |
| +struct pinmux_ioctrl_reg { |
| + u32 reg; |
| +}; |
| + |
| struct pinmux_data_reg { |
| u32 reg; |
| u8 reg_width; |
| @@ -251,6 +255,7 @@ struct sh_pfc_soc_info { |
| const struct pinmux_cfg_reg *cfg_regs; |
| const struct pinmux_drive_reg *drive_regs; |
| const struct pinmux_bias_reg *bias_regs; |
| + const struct pinmux_ioctrl_reg *ioctrl_regs; |
| const struct pinmux_data_reg *data_regs; |
| |
| const u16 *pinmux_data; |
| -- |
| 2.19.0 |
| |
