| From 960c270de35d28eabaa41b1b70233573e87f5357 Mon Sep 17 00:00:00 2001 |
| From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Date: Wed, 7 Dec 2016 17:44:48 +0100 |
| Subject: [PATCH 019/286] arm64: dts: r8a7796: Enable HSCIF DMA |
| |
| Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 6d50bb8935042c4b7747b57df064ff41295e4769) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm64/boot/dts/renesas/r8a7796.dtsi | 13 +++++++++++++ |
| 1 file changed, 13 insertions(+) |
| |
| --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| @@ -498,6 +498,9 @@ |
| <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| <&scif_clk>; |
| clock-names = "fck", "brg_int", "scif_clk"; |
| + dmas = <&dmac1 0x31>, <&dmac1 0x30>, |
| + <&dmac2 0x31>, <&dmac2 0x30>; |
| + dma-names = "tx", "rx", "tx", "rx"; |
| power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| status = "disabled"; |
| }; |
| @@ -512,6 +515,9 @@ |
| <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| <&scif_clk>; |
| clock-names = "fck", "brg_int", "scif_clk"; |
| + dmas = <&dmac1 0x33>, <&dmac1 0x32>, |
| + <&dmac2 0x33>, <&dmac2 0x32>; |
| + dma-names = "tx", "rx", "tx", "rx"; |
| power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| status = "disabled"; |
| }; |
| @@ -526,6 +532,9 @@ |
| <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| <&scif_clk>; |
| clock-names = "fck", "brg_int", "scif_clk"; |
| + dmas = <&dmac1 0x35>, <&dmac1 0x34>, |
| + <&dmac2 0x35>, <&dmac2 0x34>; |
| + dma-names = "tx", "rx", "tx", "rx"; |
| power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| status = "disabled"; |
| }; |
| @@ -540,6 +549,8 @@ |
| <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| <&scif_clk>; |
| clock-names = "fck", "brg_int", "scif_clk"; |
| + dmas = <&dmac0 0x37>, <&dmac0 0x36>; |
| + dma-names = "tx", "rx"; |
| power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| status = "disabled"; |
| }; |
| @@ -554,6 +565,8 @@ |
| <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| <&scif_clk>; |
| clock-names = "fck", "brg_int", "scif_clk"; |
| + dmas = <&dmac0 0x39>, <&dmac0 0x38>; |
| + dma-names = "tx", "rx"; |
| power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| status = "disabled"; |
| }; |