| From afc2193b96640358512cc4cafbda052da42bd4db Mon Sep 17 00:00:00 2001 |
| From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Date: Thu, 2 Feb 2017 18:10:16 +0100 |
| Subject: [PATCH 230/255] serial: sh-sci: implement FIFO threshold register |
| setting |
| |
| Sets the closest match for a desired RX trigger level. |
| |
| Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| (cherry picked from commit a380ed461f66d1b843cf13380a43a5fe790b8430) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/tty/serial/sh-sci.c | 59 ++++++++++++++++++++++++++++++++++++++++++++ |
| 1 file changed, 59 insertions(+) |
| |
| --- a/drivers/tty/serial/sh-sci.c |
| +++ b/drivers/tty/serial/sh-sci.c |
| @@ -976,6 +976,65 @@ static int sci_handle_breaks(struct uart |
| return copied; |
| } |
| |
| +static int scif_set_rtrg(struct uart_port *port, int rx_trig) |
| +{ |
| + unsigned int bits; |
| + |
| + if (rx_trig < 1) |
| + rx_trig = 1; |
| + if (rx_trig >= port->fifosize) |
| + rx_trig = port->fifosize; |
| + |
| + /* HSCIF can be set to an arbitrary level. */ |
| + if (sci_getreg(port, HSRTRGR)->size) { |
| + serial_port_out(port, HSRTRGR, rx_trig); |
| + return rx_trig; |
| + } |
| + |
| + switch (port->type) { |
| + case PORT_SCIF: |
| + if (rx_trig < 4) { |
| + bits = 0; |
| + rx_trig = 1; |
| + } else if (rx_trig < 8) { |
| + bits = SCFCR_RTRG0; |
| + rx_trig = 4; |
| + } else if (rx_trig < 14) { |
| + bits = SCFCR_RTRG1; |
| + rx_trig = 8; |
| + } else { |
| + bits = SCFCR_RTRG0 | SCFCR_RTRG1; |
| + rx_trig = 14; |
| + } |
| + break; |
| + case PORT_SCIFA: |
| + case PORT_SCIFB: |
| + if (rx_trig < 16) { |
| + bits = 0; |
| + rx_trig = 1; |
| + } else if (rx_trig < 32) { |
| + bits = SCFCR_RTRG0; |
| + rx_trig = 16; |
| + } else if (rx_trig < 48) { |
| + bits = SCFCR_RTRG1; |
| + rx_trig = 32; |
| + } else { |
| + bits = SCFCR_RTRG0 | SCFCR_RTRG1; |
| + rx_trig = 48; |
| + } |
| + break; |
| + default: |
| + WARN(1, "unknown FIFO configuration"); |
| + return 1; |
| + } |
| + |
| + serial_port_out(port, SCFCR, |
| + (serial_port_in(port, SCFCR) & |
| + ~(SCFCR_RTRG1 | SCFCR_RTRG0)) | bits); |
| + |
| + return rx_trig; |
| +} |
| + |
| #ifdef CONFIG_SERIAL_SH_SCI_DMA |
| static void sci_dma_tx_complete(void *arg) |
| { |