| From 591692b01bed97f524daa7623e58543276e32abd Mon Sep 17 00:00:00 2001 |
| From: Thor Thayer <tthayer@opensource.altera.com> |
| Date: Thu, 2 Jun 2016 17:52:25 +0000 |
| Subject: [PATCH 066/103] ARM: dts: socfpga: Add SPI Master1 for Arria10 SR |
| chip |
| |
| Add the Altera Arria10 SPI Master Node in preparation for |
| the A10SR MFD node. |
| |
| Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> |
| Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> |
| --- |
| arch/arm/boot/dts/socfpga_arria10.dtsi | 15 +++++++++++++++ |
| 1 file changed, 15 insertions(+) |
| |
| --- a/arch/arm/boot/dts/socfpga_arria10.dtsi |
| +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi |
| @@ -579,6 +579,21 @@ |
| status = "disabled"; |
| }; |
| |
| + spi1: spi@ffda5000 { |
| + compatible = "snps,dw-apb-ssi"; |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <0xffda5000 0x100>; |
| + interrupts = <0 102 4>; |
| + num-chipselect = <4>; |
| + bus-num = <0>; |
| + /*32bit_access;*/ |
| + tx-dma-channel = <&pdma 16>; |
| + rx-dma-channel = <&pdma 17>; |
| + clocks = <&spi_m_clk>; |
| + status = "disabled"; |
| + }; |
| + |
| sdr: sdr@ffc25000 { |
| compatible = "altr,sdr-ctl", "syscon"; |
| reg = <0xffcfb100 0x80>; |
