| From 4d9e84bcd82101758a0c21563d7740c1be578631 Mon Sep 17 00:00:00 2001 |
| From: Matthew Gerlach <matthew.gerlach@linux.intel.com> |
| Date: Thu, 23 Mar 2017 19:34:29 -0500 |
| Subject: [PATCH 093/103] fpga dt: bindings for Altera Partial Reconfiguration |
| IP. |
| |
| Device Tree bindings for Altera Partial Reconfiguration IP. |
| |
| Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> |
| Acked-by: Rob Herring <robh@kernel.org> |
| Acked-by: Alan Tull <atull@kernel.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| Documentation/devicetree/bindings/fpga/altera-pr-ip.txt | 12 ++++++++++++ |
| 1 file changed, 12 insertions(+) |
| create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt |
| |
| --- /dev/null |
| +++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt |
| @@ -0,0 +1,12 @@ |
| +Altera Arria10 Partial Reconfiguration IP |
| + |
| +Required properties: |
| +- compatible : should contain "altr,a10-pr-ip" |
| +- reg : base address and size for memory mapped io. |
| + |
| +Example: |
| + |
| + fpga_mgr: fpga-mgr@ff20c000 { |
| + compatible = "altr,a10-pr-ip"; |
| + reg = <0xff20c000 0x10>; |
| + }; |