From 6be7abb595447186a90679305f19a1cc0008cacd Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa@sang-engineering.com>
Date: Fri, 28 Feb 2014 10:32:55 +0100
Subject: ARM: shmobile: r7s72100: fix bus clock calculation

The picture in the datasheet is a little misleading, yet the divider of
the bus_clk is 1/3 and not 2/3.

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit d93023f81d2c79595e64e4f516f03af4e4c73c13)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/clock-r7s72100.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index f17a5db00221..bee0073c9b64 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -70,7 +70,7 @@ static struct clk pll_clk = {
 
 static unsigned long bus_recalc(struct clk *clk)
 {
-	return clk->parent->rate * 2 / 3;
+	return clk->parent->rate / 3;
 }
 
 static struct sh_clk_ops bus_clk_ops = {
-- 
2.1.2