initial big import of all of the 4.14 ltsi -rc1 patches
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
diff --git a/patches/0001-drm-bridge-adv7511-Properly-update-EDID-when-no-EDID.patch b/patches/0001-drm-bridge-adv7511-Properly-update-EDID-when-no-EDID.patch
new file mode 100644
index 0000000..8aeac1e
--- /dev/null
+++ b/patches/0001-drm-bridge-adv7511-Properly-update-EDID-when-no-EDID.patch
@@ -0,0 +1,42 @@
+From 7cdbad6f0040a7cf4449abc309466201849c55a2 Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Tue, 5 Sep 2017 14:10:15 +0200
+Subject: [PATCH 0001/1795] drm/bridge: adv7511: Properly update EDID when no
+ EDID was found
+
+Currently adv7511_get_modes() bails out early when no EDID could be
+retrieved. This leaves the previous EDID in place, which is typically not
+the intended behavior and might confuse applications. Instead the EDID
+should be cleared when no EDID could be retrieved.
+
+All functions that are called after the EDID check handle the case where
+the EDID is NULL just fine and exhibit the expected behavior, so just drop
+the check.
+
+Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20170905121018.11477-1-lars@metafoo.de
+(cherry picked from commit 6f39ed4f0939e6bef722f0096894c1a986da9c9a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index f5091827628a..13542940056b 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -603,8 +603,6 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
+
+ kfree(adv7511->edid);
+ adv7511->edid = edid;
+- if (!edid)
+- return 0;
+
+ drm_mode_connector_update_edid_property(connector, edid);
+ count = drm_add_edid_modes(connector, edid);
+--
+2.19.0
+
diff --git a/patches/0002-drm-bridge-adv7511-Remove-private-copy-of-the-EDID.patch b/patches/0002-drm-bridge-adv7511-Remove-private-copy-of-the-EDID.patch
new file mode 100644
index 0000000..9e3fcfd
--- /dev/null
+++ b/patches/0002-drm-bridge-adv7511-Remove-private-copy-of-the-EDID.patch
@@ -0,0 +1,97 @@
+From fc1071f9c776f223219b1ddc6fbafe4155fd23be Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Tue, 5 Sep 2017 14:10:16 +0200
+Subject: [PATCH 0002/1795] drm/bridge: adv7511: Remove private copy of the
+ EDID
+
+The adv7511 driver keeps a private copy of the EDID in its driver state
+struct. But this copy is only used in adv7511_get_modes() where it is also
+retrieved, so there is no need to keep this extra copy around.
+
+If a need to access the EDID elsewhere in the driver ever arises the copy
+that is stored in the connector can be used. This copy is accessible
+through drm_connector_get_edid().
+
+Note, this patch removes the NULL check of the EDID before passing it to
+drm_detect_hdmi_monitor(), but that is fine since the function correctly
+handles the case where the EDID is NULL.
+
+Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20170905121018.11477-2-lars@metafoo.de
+(cherry picked from commit fcb4c5eee79ea17e1fbc5b3ebbd575d56714fabe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511.h | 2 --
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 16 ++++++----------
+ 2 files changed, 6 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+index fe18a5d2d84b..12ef2d8ee110 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+@@ -328,8 +328,6 @@ struct adv7511 {
+ enum adv7511_sync_polarity hsync_polarity;
+ bool rgb;
+
+- struct edid *edid;
+-
+ struct gpio_desc *gpio_pd;
+
+ struct regulator_bulk_data *supplies;
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index 13542940056b..e928c804586e 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -199,17 +199,14 @@ static const uint16_t adv7511_csc_ycbcr_to_rgb[] = {
+
+ static void adv7511_set_config_csc(struct adv7511 *adv7511,
+ struct drm_connector *connector,
+- bool rgb)
++ bool rgb, bool hdmi_mode)
+ {
+ struct adv7511_video_config config;
+ bool output_format_422, output_format_ycbcr;
+ unsigned int mode;
+ uint8_t infoframe[17];
+
+- if (adv7511->edid)
+- config.hdmi_mode = drm_detect_hdmi_monitor(adv7511->edid);
+- else
+- config.hdmi_mode = false;
++ config.hdmi_mode = hdmi_mode;
+
+ hdmi_avi_infoframe_init(&config.avi_infoframe);
+
+@@ -601,13 +598,14 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
+ if (!adv7511->powered)
+ __adv7511_power_off(adv7511);
+
+- kfree(adv7511->edid);
+- adv7511->edid = edid;
+
+ drm_mode_connector_update_edid_property(connector, edid);
+ count = drm_add_edid_modes(connector, edid);
+
+- adv7511_set_config_csc(adv7511, connector, adv7511->rgb);
++ adv7511_set_config_csc(adv7511, connector, adv7511->rgb,
++ drm_detect_hdmi_monitor(edid));
++
++ kfree(edid);
+
+ return count;
+ }
+@@ -1168,8 +1166,6 @@ static int adv7511_remove(struct i2c_client *i2c)
+
+ i2c_unregister_device(adv7511->i2c_edid);
+
+- kfree(adv7511->edid);
+-
+ return 0;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0003-drm-bridge-adv7511-Enable-connector-polling-when-no-.patch b/patches/0003-drm-bridge-adv7511-Enable-connector-polling-when-no-.patch
new file mode 100644
index 0000000..72689f1
--- /dev/null
+++ b/patches/0003-drm-bridge-adv7511-Enable-connector-polling-when-no-.patch
@@ -0,0 +1,41 @@
+From 9dcfe6f802ed056ea4e0af187371bbeeaaf17da8 Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Tue, 5 Sep 2017 14:10:17 +0200
+Subject: [PATCH 0003/1795] drm/bridge: adv7511: Enable connector polling when
+ no interrupt is specified
+
+Fall back to polling the connector for connect and disconnect events when
+no interrupt is specified. Otherwise these events will not be noticed and
+monitor hotplug does not work.
+
+Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20170905121018.11477-3-lars@metafoo.de
+(cherry picked from commit 2f47f1c106d99f367f2924ce35741050fb87e081)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index e928c804586e..37524035486f 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -841,7 +841,11 @@ static int adv7511_bridge_attach(struct drm_bridge *bridge)
+ return -ENODEV;
+ }
+
+- adv->connector.polled = DRM_CONNECTOR_POLL_HPD;
++ if (adv->i2c_main->irq)
++ adv->connector.polled = DRM_CONNECTOR_POLL_HPD;
++ else
++ adv->connector.polled = DRM_CONNECTOR_POLL_CONNECT |
++ DRM_CONNECTOR_POLL_DISCONNECT;
+
+ ret = drm_connector_init(bridge->dev, &adv->connector,
+ &adv7511_connector_funcs,
+--
+2.19.0
+
diff --git a/patches/0004-drm-bridge-adv7511-Constify-HDMI-CODEC-platform-data.patch b/patches/0004-drm-bridge-adv7511-Constify-HDMI-CODEC-platform-data.patch
new file mode 100644
index 0000000..6e8f702
--- /dev/null
+++ b/patches/0004-drm-bridge-adv7511-Constify-HDMI-CODEC-platform-data.patch
@@ -0,0 +1,37 @@
+From 9049bcc42b52eebd5db97a4f359833be11cb48e2 Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Tue, 5 Sep 2017 14:10:18 +0200
+Subject: [PATCH 0004/1795] drm/bridge: adv7511: Constify HDMI CODEC platform
+ data
+
+The HDMI codec platform data is global driver state shared by all
+instances. As such it should not be modified (and is not), to make this
+explicit declare it as const.
+
+Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20170905121018.11477-4-lars@metafoo.de
+(cherry picked from commit 1591017442ffb6b0a735abe4f611a203fb632501)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511_audio.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c b/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c
+index 67469c26bae8..1b4783d45c53 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c
+@@ -210,7 +210,7 @@ static const struct hdmi_codec_ops adv7511_codec_ops = {
+ .get_dai_id = adv7511_hdmi_i2s_get_dai_id,
+ };
+
+-static struct hdmi_codec_pdata codec_data = {
++static const struct hdmi_codec_pdata codec_data = {
+ .ops = &adv7511_codec_ops,
+ .max_i2s_channels = 2,
+ .i2s = 1,
+--
+2.19.0
+
diff --git a/patches/0005-drm-adv7511-33-add-HDMI-CEC-support.patch b/patches/0005-drm-adv7511-33-add-HDMI-CEC-support.patch
new file mode 100644
index 0000000..225bb3f
--- /dev/null
+++ b/patches/0005-drm-adv7511-33-add-HDMI-CEC-support.patch
@@ -0,0 +1,760 @@
+From cd4adaf0b54ed6f4d40e70a50004871467f87dd9 Mon Sep 17 00:00:00 2001
+From: Hans Verkuil <hans.verkuil@cisco.com>
+Date: Sat, 7 Oct 2017 12:46:58 +0200
+Subject: [PATCH 0005/1795] drm: adv7511/33: add HDMI CEC support
+
+Add support for HDMI CEC to the drm adv7511/adv7533 drivers.
+
+The CEC registers that we need to use are identical for both drivers,
+but they appear at different offsets in the register map.
+
+Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20171007104658.14528-3-hverkuil@xs4all.nl
+(cherry picked from commit 3b1b975003e4a3da4b93ab032487a3ae4afca7b5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/Kconfig | 8 +
+ drivers/gpu/drm/bridge/adv7511/Makefile | 1 +
+ drivers/gpu/drm/bridge/adv7511/adv7511.h | 43 ++-
+ drivers/gpu/drm/bridge/adv7511/adv7511_cec.c | 337 +++++++++++++++++++
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 116 ++++++-
+ drivers/gpu/drm/bridge/adv7511/adv7533.c | 38 +--
+ 6 files changed, 485 insertions(+), 58 deletions(-)
+ create mode 100644 drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/Kconfig b/drivers/gpu/drm/bridge/adv7511/Kconfig
+index 2fed567f9943..592b9d2ec034 100644
+--- a/drivers/gpu/drm/bridge/adv7511/Kconfig
++++ b/drivers/gpu/drm/bridge/adv7511/Kconfig
+@@ -21,3 +21,11 @@ config DRM_I2C_ADV7533
+ default y
+ help
+ Support for the Analog Devices ADV7533 DSI to HDMI encoder.
++
++config DRM_I2C_ADV7511_CEC
++ bool "ADV7511/33 HDMI CEC driver"
++ depends on DRM_I2C_ADV7511
++ select CEC_CORE
++ default y
++ help
++ When selected the HDMI transmitter will support the CEC feature.
+diff --git a/drivers/gpu/drm/bridge/adv7511/Makefile b/drivers/gpu/drm/bridge/adv7511/Makefile
+index 5ba675534f6e..5bb384938a71 100644
+--- a/drivers/gpu/drm/bridge/adv7511/Makefile
++++ b/drivers/gpu/drm/bridge/adv7511/Makefile
+@@ -1,4 +1,5 @@
+ adv7511-y := adv7511_drv.o
+ adv7511-$(CONFIG_DRM_I2C_ADV7511_AUDIO) += adv7511_audio.o
++adv7511-$(CONFIG_DRM_I2C_ADV7511_CEC) += adv7511_cec.o
+ adv7511-$(CONFIG_DRM_I2C_ADV7533) += adv7533.o
+ obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511.o
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+index 12ef2d8ee110..b4efcbabf7f7 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+@@ -195,6 +195,25 @@
+ #define ADV7511_PACKET_GM(x) ADV7511_PACKET(5, x)
+ #define ADV7511_PACKET_SPARE(x) ADV7511_PACKET(6, x)
+
++#define ADV7511_REG_CEC_TX_FRAME_HDR 0x00
++#define ADV7511_REG_CEC_TX_FRAME_DATA0 0x01
++#define ADV7511_REG_CEC_TX_FRAME_LEN 0x10
++#define ADV7511_REG_CEC_TX_ENABLE 0x11
++#define ADV7511_REG_CEC_TX_RETRY 0x12
++#define ADV7511_REG_CEC_TX_LOW_DRV_CNT 0x14
++#define ADV7511_REG_CEC_RX_FRAME_HDR 0x15
++#define ADV7511_REG_CEC_RX_FRAME_DATA0 0x16
++#define ADV7511_REG_CEC_RX_FRAME_LEN 0x25
++#define ADV7511_REG_CEC_RX_ENABLE 0x26
++#define ADV7511_REG_CEC_RX_BUFFERS 0x4a
++#define ADV7511_REG_CEC_LOG_ADDR_MASK 0x4b
++#define ADV7511_REG_CEC_LOG_ADDR_0_1 0x4c
++#define ADV7511_REG_CEC_LOG_ADDR_2 0x4d
++#define ADV7511_REG_CEC_CLK_DIV 0x4e
++#define ADV7511_REG_CEC_SOFT_RESET 0x50
++
++#define ADV7533_REG_CEC_OFFSET 0x70
++
+ enum adv7511_input_clock {
+ ADV7511_INPUT_CLOCK_1X,
+ ADV7511_INPUT_CLOCK_2X,
+@@ -297,6 +316,8 @@ enum adv7511_type {
+ ADV7533,
+ };
+
++#define ADV7511_MAX_ADDRS 3
++
+ struct adv7511 {
+ struct i2c_client *i2c_main;
+ struct i2c_client *i2c_edid;
+@@ -341,15 +362,27 @@ struct adv7511 {
+
+ enum adv7511_type type;
+ struct platform_device *audio_pdev;
++
++ struct cec_adapter *cec_adap;
++ u8 cec_addr[ADV7511_MAX_ADDRS];
++ u8 cec_valid_addrs;
++ bool cec_enabled_adap;
++ struct clk *cec_clk;
++ u32 cec_clk_freq;
+ };
+
++#ifdef CONFIG_DRM_I2C_ADV7511_CEC
++int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511,
++ unsigned int offset);
++void adv7511_cec_irq_process(struct adv7511 *adv7511, unsigned int irq1);
++#endif
++
+ #ifdef CONFIG_DRM_I2C_ADV7533
+ void adv7533_dsi_power_on(struct adv7511 *adv);
+ void adv7533_dsi_power_off(struct adv7511 *adv);
+ void adv7533_mode_set(struct adv7511 *adv, struct drm_display_mode *mode);
+ int adv7533_patch_registers(struct adv7511 *adv);
+-void adv7533_uninit_cec(struct adv7511 *adv);
+-int adv7533_init_cec(struct adv7511 *adv);
++int adv7533_patch_cec_registers(struct adv7511 *adv);
+ int adv7533_attach_dsi(struct adv7511 *adv);
+ void adv7533_detach_dsi(struct adv7511 *adv);
+ int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv);
+@@ -372,11 +405,7 @@ static inline int adv7533_patch_registers(struct adv7511 *adv)
+ return -ENODEV;
+ }
+
+-static inline void adv7533_uninit_cec(struct adv7511 *adv)
+-{
+-}
+-
+-static inline int adv7533_init_cec(struct adv7511 *adv)
++static inline int adv7533_patch_cec_registers(struct adv7511 *adv)
+ {
+ return -ENODEV;
+ }
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c b/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
+new file mode 100644
+index 000000000000..b33d730e4d73
+--- /dev/null
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
+@@ -0,0 +1,337 @@
++/*
++ * adv7511_cec.c - Analog Devices ADV7511/33 cec driver
++ *
++ * Copyright 2017 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
++ *
++ * This program is free software; you may redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
++ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
++ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
++ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
++ * SOFTWARE.
++ *
++ */
++
++#include <linux/device.h>
++#include <linux/module.h>
++#include <linux/of_device.h>
++#include <linux/slab.h>
++#include <linux/clk.h>
++
++#include <media/cec.h>
++
++#include "adv7511.h"
++
++#define ADV7511_INT1_CEC_MASK \
++ (ADV7511_INT1_CEC_TX_READY | ADV7511_INT1_CEC_TX_ARBIT_LOST | \
++ ADV7511_INT1_CEC_TX_RETRY_TIMEOUT | ADV7511_INT1_CEC_RX_READY1)
++
++static void adv_cec_tx_raw_status(struct adv7511 *adv7511, u8 tx_raw_status)
++{
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++ unsigned int val;
++
++ if (regmap_read(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_ENABLE + offset, &val))
++ return;
++
++ if ((val & 0x01) == 0)
++ return;
++
++ if (tx_raw_status & ADV7511_INT1_CEC_TX_ARBIT_LOST) {
++ cec_transmit_attempt_done(adv7511->cec_adap,
++ CEC_TX_STATUS_ARB_LOST);
++ return;
++ }
++ if (tx_raw_status & ADV7511_INT1_CEC_TX_RETRY_TIMEOUT) {
++ u8 status;
++ u8 err_cnt = 0;
++ u8 nack_cnt = 0;
++ u8 low_drive_cnt = 0;
++ unsigned int cnt;
++
++ /*
++ * We set this status bit since this hardware performs
++ * retransmissions.
++ */
++ status = CEC_TX_STATUS_MAX_RETRIES;
++ if (regmap_read(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_LOW_DRV_CNT + offset, &cnt)) {
++ err_cnt = 1;
++ status |= CEC_TX_STATUS_ERROR;
++ } else {
++ nack_cnt = cnt & 0xf;
++ if (nack_cnt)
++ status |= CEC_TX_STATUS_NACK;
++ low_drive_cnt = cnt >> 4;
++ if (low_drive_cnt)
++ status |= CEC_TX_STATUS_LOW_DRIVE;
++ }
++ cec_transmit_done(adv7511->cec_adap, status,
++ 0, nack_cnt, low_drive_cnt, err_cnt);
++ return;
++ }
++ if (tx_raw_status & ADV7511_INT1_CEC_TX_READY) {
++ cec_transmit_attempt_done(adv7511->cec_adap, CEC_TX_STATUS_OK);
++ return;
++ }
++}
++
++void adv7511_cec_irq_process(struct adv7511 *adv7511, unsigned int irq1)
++{
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++ const u32 irq_tx_mask = ADV7511_INT1_CEC_TX_READY |
++ ADV7511_INT1_CEC_TX_ARBIT_LOST |
++ ADV7511_INT1_CEC_TX_RETRY_TIMEOUT;
++ struct cec_msg msg = {};
++ unsigned int len;
++ unsigned int val;
++ u8 i;
++
++ if (irq1 & irq_tx_mask)
++ adv_cec_tx_raw_status(adv7511, irq1);
++
++ if (!(irq1 & ADV7511_INT1_CEC_RX_READY1))
++ return;
++
++ if (regmap_read(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_FRAME_LEN + offset, &len))
++ return;
++
++ msg.len = len & 0x1f;
++
++ if (msg.len > 16)
++ msg.len = 16;
++
++ if (!msg.len)
++ return;
++
++ for (i = 0; i < msg.len; i++) {
++ regmap_read(adv7511->regmap_cec,
++ i + ADV7511_REG_CEC_RX_FRAME_HDR + offset, &val);
++ msg.msg[i] = val;
++ }
++
++ /* toggle to re-enable rx 1 */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_BUFFERS + offset, 1);
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_BUFFERS + offset, 0);
++ cec_received_msg(adv7511->cec_adap, &msg);
++}
++
++static int adv7511_cec_adap_enable(struct cec_adapter *adap, bool enable)
++{
++ struct adv7511 *adv7511 = cec_get_drvdata(adap);
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++
++ if (adv7511->i2c_cec == NULL)
++ return -EIO;
++
++ if (!adv7511->cec_enabled_adap && enable) {
++ /* power up cec section */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_CLK_DIV + offset,
++ 0x03, 0x01);
++ /* legacy mode and clear all rx buffers */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_BUFFERS + offset, 0x07);
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_BUFFERS + offset, 0);
++ /* initially disable tx */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_ENABLE + offset, 1, 0);
++ /* enabled irqs: */
++ /* tx: ready */
++ /* tx: arbitration lost */
++ /* tx: retry timeout */
++ /* rx: ready 1 */
++ regmap_update_bits(adv7511->regmap,
++ ADV7511_REG_INT_ENABLE(1), 0x3f,
++ ADV7511_INT1_CEC_MASK);
++ } else if (adv7511->cec_enabled_adap && !enable) {
++ regmap_update_bits(adv7511->regmap,
++ ADV7511_REG_INT_ENABLE(1), 0x3f, 0);
++ /* disable address mask 1-3 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_MASK + offset,
++ 0x70, 0x00);
++ /* power down cec section */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_CLK_DIV + offset,
++ 0x03, 0x00);
++ adv7511->cec_valid_addrs = 0;
++ }
++ adv7511->cec_enabled_adap = enable;
++ return 0;
++}
++
++static int adv7511_cec_adap_log_addr(struct cec_adapter *adap, u8 addr)
++{
++ struct adv7511 *adv7511 = cec_get_drvdata(adap);
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++ unsigned int i, free_idx = ADV7511_MAX_ADDRS;
++
++ if (!adv7511->cec_enabled_adap)
++ return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO;
++
++ if (addr == CEC_LOG_ADDR_INVALID) {
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_MASK + offset,
++ 0x70, 0);
++ adv7511->cec_valid_addrs = 0;
++ return 0;
++ }
++
++ for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
++ bool is_valid = adv7511->cec_valid_addrs & (1 << i);
++
++ if (free_idx == ADV7511_MAX_ADDRS && !is_valid)
++ free_idx = i;
++ if (is_valid && adv7511->cec_addr[i] == addr)
++ return 0;
++ }
++ if (i == ADV7511_MAX_ADDRS) {
++ i = free_idx;
++ if (i == ADV7511_MAX_ADDRS)
++ return -ENXIO;
++ }
++ adv7511->cec_addr[i] = addr;
++ adv7511->cec_valid_addrs |= 1 << i;
++
++ switch (i) {
++ case 0:
++ /* enable address mask 0 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_MASK + offset,
++ 0x10, 0x10);
++ /* set address for mask 0 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_0_1 + offset,
++ 0x0f, addr);
++ break;
++ case 1:
++ /* enable address mask 1 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_MASK + offset,
++ 0x20, 0x20);
++ /* set address for mask 1 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_0_1 + offset,
++ 0xf0, addr << 4);
++ break;
++ case 2:
++ /* enable address mask 2 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_MASK + offset,
++ 0x40, 0x40);
++ /* set address for mask 1 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_2 + offset,
++ 0x0f, addr);
++ break;
++ }
++ return 0;
++}
++
++static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
++ u32 signal_free_time, struct cec_msg *msg)
++{
++ struct adv7511 *adv7511 = cec_get_drvdata(adap);
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++ u8 len = msg->len;
++ unsigned int i;
++
++ /*
++ * The number of retries is the number of attempts - 1, but retry
++ * at least once. It's not clear if a value of 0 is allowed, so
++ * let's do at least one retry.
++ */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_RETRY + offset,
++ 0x70, max(1, attempts - 1) << 4);
++
++ /* blocking, clear cec tx irq status */
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_INT(1), 0x38, 0x38);
++
++ /* write data */
++ for (i = 0; i < len; i++)
++ regmap_write(adv7511->regmap_cec,
++ i + ADV7511_REG_CEC_TX_FRAME_HDR + offset,
++ msg->msg[i]);
++
++ /* set length (data + header) */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_FRAME_LEN + offset, len);
++ /* start transmit, enable tx */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_ENABLE + offset, 0x01);
++ return 0;
++}
++
++static const struct cec_adap_ops adv7511_cec_adap_ops = {
++ .adap_enable = adv7511_cec_adap_enable,
++ .adap_log_addr = adv7511_cec_adap_log_addr,
++ .adap_transmit = adv7511_cec_adap_transmit,
++};
++
++static int adv7511_cec_parse_dt(struct device *dev, struct adv7511 *adv7511)
++{
++ adv7511->cec_clk = devm_clk_get(dev, "cec");
++ if (IS_ERR(adv7511->cec_clk)) {
++ int ret = PTR_ERR(adv7511->cec_clk);
++
++ adv7511->cec_clk = NULL;
++ return ret;
++ }
++ clk_prepare_enable(adv7511->cec_clk);
++ adv7511->cec_clk_freq = clk_get_rate(adv7511->cec_clk);
++ return 0;
++}
++
++int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511,
++ unsigned int offset)
++{
++ int ret = adv7511_cec_parse_dt(dev, adv7511);
++
++ if (ret)
++ return ret;
++
++ adv7511->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
++ adv7511, dev_name(dev), CEC_CAP_DEFAULTS, ADV7511_MAX_ADDRS);
++ if (IS_ERR(adv7511->cec_adap))
++ return PTR_ERR(adv7511->cec_adap);
++
++ regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset, 0);
++ /* cec soft reset */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_SOFT_RESET + offset, 0x01);
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_SOFT_RESET + offset, 0x00);
++
++ /* legacy mode */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_BUFFERS + offset, 0x00);
++
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_CLK_DIV + offset,
++ ((adv7511->cec_clk_freq / 750000) - 1) << 2);
++
++ ret = cec_register_adapter(adv7511->cec_adap, dev);
++ if (ret) {
++ cec_delete_adapter(adv7511->cec_adap);
++ adv7511->cec_adap = NULL;
++ }
++ return ret;
++}
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index 37524035486f..8da5af390e75 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -11,12 +11,15 @@
+ #include <linux/module.h>
+ #include <linux/of_device.h>
+ #include <linux/slab.h>
++#include <linux/clk.h>
+
+ #include <drm/drmP.h>
+ #include <drm/drm_atomic.h>
+ #include <drm/drm_atomic_helper.h>
+ #include <drm/drm_edid.h>
+
++#include <media/cec.h>
++
+ #include "adv7511.h"
+
+ /* ADI recommended values for proper operation. */
+@@ -336,8 +339,10 @@ static void __adv7511_power_on(struct adv7511 *adv7511)
+ */
+ regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),
+ ADV7511_INT0_EDID_READY | ADV7511_INT0_HPD);
+- regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(1),
+- ADV7511_INT1_DDC_ERROR);
++ regmap_update_bits(adv7511->regmap,
++ ADV7511_REG_INT_ENABLE(1),
++ ADV7511_INT1_DDC_ERROR,
++ ADV7511_INT1_DDC_ERROR);
+ }
+
+ /*
+@@ -373,6 +378,9 @@ static void __adv7511_power_off(struct adv7511 *adv7511)
+ regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
+ ADV7511_POWER_POWER_DOWN,
+ ADV7511_POWER_POWER_DOWN);
++ regmap_update_bits(adv7511->regmap,
++ ADV7511_REG_INT_ENABLE(1),
++ ADV7511_INT1_DDC_ERROR, 0);
+ regcache_mark_dirty(adv7511->regmap);
+ }
+
+@@ -435,6 +443,8 @@ static void adv7511_hpd_work(struct work_struct *work)
+
+ if (adv7511->connector.status != status) {
+ adv7511->connector.status = status;
++ if (status == connector_status_disconnected)
++ cec_phys_addr_invalidate(adv7511->cec_adap);
+ drm_kms_helper_hotplug_event(adv7511->connector.dev);
+ }
+ }
+@@ -465,6 +475,10 @@ static int adv7511_irq_process(struct adv7511 *adv7511, bool process_hpd)
+ wake_up_all(&adv7511->wq);
+ }
+
++#ifdef CONFIG_DRM_I2C_ADV7511_CEC
++ adv7511_cec_irq_process(adv7511, irq1);
++#endif
++
+ return 0;
+ }
+
+@@ -607,6 +621,8 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
+
+ kfree(edid);
+
++ cec_s_phys_addr_from_edid(adv7511->cec_adap, edid);
++
+ return count;
+ }
+
+@@ -931,6 +947,65 @@ static void adv7511_uninit_regulators(struct adv7511 *adv)
+ regulator_bulk_disable(adv->num_supplies, adv->supplies);
+ }
+
++static bool adv7511_cec_register_volatile(struct device *dev, unsigned int reg)
++{
++ struct i2c_client *i2c = to_i2c_client(dev);
++ struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
++
++ if (adv7511->type == ADV7533)
++ reg -= ADV7533_REG_CEC_OFFSET;
++
++ switch (reg) {
++ case ADV7511_REG_CEC_RX_FRAME_HDR:
++ case ADV7511_REG_CEC_RX_FRAME_DATA0...
++ ADV7511_REG_CEC_RX_FRAME_DATA0 + 14:
++ case ADV7511_REG_CEC_RX_FRAME_LEN:
++ case ADV7511_REG_CEC_RX_BUFFERS:
++ case ADV7511_REG_CEC_TX_LOW_DRV_CNT:
++ return true;
++ }
++
++ return false;
++}
++
++static const struct regmap_config adv7511_cec_regmap_config = {
++ .reg_bits = 8,
++ .val_bits = 8,
++
++ .max_register = 0xff,
++ .cache_type = REGCACHE_RBTREE,
++ .volatile_reg = adv7511_cec_register_volatile,
++};
++
++static int adv7511_init_cec_regmap(struct adv7511 *adv)
++{
++ int ret;
++
++ adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
++ adv->i2c_main->addr - 1);
++ if (!adv->i2c_cec)
++ return -ENOMEM;
++ i2c_set_clientdata(adv->i2c_cec, adv);
++
++ adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
++ &adv7511_cec_regmap_config);
++ if (IS_ERR(adv->regmap_cec)) {
++ ret = PTR_ERR(adv->regmap_cec);
++ goto err;
++ }
++
++ if (adv->type == ADV7533) {
++ ret = adv7533_patch_cec_registers(adv);
++ if (ret)
++ goto err;
++ }
++
++ return 0;
++err:
++ i2c_unregister_device(adv->i2c_cec);
++ return ret;
++}
++
+ static int adv7511_parse_dt(struct device_node *np,
+ struct adv7511_link_config *config)
+ {
+@@ -1021,6 +1096,7 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ struct device *dev = &i2c->dev;
+ unsigned int main_i2c_addr = i2c->addr << 1;
+ unsigned int edid_i2c_addr = main_i2c_addr + 4;
++ unsigned int offset;
+ unsigned int val;
+ int ret;
+
+@@ -1104,11 +1180,9 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ goto uninit_regulators;
+ }
+
+- if (adv7511->type == ADV7533) {
+- ret = adv7533_init_cec(adv7511);
+- if (ret)
+- goto err_i2c_unregister_edid;
+- }
++ ret = adv7511_init_cec_regmap(adv7511);
++ if (ret)
++ goto err_i2c_unregister_edid;
+
+ INIT_WORK(&adv7511->hpd_work, adv7511_hpd_work);
+
+@@ -1123,10 +1197,6 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ goto err_unregister_cec;
+ }
+
+- /* CEC is unused for now */
+- regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL,
+- ADV7511_CEC_CTRL_POWER_DOWN);
+-
+ adv7511_power_off(adv7511);
+
+ i2c_set_clientdata(i2c, adv7511);
+@@ -1141,10 +1211,23 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+
+ adv7511_audio_init(dev, adv7511);
+
++ offset = adv7511->type == ADV7533 ? ADV7533_REG_CEC_OFFSET : 0;
++
++#ifdef CONFIG_DRM_I2C_ADV7511_CEC
++ ret = adv7511_cec_init(dev, adv7511, offset);
++ if (ret)
++ goto err_unregister_cec;
++#else
++ regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset,
++ ADV7511_CEC_CTRL_POWER_DOWN);
++#endif
++
+ return 0;
+
+ err_unregister_cec:
+- adv7533_uninit_cec(adv7511);
++ i2c_unregister_device(adv7511->i2c_cec);
++ if (adv7511->cec_clk)
++ clk_disable_unprepare(adv7511->cec_clk);
+ err_i2c_unregister_edid:
+ i2c_unregister_device(adv7511->i2c_edid);
+ uninit_regulators:
+@@ -1157,10 +1240,11 @@ static int adv7511_remove(struct i2c_client *i2c)
+ {
+ struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
+
+- if (adv7511->type == ADV7533) {
++ if (adv7511->type == ADV7533)
+ adv7533_detach_dsi(adv7511);
+- adv7533_uninit_cec(adv7511);
+- }
++ i2c_unregister_device(adv7511->i2c_cec);
++ if (adv7511->cec_clk)
++ clk_disable_unprepare(adv7511->cec_clk);
+
+ adv7511_uninit_regulators(adv7511);
+
+@@ -1168,6 +1252,8 @@ static int adv7511_remove(struct i2c_client *i2c)
+
+ adv7511_audio_exit(adv7511);
+
++ cec_unregister_adapter(adv7511->cec_adap);
++
+ i2c_unregister_device(adv7511->i2c_edid);
+
+ return 0;
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7533.c b/drivers/gpu/drm/bridge/adv7511/adv7533.c
+index ac804f81e2f6..185b6d842166 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7533.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7533.c
+@@ -32,14 +32,6 @@ static const struct reg_sequence adv7533_cec_fixed_registers[] = {
+ { 0x05, 0xc8 },
+ };
+
+-static const struct regmap_config adv7533_cec_regmap_config = {
+- .reg_bits = 8,
+- .val_bits = 8,
+-
+- .max_register = 0xff,
+- .cache_type = REGCACHE_RBTREE,
+-};
+-
+ static void adv7511_dsi_config_timing_gen(struct adv7511 *adv)
+ {
+ struct mipi_dsi_device *dsi = adv->dsi;
+@@ -145,37 +137,11 @@ int adv7533_patch_registers(struct adv7511 *adv)
+ ARRAY_SIZE(adv7533_fixed_registers));
+ }
+
+-void adv7533_uninit_cec(struct adv7511 *adv)
+-{
+- i2c_unregister_device(adv->i2c_cec);
+-}
+-
+-int adv7533_init_cec(struct adv7511 *adv)
++int adv7533_patch_cec_registers(struct adv7511 *adv)
+ {
+- int ret;
+-
+- adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
+- adv->i2c_main->addr - 1);
+- if (!adv->i2c_cec)
+- return -ENOMEM;
+-
+- adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
+- &adv7533_cec_regmap_config);
+- if (IS_ERR(adv->regmap_cec)) {
+- ret = PTR_ERR(adv->regmap_cec);
+- goto err;
+- }
+-
+- ret = regmap_register_patch(adv->regmap_cec,
++ return regmap_register_patch(adv->regmap_cec,
+ adv7533_cec_fixed_registers,
+ ARRAY_SIZE(adv7533_cec_fixed_registers));
+- if (ret)
+- goto err;
+-
+- return 0;
+-err:
+- adv7533_uninit_cec(adv);
+- return ret;
+ }
+
+ int adv7533_attach_dsi(struct adv7511 *adv)
+--
+2.19.0
+
diff --git a/patches/0006-drm-bridge-adv7511-Fix-a-use-after-free.patch b/patches/0006-drm-bridge-adv7511-Fix-a-use-after-free.patch
new file mode 100644
index 0000000..905c828
--- /dev/null
+++ b/patches/0006-drm-bridge-adv7511-Fix-a-use-after-free.patch
@@ -0,0 +1,38 @@
+From bdc69185e329743c878beb02e060d3ac0a0dc4e7 Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Tue, 17 Oct 2017 23:43:43 +0300
+Subject: [PATCH 0006/1795] drm/bridge: adv7511: Fix a use after free
+
+We free "edid", then use it again on the next line.
+
+Fixes: 3b1b975003e4 ("drm: adv7511/33: add HDMI CEC support")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20171017204343.zctliubjkq7imudi@mwanda
+(cherry picked from commit 8b32948690946e89c198e44f8a1252295473f348)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index 8da5af390e75..a85d16f20581 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -619,10 +619,10 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
+ adv7511_set_config_csc(adv7511, connector, adv7511->rgb,
+ drm_detect_hdmi_monitor(edid));
+
+- kfree(edid);
+-
+ cec_s_phys_addr_from_edid(adv7511->cec_adap, edid);
+
++ kfree(edid);
++
+ return count;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0007-drm-bridge-adv7511-33-Fix-adv7511_cec_init-failure-h.patch b/patches/0007-drm-bridge-adv7511-33-Fix-adv7511_cec_init-failure-h.patch
new file mode 100644
index 0000000..0fe8024
--- /dev/null
+++ b/patches/0007-drm-bridge-adv7511-33-Fix-adv7511_cec_init-failure-h.patch
@@ -0,0 +1,171 @@
+From 351510bc84f79b52e86236dc6a48829ede3fd3fe Mon Sep 17 00:00:00 2001
+From: Hans Verkuil <hverkuil@xs4all.nl>
+Date: Tue, 21 Nov 2017 09:17:43 +0100
+Subject: [PATCH 0007/1795] drm/bridge: adv7511/33: Fix adv7511_cec_init()
+ failure handling
+
+If the device tree for a board did not specify a cec clock, then
+adv7511_cec_init would return an error, which would cause adv7511_probe()
+to fail and thus there is no HDMI output.
+
+There is no need to have adv7511_probe() fail if the CEC initialization
+fails, so just change adv7511_cec_init() to a void function. In addition,
+adv7511_cec_init() should just return silently if the cec clock isn't
+found and show a message for any other errors.
+
+An otherwise correct cleanup patch from Dan Carpenter turned this broken
+failure handling into a kernel Oops, so bisection points to commit
+7af35b0addbc ("drm/kirin: Checking for IS_ERR() instead of NULL") rather
+than 3b1b975003e4 ("drm: adv7511/33: add HDMI CEC support").
+
+Based on earlier patches from Arnd and John.
+
+Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>
+Cc: Xinliang Liu <xinliang.liu@linaro.org>
+Cc: Dan Carpenter <dan.carpenter@oracle.com>
+Cc: Sean Paul <seanpaul@chromium.org>
+Cc: Archit Taneja <architt@codeaurora.org>
+Cc: John Stultz <john.stultz@linaro.org>
+Link: https://bugs.linaro.org/show_bug.cgi?id=3345
+Link: https://lkft.validation.linaro.org/scheduler/job/48017#L3551
+Fixes: 7af35b0addbc ("drm/kirin: Checking for IS_ERR() instead of NULL")
+Fixes: 3b1b975003e4 ("drm: adv7511/33: add HDMI CEC support")
+Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
+Tested-by: Hans Verkuil <hans.verkuil@cisco.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/9097b2a4-b6b9-5fca-e039-0a17694b1143@xs4all.nl
+(cherry picked from commit 1b6fba458c0a2e8513071330972c4c587b7d28cc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511.h | 13 ++++++--
+ drivers/gpu/drm/bridge/adv7511/adv7511_cec.c | 32 ++++++++++++++------
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 17 +++--------
+ 3 files changed, 37 insertions(+), 25 deletions(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+index b4efcbabf7f7..d034b2cb5eee 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+@@ -372,9 +372,18 @@ struct adv7511 {
+ };
+
+ #ifdef CONFIG_DRM_I2C_ADV7511_CEC
+-int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511,
+- unsigned int offset);
++int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511);
+ void adv7511_cec_irq_process(struct adv7511 *adv7511, unsigned int irq1);
++#else
++static inline int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511)
++{
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++
++ regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset,
++ ADV7511_CEC_CTRL_POWER_DOWN);
++ return 0;
++}
+ #endif
+
+ #ifdef CONFIG_DRM_I2C_ADV7533
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c b/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
+index b33d730e4d73..a20a45c0b353 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
+@@ -300,18 +300,21 @@ static int adv7511_cec_parse_dt(struct device *dev, struct adv7511 *adv7511)
+ return 0;
+ }
+
+-int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511,
+- unsigned int offset)
++int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511)
+ {
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
+ int ret = adv7511_cec_parse_dt(dev, adv7511);
+
+ if (ret)
+- return ret;
++ goto err_cec_parse_dt;
+
+ adv7511->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
+ adv7511, dev_name(dev), CEC_CAP_DEFAULTS, ADV7511_MAX_ADDRS);
+- if (IS_ERR(adv7511->cec_adap))
+- return PTR_ERR(adv7511->cec_adap);
++ if (IS_ERR(adv7511->cec_adap)) {
++ ret = PTR_ERR(adv7511->cec_adap);
++ goto err_cec_alloc;
++ }
+
+ regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset, 0);
+ /* cec soft reset */
+@@ -329,9 +332,18 @@ int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511,
+ ((adv7511->cec_clk_freq / 750000) - 1) << 2);
+
+ ret = cec_register_adapter(adv7511->cec_adap, dev);
+- if (ret) {
+- cec_delete_adapter(adv7511->cec_adap);
+- adv7511->cec_adap = NULL;
+- }
+- return ret;
++ if (ret)
++ goto err_cec_register;
++ return 0;
++
++err_cec_register:
++ cec_delete_adapter(adv7511->cec_adap);
++ adv7511->cec_adap = NULL;
++err_cec_alloc:
++ dev_info(dev, "Initializing CEC failed with error %d, disabling CEC\n",
++ ret);
++err_cec_parse_dt:
++ regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset,
++ ADV7511_CEC_CTRL_POWER_DOWN);
++ return ret == -EPROBE_DEFER ? ret : 0;
+ }
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index a85d16f20581..95066350a2b0 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -1096,7 +1096,6 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ struct device *dev = &i2c->dev;
+ unsigned int main_i2c_addr = i2c->addr << 1;
+ unsigned int edid_i2c_addr = main_i2c_addr + 4;
+- unsigned int offset;
+ unsigned int val;
+ int ret;
+
+@@ -1204,24 +1203,16 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ if (adv7511->type == ADV7511)
+ adv7511_set_link_config(adv7511, &link_config);
+
++ ret = adv7511_cec_init(dev, adv7511);
++ if (ret)
++ goto err_unregister_cec;
++
+ adv7511->bridge.funcs = &adv7511_bridge_funcs;
+ adv7511->bridge.of_node = dev->of_node;
+
+ drm_bridge_add(&adv7511->bridge);
+
+ adv7511_audio_init(dev, adv7511);
+-
+- offset = adv7511->type == ADV7533 ? ADV7533_REG_CEC_OFFSET : 0;
+-
+-#ifdef CONFIG_DRM_I2C_ADV7511_CEC
+- ret = adv7511_cec_init(dev, adv7511, offset);
+- if (ret)
+- goto err_unregister_cec;
+-#else
+- regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset,
+- ADV7511_CEC_CTRL_POWER_DOWN);
+-#endif
+-
+ return 0;
+
+ err_unregister_cec:
+--
+2.19.0
+
diff --git a/patches/0008-arm_arch_timer-Expose-event-stream-status.patch b/patches/0008-arm_arch_timer-Expose-event-stream-status.patch
new file mode 100644
index 0000000..9610caf
--- /dev/null
+++ b/patches/0008-arm_arch_timer-Expose-event-stream-status.patch
@@ -0,0 +1,154 @@
+From 419c8ec298950d2cdc08b3677a3368b84289ac33 Mon Sep 17 00:00:00 2001
+From: Julien Thierry <julien.thierry@arm.com>
+Date: Fri, 13 Oct 2017 14:32:55 +0100
+Subject: [PATCH 0008/1795] arm_arch_timer: Expose event stream status
+
+The arch timer configuration for a CPU might get reset after suspending
+said CPU.
+
+In order to reliably use the event stream in the kernel (e.g. for delays),
+we keep track of the state where we can safely consider the event stream as
+properly configured. After writing to cntkctl, we issue an ISB to ensure
+that subsequent delay loops can rely on the event stream being enabled.
+
+Signed-off-by: Julien Thierry <julien.thierry@arm.com>
+Acked-by: Mark Rutland <mark.rutland@arm.com>
+Cc: Marc Zyngier <marc.zyngier@arm.com>
+Cc: Russell King <linux@armlinux.org.uk>
+Cc: Catalin Marinas <catalin.marinas@arm.com>
+Cc: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+(cherry picked from commit ec5c8e429d07737ee94ee1fd2ae5029547484194)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/include/asm/arch_timer.h | 1 +
+ arch/arm64/include/asm/arch_timer.h | 1 +
+ drivers/clocksource/arm_arch_timer.c | 25 ++++++++++++++++++++++---
+ include/clocksource/arm_arch_timer.h | 6 ++++++
+ 4 files changed, 30 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
+index 9327e3a101dc..0a8d7bba2cb0 100644
+--- a/arch/arm/include/asm/arch_timer.h
++++ b/arch/arm/include/asm/arch_timer.h
+@@ -107,6 +107,7 @@ static inline u32 arch_timer_get_cntkctl(void)
+ static inline void arch_timer_set_cntkctl(u32 cntkctl)
+ {
+ asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));
++ isb();
+ }
+
+ #endif
+diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
+index a652ce0a5cb2..bdedd8f748d1 100644
+--- a/arch/arm64/include/asm/arch_timer.h
++++ b/arch/arm64/include/asm/arch_timer.h
+@@ -144,6 +144,7 @@ static inline u32 arch_timer_get_cntkctl(void)
+ static inline void arch_timer_set_cntkctl(u32 cntkctl)
+ {
+ write_sysreg(cntkctl, cntkctl_el1);
++ isb();
+ }
+
+ static inline u64 arch_counter_get_cntpct(void)
+diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
+index 14e2419063e9..a926e62444b0 100644
+--- a/drivers/clocksource/arm_arch_timer.c
++++ b/drivers/clocksource/arm_arch_timer.c
+@@ -77,6 +77,7 @@ static bool arch_timer_mem_use_virtual;
+ static bool arch_counter_suspend_stop;
+ static bool vdso_default = true;
+
++static cpumask_t evtstrm_available = CPU_MASK_NONE;
+ static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM);
+
+ static int __init early_evtstrm_cfg(char *buf)
+@@ -740,6 +741,7 @@ static void arch_timer_evtstrm_enable(int divider)
+ #ifdef CONFIG_COMPAT
+ compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM;
+ #endif
++ cpumask_set_cpu(smp_processor_id(), &evtstrm_available);
+ }
+
+ static void arch_timer_configure_evtstream(void)
+@@ -864,6 +866,16 @@ u32 arch_timer_get_rate(void)
+ return arch_timer_rate;
+ }
+
++bool arch_timer_evtstrm_available(void)
++{
++ /*
++ * We might get called from a preemptible context. This is fine
++ * because availability of the event stream should be always the same
++ * for a preemptible context and context where we might resume a task.
++ */
++ return cpumask_test_cpu(raw_smp_processor_id(), &evtstrm_available);
++}
++
+ static u64 arch_counter_get_cntvct_mem(void)
+ {
+ u32 vct_lo, vct_hi, tmp_hi;
+@@ -929,6 +941,8 @@ static int arch_timer_dying_cpu(unsigned int cpu)
+ {
+ struct clock_event_device *clk = this_cpu_ptr(arch_timer_evt);
+
++ cpumask_clear_cpu(smp_processor_id(), &evtstrm_available);
++
+ arch_timer_stop(clk);
+ return 0;
+ }
+@@ -938,10 +952,16 @@ static DEFINE_PER_CPU(unsigned long, saved_cntkctl);
+ static int arch_timer_cpu_pm_notify(struct notifier_block *self,
+ unsigned long action, void *hcpu)
+ {
+- if (action == CPU_PM_ENTER)
++ if (action == CPU_PM_ENTER) {
+ __this_cpu_write(saved_cntkctl, arch_timer_get_cntkctl());
+- else if (action == CPU_PM_ENTER_FAILED || action == CPU_PM_EXIT)
++
++ cpumask_clear_cpu(smp_processor_id(), &evtstrm_available);
++ } else if (action == CPU_PM_ENTER_FAILED || action == CPU_PM_EXIT) {
+ arch_timer_set_cntkctl(__this_cpu_read(saved_cntkctl));
++
++ if (elf_hwcap & HWCAP_EVTSTRM)
++ cpumask_set_cpu(smp_processor_id(), &evtstrm_available);
++ }
+ return NOTIFY_OK;
+ }
+
+@@ -1017,7 +1037,6 @@ static int __init arch_timer_register(void)
+ if (err)
+ goto out_unreg_notify;
+
+-
+ /* Register and immediately configure the timer on the boot CPU */
+ err = cpuhp_setup_state(CPUHP_AP_ARM_ARCH_TIMER_STARTING,
+ "clockevents/arm/arch_timer:starting",
+diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
+index cc805b72994a..4e28283e2ec6 100644
+--- a/include/clocksource/arm_arch_timer.h
++++ b/include/clocksource/arm_arch_timer.h
+@@ -93,6 +93,7 @@ struct arch_timer_mem {
+ extern u32 arch_timer_get_rate(void);
+ extern u64 (*arch_timer_read_counter)(void);
+ extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void);
++extern bool arch_timer_evtstrm_available(void);
+
+ #else
+
+@@ -106,6 +107,11 @@ static inline u64 arch_timer_read_counter(void)
+ return 0;
+ }
+
++static inline bool arch_timer_evtstrm_available(void)
++{
++ return false;
++}
++
+ #endif
+
+ #endif
+--
+2.19.0
+
diff --git a/patches/0009-dt-bindings-display-renesas-dw-hdmi-Drop-bogus-node-.patch b/patches/0009-dt-bindings-display-renesas-dw-hdmi-Drop-bogus-node-.patch
new file mode 100644
index 0000000..c43caec
--- /dev/null
+++ b/patches/0009-dt-bindings-display-renesas-dw-hdmi-Drop-bogus-node-.patch
@@ -0,0 +1,35 @@
+From fc990cb3f0c7be846f6fb90c6e9997af3c8c8844 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 30 Aug 2017 11:53:01 +0200
+Subject: [PATCH 0009/1795] dt-bindings: display: renesas: dw-hdmi: Drop bogus
+ node name suffix
+
+Node names should not use numerical suffixes if the nodes can be
+distinguished by unit-address.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8ac491a5d0934bf1a77db155d759c682ab790c45)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/display/bridge/renesas,dw-hdmi.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
+index b1a8929c2536..3a72a103a18a 100644
+--- a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
++++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
+@@ -37,7 +37,7 @@ Optional properties:
+
+ Example:
+
+- hdmi0: hdmi0@fead0000 {
++ hdmi0: hdmi@fead0000 {
+ compatible = "renesas,r8a7795-dw-hdmi";
+ reg = <0 0xfead0000 0 0x10000>;
+ interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0010-drm-bridge-synopsys-dw-hdmi-Enable-cec-clock.patch b/patches/0010-drm-bridge-synopsys-dw-hdmi-Enable-cec-clock.patch
new file mode 100644
index 0000000..dd01849
--- /dev/null
+++ b/patches/0010-drm-bridge-synopsys-dw-hdmi-Enable-cec-clock.patch
@@ -0,0 +1,93 @@
+From 46d5f742d13f01c4437253587a916c3954b5de64 Mon Sep 17 00:00:00 2001
+From: Pierre-Hugues Husson <phh@phh.me>
+Date: Sat, 25 Nov 2017 21:18:44 +0100
+Subject: [PATCH 0010/1795] drm/bridge: synopsys/dw-hdmi: Enable cec clock
+
+Support the "cec" optional clock. The documentation already mentions "cec"
+optional clock and it is used by several boards, but currently the driver
+doesn't enable it, thus preventing cec from working on those boards.
+
+And even worse: a /dev/cecX device will appear for those boards, but it
+won't be functioning without configuring this clock.
+
+Changes:
+v4:
+- Change commit message to stress the importance of this patch
+
+v3:
+- Drop useless braces
+
+v2:
+- Separate ENOENT errors from others
+- Propagate other errors (especially -EPROBE_DEFER)
+
+Signed-off-by: Pierre-Hugues Husson <phh@phh.me>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20171125201844.11353-1-phh@phh.me
+(cherry picked from commit ebe32c3e282a62974b190b9d514864fc0d56716e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 25 +++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+index 4db31b89507c..994f16727458 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+@@ -138,6 +138,7 @@ struct dw_hdmi {
+ struct device *dev;
+ struct clk *isfr_clk;
+ struct clk *iahb_clk;
++ struct clk *cec_clk;
+ struct dw_hdmi_i2c *i2c;
+
+ struct hdmi_data_info hdmi_data;
+@@ -2385,6 +2386,26 @@ __dw_hdmi_probe(struct platform_device *pdev,
+ goto err_isfr;
+ }
+
++ hdmi->cec_clk = devm_clk_get(hdmi->dev, "cec");
++ if (PTR_ERR(hdmi->cec_clk) == -ENOENT) {
++ hdmi->cec_clk = NULL;
++ } else if (IS_ERR(hdmi->cec_clk)) {
++ ret = PTR_ERR(hdmi->cec_clk);
++ if (ret != -EPROBE_DEFER)
++ dev_err(hdmi->dev, "Cannot get HDMI cec clock: %d\n",
++ ret);
++
++ hdmi->cec_clk = NULL;
++ goto err_iahb;
++ } else {
++ ret = clk_prepare_enable(hdmi->cec_clk);
++ if (ret) {
++ dev_err(hdmi->dev, "Cannot enable HDMI cec clock: %d\n",
++ ret);
++ goto err_iahb;
++ }
++ }
++
+ /* Product and revision IDs */
+ hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
+ | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
+@@ -2521,6 +2542,8 @@ __dw_hdmi_probe(struct platform_device *pdev,
+ cec_notifier_put(hdmi->cec_notifier);
+
+ clk_disable_unprepare(hdmi->iahb_clk);
++ if (hdmi->cec_clk)
++ clk_disable_unprepare(hdmi->cec_clk);
+ err_isfr:
+ clk_disable_unprepare(hdmi->isfr_clk);
+ err_res:
+@@ -2544,6 +2567,8 @@ static void __dw_hdmi_remove(struct dw_hdmi *hdmi)
+
+ clk_disable_unprepare(hdmi->iahb_clk);
+ clk_disable_unprepare(hdmi->isfr_clk);
++ if (hdmi->cec_clk)
++ clk_disable_unprepare(hdmi->cec_clk);
+
+ if (hdmi->i2c)
+ i2c_del_adapter(&hdmi->i2c->adap);
+--
+2.19.0
+
diff --git a/patches/0011-ASoC-fsi-Use-of_device_get_match_data-helper.patch b/patches/0011-ASoC-fsi-Use-of_device_get_match_data-helper.patch
new file mode 100644
index 0000000..84d6eeb
--- /dev/null
+++ b/patches/0011-ASoC-fsi-Use-of_device_get_match_data-helper.patch
@@ -0,0 +1,42 @@
+From e134bb048352c78db1fdbf498a4ea05992c4ca35 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:28:30 +0200
+Subject: [PATCH 0011/1795] ASoC: fsi: Use of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+Note that when used with DT, there's always a valid match.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit b48cc1d9c3a93b239700198f69b1a49b23d95b83)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/fsi.c | 11 +++--------
+ 1 file changed, 3 insertions(+), 8 deletions(-)
+
+diff --git a/sound/soc/sh/fsi.c b/sound/soc/sh/fsi.c
+index 6d3c7706d93f..c3aaf4788557 100644
+--- a/sound/soc/sh/fsi.c
++++ b/sound/soc/sh/fsi.c
+@@ -1932,14 +1932,9 @@ static int fsi_probe(struct platform_device *pdev)
+
+ core = NULL;
+ if (np) {
+- const struct of_device_id *of_id;
+-
+- of_id = of_match_device(fsi_of_match, &pdev->dev);
+- if (of_id) {
+- core = of_id->data;
+- fsi_of_parse("fsia", np, &info.port_a, &pdev->dev);
+- fsi_of_parse("fsib", np, &info.port_b, &pdev->dev);
+- }
++ core = of_device_get_match_data(&pdev->dev);
++ fsi_of_parse("fsia", np, &info.port_a, &pdev->dev);
++ fsi_of_parse("fsib", np, &info.port_b, &pdev->dev);
+ } else {
+ const struct platform_device_id *id_entry = pdev->id_entry;
+ if (id_entry)
+--
+2.19.0
+
diff --git a/patches/0012-arm64-defconfig-Enable-Renesas-R8A77995-SoC.patch b/patches/0012-arm64-defconfig-Enable-Renesas-R8A77995-SoC.patch
new file mode 100644
index 0000000..58f8d40
--- /dev/null
+++ b/patches/0012-arm64-defconfig-Enable-Renesas-R8A77995-SoC.patch
@@ -0,0 +1,31 @@
+From 64150c3156048cbf048fff81413039df82cd39ff Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 17 Aug 2017 13:32:11 +0200
+Subject: [PATCH 0012/1795] arm64: defconfig: Enable Renesas R8A77995 SoC
+
+Enable support for the Renesas R-Car D3 SoC.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0ed626d35ea2ec744826b3ebcb1d190a6c670d56)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index b05796578e7a..dd77931df8bb 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -51,6 +51,7 @@ CONFIG_ARCH_SEATTLE=y
+ CONFIG_ARCH_RENESAS=y
+ CONFIG_ARCH_R8A7795=y
+ CONFIG_ARCH_R8A7796=y
++CONFIG_ARCH_R8A77995=y
+ CONFIG_ARCH_STRATIX10=y
+ CONFIG_ARCH_TEGRA=y
+ CONFIG_ARCH_SPRD=y
+--
+2.19.0
+
diff --git a/patches/0013-ARM-shmobile-Document-R-Car-V3M-SoC-DT-bindings.patch b/patches/0013-ARM-shmobile-Document-R-Car-V3M-SoC-DT-bindings.patch
new file mode 100644
index 0000000..ec1310f
--- /dev/null
+++ b/patches/0013-ARM-shmobile-Document-R-Car-V3M-SoC-DT-bindings.patch
@@ -0,0 +1,31 @@
+From 9524224245997dadbfb3314716507108fa542338 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 25 Aug 2017 14:56:49 +0200
+Subject: [PATCH 0013/1795] ARM: shmobile: Document R-Car V3M SoC DT bindings
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 443c1631172a7a6dc19c1657425354327858a548)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
+index ae75cb3b1331..a1f06711a4dd 100644
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -39,6 +39,8 @@ SoCs:
+ compatible = "renesas,r8a7795"
+ - R-Car M3-W (R8A77960)
+ compatible = "renesas,r8a7796"
++ - R-Car V3M (R8A77970)
++ compatible = "renesas,r8a77970"
+ - R-Car D3 (R8A77995)
+ compatible = "renesas,r8a77995"
+
+--
+2.19.0
+
diff --git a/patches/0014-arm64-dts-renesas-r8a7795-es1-Drop-extra-zero-from-u.patch b/patches/0014-arm64-dts-renesas-r8a7795-es1-Drop-extra-zero-from-u.patch
new file mode 100644
index 0000000..18e1e3e
--- /dev/null
+++ b/patches/0014-arm64-dts-renesas-r8a7795-es1-Drop-extra-zero-from-u.patch
@@ -0,0 +1,38 @@
+From f5c9f3f261a0b807f9f13a08f5136ee2e4d7d494 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 17 Aug 2017 13:29:14 +0200
+Subject: [PATCH 0014/1795] arm64: dts: renesas: r8a7795-es1: Drop extra zero
+ from usb unit address
+
+With W=1:
+
+ arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/usb@ee0400000 simple-bus unit address format error, expected "ee040000"
+ arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dtb: Warning (simple_bus_reg): Node /soc/usb@ee0400000 simple-bus unit address format error, expected "ee040000"
+
+Fixes: 291e0c4994d0813f ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0")
+Fixes: 171f2ef82284f61b ("arm64: dts: r8a7795: Add USB3.0 host device nodes")
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0e0f4d47288a8e56ed2586699b89573afcb1bf72)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
+index aaa5e67a963e..655dd30639c5 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
+@@ -11,7 +11,7 @@
+ #include "r8a7795.dtsi"
+
+ &soc {
+- xhci1: usb@ee0400000 {
++ xhci1: usb@ee040000 {
+ compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
+ reg = <0 0xee040000 0 0xc00>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0015-arm64-dts-renesas-r8a7796-Add-FDP1-instance.patch b/patches/0015-arm64-dts-renesas-r8a7796-Add-FDP1-instance.patch
new file mode 100644
index 0000000..8e50aac
--- /dev/null
+++ b/patches/0015-arm64-dts-renesas-r8a7796-Add-FDP1-instance.patch
@@ -0,0 +1,42 @@
+From 39e6b59e4eb8ce49c6045629dfb91231fdd87e34 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 13 Jul 2017 14:21:10 +0300
+Subject: [PATCH 0015/1795] arm64: dts: renesas: r8a7796: Add FDP1 instance
+
+The r8a7796 has a single FDP1 instance.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8ef7512a68f4cd559af5d5f0be3ee2e89f0769ec)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+index 369092e17e34..16da83458f18 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -1659,6 +1659,16 @@
+ /* placeholder */
+ };
+
++ fdp1@fe940000 {
++ compatible = "renesas,fdp1";
++ reg = <0 0xfe940000 0 0x2400>;
++ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 119>;
++ power-domains = <&sysc R8A7796_PD_A3VC>;
++ resets = <&cpg 119>;
++ renesas,fcp = <&fcpf0>;
++ };
++
+ fcpf0: fcp@fe950000 {
+ compatible = "renesas,fcpf";
+ reg = <0 0xfe950000 0 0x200>;
+--
+2.19.0
+
diff --git a/patches/0016-arm64-dts-renesas-r8a77995-update-PFC-node-name-to-p.patch b/patches/0016-arm64-dts-renesas-r8a77995-update-PFC-node-name-to-p.patch
new file mode 100644
index 0000000..267a170
--- /dev/null
+++ b/patches/0016-arm64-dts-renesas-r8a77995-update-PFC-node-name-to-p.patch
@@ -0,0 +1,37 @@
+From d0a7e2a95a05befba54ac3c88330feb9ad060ec0 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 29 Aug 2017 16:35:59 +0900
+Subject: [PATCH 0016/1795] arm64: dts: renesas: r8a77995: update PFC node name
+ to pin-controller
+
+This patch changes the name from from e6060000.pfc and pfc@e6060000 to
+e6060000.pin-controller and pin-controller@e6060000 like other Renesas
+SoCs.
+
+Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5a979972b6cb799944423f00c4e269d826c6d2c7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index d0f95b78c022..72c303362b16 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -122,7 +122,7 @@
+ reg = <0 0xe6160000 0 0x0200>;
+ };
+
+- pfc: pfc@e6060000 {
++ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a77995";
+ reg = <0 0xe6060000 0 0x508>;
+ };
+--
+2.19.0
+
diff --git a/patches/0017-arm64-dts-renesas-ulcb-Enable-display-output.patch b/patches/0017-arm64-dts-renesas-ulcb-Enable-display-output.patch
new file mode 100644
index 0000000..e13987e
--- /dev/null
+++ b/patches/0017-arm64-dts-renesas-ulcb-Enable-display-output.patch
@@ -0,0 +1,35 @@
+From e0cd57cb4a496f98adf25af47bd33546e7877d14 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 22 Aug 2017 17:23:26 +0300
+Subject: [PATCH 0017/1795] arm64: dts: renesas: ulcb: Enable display output
+
+The DU is already wired up to the HDMI encoder, all we need to do is
+enable it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7da2ed12da2c81b782ee4c3b4b0b87098048aae8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+index e95d99265af9..f630a8340b37 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+@@ -156,6 +156,10 @@
+ };
+ };
+
++&du {
++ status = "okay";
++};
++
+ &ehci1 {
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0018-arm64-dts-renesas-r8a7795-Drop-bogus-HDMI-node-names.patch b/patches/0018-arm64-dts-renesas-r8a7795-Drop-bogus-HDMI-node-names.patch
new file mode 100644
index 0000000..5cedf5f
--- /dev/null
+++ b/patches/0018-arm64-dts-renesas-r8a7795-Drop-bogus-HDMI-node-names.patch
@@ -0,0 +1,44 @@
+From ebceaf848008d7b8529c36b8c0a0e5f7615a4877 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 30 Aug 2017 12:03:17 +0200
+Subject: [PATCH 0018/1795] arm64: dts: renesas: r8a7795: Drop bogus HDMI node
+ names suffixes
+
+Node names should not use numerical suffixes if the nodes can be
+distinguished by unit-address.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6b5ac2f1cb1162679662f3be891978d32b345b6f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+index 2938195b9571..5d5174d8635d 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+@@ -2014,7 +2014,7 @@
+ renesas,fcp = <&fcpf1>;
+ };
+
+- hdmi0: hdmi0@fead0000 {
++ hdmi0: hdmi@fead0000 {
+ compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
+ reg = <0 0xfead0000 0 0x10000>;
+ interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
+@@ -2039,7 +2039,7 @@
+ };
+ };
+
+- hdmi1: hdmi1@feae0000 {
++ hdmi1: hdmi@feae0000 {
+ compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
+ reg = <0 0xfeae0000 0 0x10000>;
+ interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0019-arm64-dts-renesas-r8a77995-Use-r8a7795-sysc-binding-.patch b/patches/0019-arm64-dts-renesas-r8a77995-Use-r8a7795-sysc-binding-.patch
new file mode 100644
index 0000000..8fe5787
--- /dev/null
+++ b/patches/0019-arm64-dts-renesas-r8a77995-Use-r8a7795-sysc-binding-.patch
@@ -0,0 +1,76 @@
+From 6af8fcdbd4b809f00f61ef9742a14e5ab20a81c1 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 20 Jul 2017 14:54:36 +0200
+Subject: [PATCH 0019/1795] arm64: dts: renesas: r8a77995: Use r8a7795-sysc
+ binding definitions
+
+Replace the hardcoded power domain indices by R8A77995_PD_* symbols.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9066b042b4502f711c5207662ec0d26be1732aff)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 ++++++-----
+ 1 file changed, 6 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index 72c303362b16..a5b769b840e9 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -11,6 +11,7 @@
+
+ #include <dt-bindings/clock/renesas-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/power/r8a77995-sysc.h>
+
+ / {
+ compatible = "renesas,r8a77995";
+@@ -30,14 +31,14 @@
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0>;
+ device_type = "cpu";
+- power-domains = <&sysc 5>;
++ power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ L2_CA53: cache-controller-1 {
+ compatible = "cache";
+- power-domains = <&sysc 21>;
++ power-domains = <&sysc R8A77995_PD_CA53_SCU>;
+ cache-unified;
+ cache-level = <2>;
+ };
+@@ -76,7 +77,7 @@
+ (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+- power-domains = <&sysc 32>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
+@@ -97,7 +98,7 @@
+ "renesas,rcar-gen3-wdt";
+ reg = <0 0xe6020000 0 0x0c>;
+ clocks = <&cpg CPG_MOD 402>;
+- power-domains = <&sysc 32>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 402>;
+ status = "disabled";
+ };
+@@ -147,7 +148,7 @@
+ <&cpg CPG_CORE 16>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+- power-domains = <&sysc 32>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 310>;
+ status = "disabled";
+ };
+--
+2.19.0
+
diff --git a/patches/0020-arm64-dts-renesas-r8a77995-Use-r8a7795-cpg-mssr-bind.patch b/patches/0020-arm64-dts-renesas-r8a77995-Use-r8a7795-cpg-mssr-bind.patch
new file mode 100644
index 0000000..a3ddc67
--- /dev/null
+++ b/patches/0020-arm64-dts-renesas-r8a77995-Use-r8a7795-cpg-mssr-bind.patch
@@ -0,0 +1,42 @@
+From cd8bd1d558c5f50392bad847663b83cdaf3b8b86 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 20 Jul 2017 14:54:37 +0200
+Subject: [PATCH 0020/1795] arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr
+ binding definitions
+
+Replace the hardcoded clock indices by R8A77995_CLK_* symbols.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5889ded170cd5b6f5a9449956288d069074b20c4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index a5b769b840e9..84b6bd58eafb 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -9,7 +9,7 @@
+ * kind, whether express or implied.
+ */
+
+-#include <dt-bindings/clock/renesas-cpg-mssr.h>
++#include <dt-bindings/clock/r8a77995-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/r8a77995-sysc.h>
+
+@@ -145,7 +145,7 @@
+ reg = <0 0xe6e88000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 310>,
+- <&cpg CPG_CORE 16>,
++ <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+--
+2.19.0
+
diff --git a/patches/0021-arm64-dts-renesas-r8a77995-add-GPIO-device-nodes.patch b/patches/0021-arm64-dts-renesas-r8a77995-add-GPIO-device-nodes.patch
new file mode 100644
index 0000000..2f23d40
--- /dev/null
+++ b/patches/0021-arm64-dts-renesas-r8a77995-add-GPIO-device-nodes.patch
@@ -0,0 +1,144 @@
+From 2521a068e9e30dc8ad64844dce2c215d4ac1b919 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 13 Sep 2017 19:33:59 +0900
+Subject: [PATCH 0021/1795] arm64: dts: renesas: r8a77995: add GPIO device
+ nodes
+
+This patch adds GPIO device nodes for r8a77995.
+
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 11581f5d52a81fe32fb1bb1c71fb22fb9192ee01)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 112 ++++++++++++++++++++++
+ 1 file changed, 112 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index 84b6bd58eafb..d7756256d2a6 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -139,6 +139,118 @@
+ #power-domain-cells = <1>;
+ };
+
++ gpio0: gpio@e6050000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6050000 0 0x50>;
++ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 0 9>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 912>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 912>;
++ };
++
++ gpio1: gpio@e6051000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6051000 0 0x50>;
++ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 32 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 911>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 911>;
++ };
++
++ gpio2: gpio@e6052000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6052000 0 0x50>;
++ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 64 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 910>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 910>;
++ };
++
++ gpio3: gpio@e6053000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6053000 0 0x50>;
++ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 96 10>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 909>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 909>;
++ };
++
++ gpio4: gpio@e6054000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6054000 0 0x50>;
++ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 128 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 908>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 908>;
++ };
++
++ gpio5: gpio@e6055000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6055000 0 0x50>;
++ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 160 21>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 907>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 907>;
++ };
++
++ gpio6: gpio@e6055400 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6055400 0 0x50>;
++ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 192 14>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 906>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 906>;
++ };
++
+ scif2: serial@e6e88000 {
+ compatible = "renesas,scif-r8a77995",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+--
+2.19.0
+
diff --git a/patches/0022-arm64-dts-renesas-r8a77995-Add-EthernetAVB-device-no.patch b/patches/0022-arm64-dts-renesas-r8a77995-Add-EthernetAVB-device-no.patch
new file mode 100644
index 0000000..a2a1c55
--- /dev/null
+++ b/patches/0022-arm64-dts-renesas-r8a77995-Add-EthernetAVB-device-no.patch
@@ -0,0 +1,77 @@
+From 1dbcd1eb493a757444f904aac5b6f558b7def69e Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 13 Sep 2017 21:18:38 +0900
+Subject: [PATCH 0022/1795] arm64: dts: renesas: r8a77995: Add EthernetAVB
+ device node
+
+This patch adds EthernetAVB device node for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f9ba0c4cfe6169b7cc9a2f9653c76b05316f0508)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 45 +++++++++++++++++++++++
+ 1 file changed, 45 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index d7756256d2a6..72d04d7337be 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -251,6 +251,51 @@
+ resets = <&cpg 906>;
+ };
+
++ avb: ethernet@e6800000 {
++ compatible = "renesas,etheravb-r8a77995",
++ "renesas,etheravb-rcar-gen3";
++ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
++ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14", "ch15",
++ "ch16", "ch17", "ch18", "ch19",
++ "ch20", "ch21", "ch22", "ch23",
++ "ch24";
++ clocks = <&cpg CPG_MOD 812>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 812>;
++ phy-mode = "rgmii-txid";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
+ scif2: serial@e6e88000 {
+ compatible = "renesas,scif-r8a77995",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+--
+2.19.0
+
diff --git a/patches/0023-arm64-dts-renesas-initial-R8A77970-SoC-device-tree.patch b/patches/0023-arm64-dts-renesas-initial-R8A77970-SoC-device-tree.patch
new file mode 100644
index 0000000..059145c
--- /dev/null
+++ b/patches/0023-arm64-dts-renesas-initial-R8A77970-SoC-device-tree.patch
@@ -0,0 +1,158 @@
+From 54b42f135cf32911d2318dab5e86db00466ec9be Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:20 +0300
+Subject: [PATCH 0023/1795] arm64: dts: renesas: initial R8A77970 SoC device
+ tree
+
+The initial R8A77970 SoC device tree including Cortex-A53 CPU, GIC, timer,
+CPG, RST, and SYSC.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 41f4345a6111056341346742942df3f5d5be535d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 125 ++++++++++++++++++++++
+ 1 file changed, 125 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a77970.dtsi
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+new file mode 100644
+index 000000000000..dec3492cd7dc
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -0,0 +1,125 @@
++/*
++ * Device Tree Source for the r8a77970 SoC
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/clock/renesas-cpg-mssr.h>
++
++/ {
++ compatible = "renesas,r8a77970";
++ #address-cells = <2>;
++ #size-cells = <2>;
++
++ psci {
++ compatible = "arm,psci-1.0", "arm,psci-0.2";
++ method = "smc";
++ };
++
++ cpus {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ a53_0: cpu@0 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a53", "arm,armv8";
++ reg = <0>;
++ clocks = <&cpg CPG_CORE 0>;
++ power-domains = <&sysc 5>;
++ next-level-cache = <&L2_CA53>;
++ enable-method = "psci";
++ };
++
++ L2_CA53: cache-controller {
++ compatible = "cache";
++ power-domains = <&sysc 21>;
++ cache-unified;
++ cache-level = <2>;
++ };
++ };
++
++ extal_clk: extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board */
++ clock-frequency = <0>;
++ };
++
++ extalr_clk: extalr {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board */
++ clock-frequency = <0>;
++ };
++
++ soc {
++ compatible = "simple-bus";
++ interrupt-parent = <&gic>;
++
++ #address-cells = <2>;
++ #size-cells = <2>;
++ ranges;
++
++ gic: interrupt-controller@f1010000 {
++ compatible = "arm,gic-400";
++ #interrupt-cells = <3>;
++ #address-cells = <0>;
++ interrupt-controller;
++ reg = <0 0xf1010000 0 0x1000>,
++ <0 0xf1020000 0 0x20000>,
++ <0 0xf1040000 0 0x20000>,
++ <0 0xf1060000 0 0x20000>;
++ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) |
++ IRQ_TYPE_LEVEL_HIGH)>;
++ clocks = <&cpg CPG_MOD 408>;
++ clock-names = "clk";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 408>;
++ };
++
++ timer {
++ compatible = "arm,armv8-timer";
++ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) |
++ IRQ_TYPE_LEVEL_LOW)>;
++ };
++
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a77970-cpg-mssr";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>, <&extalr_clk>;
++ clock-names = "extal", "extalr";
++ #clock-cells = <2>;
++ #power-domain-cells = <0>;
++ #reset-cells = <1>;
++ };
++
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a77970-rst";
++ reg = <0 0xe6160000 0 0x200>;
++ };
++
++ sysc: system-controller@e6180000 {
++ compatible = "renesas,r8a77970-sysc";
++ reg = <0 0xe6180000 0 0x440>;
++ #power-domain-cells = <1>;
++ };
++
++ prr: chipid@fff00044 {
++ compatible = "renesas,prr";
++ reg = <0 0xfff00044 0 4>;
++ };
++ };
++};
+--
+2.19.0
+
diff --git a/patches/0024-arm64-dts-renesas-r8a77970-add-SYS-DMAC-support.patch b/patches/0024-arm64-dts-renesas-r8a77970-add-SYS-DMAC-support.patch
new file mode 100644
index 0000000..7aaf971
--- /dev/null
+++ b/patches/0024-arm64-dts-renesas-r8a77970-add-SYS-DMAC-support.patch
@@ -0,0 +1,82 @@
+From e9b0e4ffed3b9d1d8659be90c75281030a29f4fc Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:21 +0300
+Subject: [PATCH 0024/1795] arm64: dts: renesas: r8a77970: add SYS-DMAC support
+
+Describe SYS-DMAC1/2 in the R8A77970 device tree.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bd746e70d3fce2cb1719fd2c085cd57a872575fe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 48 +++++++++++++++++++++++
+ 1 file changed, 48 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+index dec3492cd7dc..a2a438a91b3f 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -121,5 +121,53 @@
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+ };
++
++ dmac1: dma-controller@e7300000 {
++ compatible = "renesas,dmac-r8a77970",
++ "renesas,rcar-dmac";
++ reg = <0 0xe7300000 0 0x10000>;
++ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7";
++ clocks = <&cpg CPG_MOD 218>;
++ clock-names = "fck";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 218>;
++ #dma-cells = <1>;
++ dma-channels = <8>;
++ };
++
++ dmac2: dma-controller@e7310000 {
++ compatible = "renesas,dmac-r8a77970",
++ "renesas,rcar-dmac";
++ reg = <0 0xe7310000 0 0x10000>;
++ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7";
++ clocks = <&cpg CPG_MOD 217>;
++ clock-names = "fck";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 217>;
++ #dma-cells = <1>;
++ dma-channels = <8>;
++ };
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0025-arm64-dts-renesas-r8a77970-add-H-SCIF-support.patch b/patches/0025-arm64-dts-renesas-r8a77970-add-H-SCIF-support.patch
new file mode 100644
index 0000000..a297c98
--- /dev/null
+++ b/patches/0025-arm64-dts-renesas-r8a77970-add-H-SCIF-support.patch
@@ -0,0 +1,190 @@
+From d2dea25968cf965cb6e71962e8571cca3c68df5a Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:22 +0300
+Subject: [PATCH 0025/1795] arm64: dts: renesas: r8a77970: add [H]SCIF support
+
+Describe [H]SCIF ports in the R8A77970 device tree.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 38dbb6fc972e53110f0bc308057822d73c063903)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 149 ++++++++++++++++++++++
+ 1 file changed, 149 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+index a2a438a91b3f..04ec0e459686 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -59,6 +59,13 @@
+ clock-frequency = <0>;
+ };
+
++ /* External SCIF clock - to be overridden by boards that provide it */
++ scif_clk: scif {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
+@@ -169,5 +176,147 @@
+ #dma-cells = <1>;
+ dma-channels = <8>;
+ };
++
++ hscif0: serial@e6540000 {
++ compatible = "renesas,hscif-r8a77970",
++ "renesas,rcar-gen3-hscif",
++ "renesas,hscif";
++ reg = <0 0xe6540000 0 96>;
++ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 520>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x31>, <&dmac1 0x30>,
++ <&dmac2 0x31>, <&dmac2 0x30>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 520>;
++ status = "disabled";
++ };
++
++ hscif1: serial@e6550000 {
++ compatible = "renesas,hscif-r8a77970",
++ "renesas,rcar-gen3-hscif",
++ "renesas,hscif";
++ reg = <0 0xe6550000 0 96>;
++ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 519>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x33>, <&dmac1 0x32>,
++ <&dmac2 0x33>, <&dmac2 0x32>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 519>;
++ status = "disabled";
++ };
++
++ hscif2: serial@e6560000 {
++ compatible = "renesas,hscif-r8a77970",
++ "renesas,rcar-gen3-hscif",
++ "renesas,hscif";
++ reg = <0 0xe6560000 0 96>;
++ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 518>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x35>, <&dmac1 0x34>,
++ <&dmac2 0x35>, <&dmac2 0x34>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 518>;
++ status = "disabled";
++ };
++
++ hscif3: serial@e66a0000 {
++ compatible = "renesas,hscif-r8a77970",
++ "renesas,rcar-gen3-hscif", "renesas,hscif";
++ reg = <0 0xe66a0000 0 96>;
++ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 517>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x37>, <&dmac1 0x36>,
++ <&dmac2 0x37>, <&dmac2 0x36>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 517>;
++ status = "disabled";
++ };
++
++ scif0: serial@e6e60000 {
++ compatible = "renesas,scif-r8a77970",
++ "renesas,rcar-gen3-scif",
++ "renesas,scif";
++ reg = <0 0xe6e60000 0 64>;
++ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 207>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x51>, <&dmac1 0x50>,
++ <&dmac2 0x51>, <&dmac2 0x50>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 207>;
++ status = "disabled";
++ };
++
++ scif1: serial@e6e68000 {
++ compatible = "renesas,scif-r8a77970",
++ "renesas,rcar-gen3-scif",
++ "renesas,scif";
++ reg = <0 0xe6e68000 0 64>;
++ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 206>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x53>, <&dmac1 0x52>,
++ <&dmac2 0x53>, <&dmac2 0x52>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 206>;
++ status = "disabled";
++ };
++
++ scif3: serial@e6c50000 {
++ compatible = "renesas,scif-r8a77970",
++ "renesas,rcar-gen3-scif",
++ "renesas,scif";
++ reg = <0 0xe6c50000 0 64>;
++ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 204>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x57>, <&dmac1 0x56>,
++ <&dmac2 0x57>, <&dmac2 0x56>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 204>;
++ status = "disabled";
++ };
++
++ scif4: serial@e6c40000 {
++ compatible = "renesas,scif-r8a77970",
++ "renesas,rcar-gen3-scif", "renesas,scif";
++ reg = <0 0xe6c40000 0 64>;
++ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 203>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x59>, <&dmac1 0x58>,
++ <&dmac2 0x59>, <&dmac2 0x58>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 203>;
++ status = "disabled";
++ };
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0026-arm64-dts-renesas-r8a77970-add-EtherAVB-support.patch b/patches/0026-arm64-dts-renesas-r8a77970-add-EtherAVB-support.patch
new file mode 100644
index 0000000..c7ae2f6
--- /dev/null
+++ b/patches/0026-arm64-dts-renesas-r8a77970-add-EtherAVB-support.patch
@@ -0,0 +1,78 @@
+From 93338b398d7f5f258678d743f5e08517b4b8ee32 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:23 +0300
+Subject: [PATCH 0026/1795] arm64: dts: renesas: r8a77970: add EtherAVB support
+
+Define the generic R8A77970 part of the EtherAVB device node.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bea2ab136eaacec2d14613a3ab89557298fa9748)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 44 +++++++++++++++++++++++
+ 1 file changed, 44 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+index 04ec0e459686..aa9032d34189 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -318,5 +318,49 @@
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
++
++ avb: ethernet@e6800000 {
++ compatible = "renesas,etheravb-r8a77970",
++ "renesas,etheravb-rcar-gen3";
++ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
++ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14", "ch15",
++ "ch16", "ch17", "ch18", "ch19",
++ "ch20", "ch21", "ch22", "ch23",
++ "ch24";
++ clocks = <&cpg CPG_MOD 812>;
++ power-domains = <&sysc 32>;
++ resets = <&cpg 812>;
++ phy-mode = "rgmii-id";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0027-arm64-dts-draak-Add-serial-console-pins.patch b/patches/0027-arm64-dts-draak-Add-serial-console-pins.patch
new file mode 100644
index 0000000..46134bd
--- /dev/null
+++ b/patches/0027-arm64-dts-draak-Add-serial-console-pins.patch
@@ -0,0 +1,42 @@
+From 36604b1b641c6a33c316ec30324ce63d1e9af646 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 28 Aug 2017 11:26:10 +0200
+Subject: [PATCH 0027/1795] arm64: dts: draak: Add serial console pins
+
+Add pin control for SCIF2.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ea203404fb2f0b3b4cc24917044f7bd72fef12c7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index d144370051d5..19c5462d8b67 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -36,7 +36,18 @@
+ clock-frequency = <48000000>;
+ };
+
++&pfc {
++ scif2_pins: scif2 {
++ groups = "scif2_data";
++ function = "scif2";
++ };
++
++};
++
+ &scif2 {
++ pinctrl-0 = <&scif2_pins>;
++ pinctrl-names = "default";
++
+ status = "okay";
+ };
+
+--
+2.19.0
+
diff --git a/patches/0028-arm64-defconfig-enable-thermal-driver-for-Renesas-R-.patch b/patches/0028-arm64-defconfig-enable-thermal-driver-for-Renesas-R-.patch
new file mode 100644
index 0000000..918f857
--- /dev/null
+++ b/patches/0028-arm64-defconfig-enable-thermal-driver-for-Renesas-R-.patch
@@ -0,0 +1,32 @@
+From 77fca15b0d05389f17e2e0519790eed9e88bd260 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Mon, 18 Sep 2017 20:31:13 +0200
+Subject: [PATCH 0028/1795] arm64: defconfig: enable thermal driver for Renesas
+ R-Car Gen3
+
+We want this driver to detect critical temperatures in time.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 86f0a075111d16e3b48d79b44858e141ea86cad7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index dd77931df8bb..4b2230b45003 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -318,6 +318,7 @@ CONFIG_CPU_THERMAL=y
+ CONFIG_THERMAL_EMULATION=y
+ CONFIG_BRCMSTB_THERMAL=m
+ CONFIG_EXYNOS_THERMAL=y
++CONFIG_RCAR_GEN3_THERMAL=y
+ CONFIG_ROCKCHIP_THERMAL=m
+ CONFIG_WATCHDOG=y
+ CONFIG_S3C2410_WATCHDOG=y
+--
+2.19.0
+
diff --git a/patches/0029-arm64-defconfig-enable-the-Marvell-10G-PHY-as-a-modu.patch b/patches/0029-arm64-defconfig-enable-the-Marvell-10G-PHY-as-a-modu.patch
new file mode 100644
index 0000000..d1cc312
--- /dev/null
+++ b/patches/0029-arm64-defconfig-enable-the-Marvell-10G-PHY-as-a-modu.patch
@@ -0,0 +1,33 @@
+From ae1f0b4e40a662d55ed30ff4acd441d0f5fe7068 Mon Sep 17 00:00:00 2001
+From: Antoine Tenart <antoine.tenart@free-electrons.com>
+Date: Mon, 18 Sep 2017 09:58:06 +0200
+Subject: [PATCH 0029/1795] arm64: defconfig: enable the Marvell 10G PHY as a
+ module
+
+The Marvell 10G PHY is present on mvebu platforms. Enable it as a module
+so that the network works on these platforms.
+
+Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+(cherry picked from commit 6dee349e8c618a0dbb7e7dd0cf31da1a3eadd31a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 4b2230b45003..9024f4979b3c 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -205,6 +205,7 @@ CONFIG_STMMAC_ETH=m
+ CONFIG_MDIO_BUS_MUX_MMIOREG=y
+ CONFIG_AT803X_PHY=m
+ CONFIG_MARVELL_PHY=m
++CONFIG_MARVELL_10G_PHY=m
+ CONFIG_MESON_GXL_PHY=m
+ CONFIG_MICREL_PHY=y
+ CONFIG_REALTEK_PHY=m
+--
+2.19.0
+
diff --git a/patches/0030-arm64-defconfig-enable-Marvell-CP110-comphy.patch b/patches/0030-arm64-defconfig-enable-Marvell-CP110-comphy.patch
new file mode 100644
index 0000000..174897a
--- /dev/null
+++ b/patches/0030-arm64-defconfig-enable-Marvell-CP110-comphy.patch
@@ -0,0 +1,34 @@
+From 673e0e9f8fb42a249ec7525d20a479135423f338 Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@free-electrons.com>
+Date: Mon, 18 Sep 2017 09:58:07 +0200
+Subject: [PATCH 0030/1795] arm64: defconfig: enable Marvell CP110 comphy
+
+The comphy is an hardware block giving access to common PHYs that can be
+used by various other engines (Network, SATA, ...). This is used on
+Marvell 7k/8k platforms for now. Enable the corresponding driver.
+
+Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
+Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+(cherry picked from commit a18615b7ef8d35c799a055013b9af1ec69cf244d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 9024f4979b3c..6b5f0235fdab 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -539,6 +539,7 @@ CONFIG_PWM_TEGRA=m
+ CONFIG_PHY_RCAR_GEN3_USB2=y
+ CONFIG_PHY_HI6220_USB=y
+ CONFIG_PHY_SUN4I_USB=y
++CONFIG_PHY_MVEBU_CP110_COMPHY=y
+ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+ CONFIG_PHY_ROCKCHIP_EMMC=y
+ CONFIG_PHY_ROCKCHIP_PCIE=m
+--
+2.19.0
+
diff --git a/patches/0031-arm-shmobile-Document-Kingfisher-board-DT-bindings.patch b/patches/0031-arm-shmobile-Document-Kingfisher-board-DT-bindings.patch
new file mode 100644
index 0000000..051024c
--- /dev/null
+++ b/patches/0031-arm-shmobile-Document-Kingfisher-board-DT-bindings.patch
@@ -0,0 +1,37 @@
+From 3547dff6f0edcb8035ccbb7d2a77af5a5d223ae2 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Sat, 16 Sep 2017 21:48:47 +0300
+Subject: [PATCH 0031/1795] arm: shmobile: Document Kingfisher board DT
+ bindings
+
+Add Kingfisher Device tree bindings Documentation, listing it as a
+supported board.
+Kingfisher is the H3ULCB/M3ULCB extension board.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5418a9004126992aa2bbd07d79e8305659cb0dc9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
+index a1f06711a4dd..e9bd3091dcf6 100644
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -78,6 +78,8 @@ Boards:
+ compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"
+ - iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
+ compatible = "iwave,g20m", "renesas,r8a7743"
++ - Kingfisher (SBEV-RCAR-KF-M03)
++ compatible = "shimafuji,kingfisher"
+ - Koelsch (RTP0RC7791SEB00010S)
+ compatible = "renesas,koelsch", "renesas,r8a7791"
+ - Kyoto Microcomputer Co. KZM-A9-Dual
+--
+2.19.0
+
diff --git a/patches/0032-arm64-dts-renesas-r8a77995-Add-USB2.0-PHY-device-nod.patch b/patches/0032-arm64-dts-renesas-r8a77995-Add-USB2.0-PHY-device-nod.patch
new file mode 100644
index 0000000..65c466d
--- /dev/null
+++ b/patches/0032-arm64-dts-renesas-r8a77995-Add-USB2.0-PHY-device-nod.patch
@@ -0,0 +1,43 @@
+From ab99b5cb29c16ab14ba2a65bebe1c8e4f39c63e7 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 19:30:40 +0900
+Subject: [PATCH 0032/1795] arm64: dts: renesas: r8a77995: Add USB2.0 PHY
+ device node
+
+This patch adds USB2.0 PHY device node for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a0ea7fe8d34cbede9928b44e9a6b1dcd3f0150d1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index 72d04d7337be..59ed1303bd93 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -309,5 +309,17 @@
+ resets = <&cpg 310>;
+ status = "disabled";
+ };
++
++ usb2_phy0: usb-phy@ee080200 {
++ compatible = "renesas,usb2-phy-r8a77995",
++ "renesas,rcar-gen3-usb2-phy";
++ reg = <0 0xee080200 0 0x700>;
++ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 703>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
++ #phy-cells = <0>;
++ status = "disabled";
++ };
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0033-arm64-dts-renesas-r8a77995-add-USB2.0-Host-EHCI-OHCI.patch b/patches/0033-arm64-dts-renesas-r8a77995-add-USB2.0-Host-EHCI-OHCI.patch
new file mode 100644
index 0000000..bb81bc3
--- /dev/null
+++ b/patches/0033-arm64-dts-renesas-r8a77995-add-USB2.0-Host-EHCI-OHCI.patch
@@ -0,0 +1,57 @@
+From 3d3c3ed6b4f68150d9cd39af94a16f31d4fe1c34 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 19:30:41 +0900
+Subject: [PATCH 0033/1795] arm64: dts: renesas: r8a77995: add USB2.0 Host
+ (EHCI/OHCI) device node
+
+This patch adds USB2.0 Host (EHCI/OHCI) device node for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 423254a1799bc7ea1f81db0b5e0c7eb1494c13f1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 25 +++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index 59ed1303bd93..56e42921e879 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -310,6 +310,31 @@
+ status = "disabled";
+ };
+
++ ehci0: usb@ee080100 {
++ compatible = "generic-ehci";
++ reg = <0 0xee080100 0 0x100>;
++ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 703>;
++ phys = <&usb2_phy0>;
++ phy-names = "usb";
++ companion = <&ohci0>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
++ status = "disabled";
++ };
++
++ ohci0: usb@ee080000 {
++ compatible = "generic-ohci";
++ reg = <0 0xee080000 0 0x100>;
++ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 703>;
++ phys = <&usb2_phy0>;
++ phy-names = "usb";
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
++ status = "disabled";
++ };
++
+ usb2_phy0: usb-phy@ee080200 {
+ compatible = "renesas,usb2-phy-r8a77995",
+ "renesas,rcar-gen3-usb2-phy";
+--
+2.19.0
+
diff --git a/patches/0034-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-PHY.patch b/patches/0034-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-PHY.patch
new file mode 100644
index 0000000..05ff012
--- /dev/null
+++ b/patches/0034-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-PHY.patch
@@ -0,0 +1,50 @@
+From ff1519dd02f520869d0782381b9fedf920523e58 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 19:30:42 +0900
+Subject: [PATCH 0034/1795] arm64: dts: renesas: r8a77995: draak: enable USB2.0
+ PHY
+
+This patch enables USB2.0 PHY for R-Car D3 draak board.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 34f058b2731bd8c06237ea5725a557edba687ff4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index 19c5462d8b67..454658ac6efc 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -42,6 +42,10 @@
+ function = "scif2";
+ };
+
++ usb0_pins: usb0 {
++ groups = "usb0";
++ function = "usb0";
++ };
+ };
+
+ &scif2 {
+@@ -51,6 +55,13 @@
+ status = "okay";
+ };
+
++&usb2_phy0 {
++ pinctrl-0 = <&usb0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
+ &rwdt {
+ timeout-sec = <60>;
+ status = "okay";
+--
+2.19.0
+
diff --git a/patches/0035-arm64-renesas-document-Eagle-board-bindings.patch b/patches/0035-arm64-renesas-document-Eagle-board-bindings.patch
new file mode 100644
index 0000000..0d4c207
--- /dev/null
+++ b/patches/0035-arm64-renesas-document-Eagle-board-bindings.patch
@@ -0,0 +1,37 @@
+From 11637031d62244c91f1559e3559e67a97c19e3dd Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:24 +0300
+Subject: [PATCH 0035/1795] arm64: renesas: document Eagle board bindings
+
+Document the Eagle device tree bindings, listing it as a supported board.
+
+This allows to use checkpatch.pl to validate .dts files referring to the
+Eagle board.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e22b36bd75ad57fdf1010ce7d6d92df96311947b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
+index e9bd3091dcf6..4fa984ada912 100644
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -59,6 +59,8 @@ Boards:
+ compatible = "renesas,bockw", "renesas,r8a7778"
+ - Draak (RTP0RC77995SEB0010S)
+ compatible = "renesas,draak", "renesas,r8a77995"
++ - Eagle (RTP0RC77970SEB0010S)
++ compatible = "renesas,eagle", "renesas,r8a77970"
+ - Genmai (RTK772100BC00000BR)
+ compatible = "renesas,genmai", "renesas,r7s72100"
+ - GR-Peach (X28A-M01-E/F)
+--
+2.19.0
+
diff --git a/patches/0036-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-Host-.patch b/patches/0036-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-Host-.patch
new file mode 100644
index 0000000..c1f2084
--- /dev/null
+++ b/patches/0036-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-Host-.patch
@@ -0,0 +1,40 @@
+From e6a36effc238a85c9f64855870613ba4cbde883c Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 19:30:43 +0900
+Subject: [PATCH 0036/1795] arm64: dts: renesas: r8a77995: draak: enable USB2.0
+ Host (EHCI/OHCI)
+
+This patch enables USB2.0 Host (EHCI/OHCI) for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 607c73c38e8492677da02a999eabd669e96f6d88)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index 454658ac6efc..7b776cb7e928 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -48,6 +48,14 @@
+ };
+ };
+
++&ehci0 {
++ status = "okay";
++};
++
++&ohci0 {
++ status = "okay";
++};
++
+ &scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+--
+2.19.0
+
diff --git a/patches/0037-ARM-shmobile-remove-inconsistent-from-documentation.patch b/patches/0037-ARM-shmobile-remove-inconsistent-from-documentation.patch
new file mode 100644
index 0000000..84461ad
--- /dev/null
+++ b/patches/0037-ARM-shmobile-remove-inconsistent-from-documentation.patch
@@ -0,0 +1,57 @@
+From dd3d9b496b34df460f7f3fb7efb70aaef18e2973 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 21 Sep 2017 11:44:59 +0200
+Subject: [PATCH 0037/1795] ARM: shmobile: remove inconsistent ; from
+ documentation
+
+Consistently do not suffix compat string documentation with a ';'
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 2e931b06de97d762ef139bffbbe75e1483735734)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
+index 4fa984ada912..020d758fc0c5 100644
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -69,7 +69,7 @@ Boards:
+ compatible = "renesas,gose", "renesas,r8a7793"
+ - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
+ H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
+- compatible = "renesas,h3ulcb", "renesas,r8a7795";
++ compatible = "renesas,h3ulcb", "renesas,r8a7795"
+ - Henninger
+ compatible = "renesas,henninger", "renesas,r8a7791"
+ - iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
+@@ -91,7 +91,7 @@ Boards:
+ - Lager (RTP0RC7790SEB00010S)
+ compatible = "renesas,lager", "renesas,r8a7790"
+ - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
+- compatible = "renesas,m3ulcb", "renesas,r8a7796";
++ compatible = "renesas,m3ulcb", "renesas,r8a7796"
+ - Marzen (R0P7779A00010S)
+ compatible = "renesas,marzen", "renesas,r8a7779"
+ - Porter (M2-LCDP)
+@@ -99,11 +99,11 @@ Boards:
+ - RSKRZA1 (YR0K77210C000BE)
+ compatible = "renesas,rskrza1", "renesas,r7s72100"
+ - Salvator-X (RTP0RC7795SIPB0010S)
+- compatible = "renesas,salvator-x", "renesas,r8a7795";
++ compatible = "renesas,salvator-x", "renesas,r8a7795"
+ - Salvator-X (RTP0RC7796SIPB0011S)
+- compatible = "renesas,salvator-x", "renesas,r8a7796";
++ compatible = "renesas,salvator-x", "renesas,r8a7796"
+ - Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
+- compatible = "renesas,salvator-xs", "renesas,r8a7795";
++ compatible = "renesas,salvator-xs", "renesas,r8a7795"
+ - SILK (RTP0RC7794LCB00011S)
+ compatible = "renesas,silk", "renesas,r8a7794"
+ - SK-RZG1E (YR8A77450S000BE)
+--
+2.19.0
+
diff --git a/patches/0038-arm64-dts-renesas-r8a77995-draak-enable-EthernetAVB.patch b/patches/0038-arm64-dts-renesas-r8a77995-draak-enable-EthernetAVB.patch
new file mode 100644
index 0000000..b7a45fb
--- /dev/null
+++ b/patches/0038-arm64-dts-renesas-r8a77995-draak-enable-EthernetAVB.patch
@@ -0,0 +1,78 @@
+From e677c9dc0ee3578c5a6e66ac4e63e197be02f031 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 13 Sep 2017 21:18:39 +0900
+Subject: [PATCH 0038/1795] arm64: dts: renesas: r8a77995: draak: enable
+ EthernetAVB
+
+This patch enables EthernetAVB for R-Car D3 draak board.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4503b50eac08f472e8690ec61f4d144e62cbdc55)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index 7b776cb7e928..96b7ff5cc321 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -11,6 +11,7 @@
+
+ /dts-v1/;
+ #include "r8a77995.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+
+ / {
+ model = "Renesas Draak board based on r8a77995";
+@@ -18,6 +19,7 @@
+
+ aliases {
+ serial0 = &scif2;
++ ethernet0 = &avb;
+ };
+
+ chosen {
+@@ -37,6 +39,14 @@
+ };
+
+ &pfc {
++ avb0_pins: avb {
++ mux {
++ groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
++ "avb0_mii";
++ function = "avb0";
++ };
++ };
++
+ scif2_pins: scif2 {
+ groups = "scif2_data";
+ function = "scif2";
+@@ -56,6 +66,21 @@
+ status = "okay";
+ };
+
++&avb {
++ pinctrl-0 = <&avb0_pins>;
++ pinctrl-names = "default";
++ renesas,no-ether-link;
++ phy-handle = <&phy0>;
++ status = "okay";
++
++ phy0: ethernet-phy@0 {
++ rxc-skew-ps = <1500>;
++ reg = <0>;
++ interrupt-parent = <&gpio5>;
++ interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
++ };
++};
++
+ &scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+--
+2.19.0
+
diff --git a/patches/0039-arm64-dts-renesas-r8a7795-add-USB3.0-peripheral-devi.patch b/patches/0039-arm64-dts-renesas-r8a7795-add-USB3.0-peripheral-devi.patch
new file mode 100644
index 0000000..e9c5bf4
--- /dev/null
+++ b/patches/0039-arm64-dts-renesas-r8a7795-add-USB3.0-peripheral-devi.patch
@@ -0,0 +1,43 @@
+From 27cb3d576b51704b1b19fe272afac48e326957f1 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 21 Sep 2017 14:31:25 +0900
+Subject: [PATCH 0039/1795] arm64: dts: renesas: r8a7795: add USB3.0 peripheral
+ device node
+
+This patch adds USB3.0 peripheral channel 0 device node for r8a7795.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3bdba1b26771496ad8db8cd948ce144fc1ce1ca2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+index 5d5174d8635d..d5cfd1a1c539 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+@@ -1471,6 +1471,17 @@
+ status = "disabled";
+ };
+
++ usb3_peri0: usb@ee020000 {
++ compatible = "renesas,r8a7795-usb3-peri",
++ "renesas,rcar-gen3-usb3-peri";
++ reg = <0 0xee020000 0 0x400>;
++ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 328>;
++ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
++ resets = <&cpg 328>;
++ status = "disabled";
++ };
++
+ usb_dmac0: dma-controller@e65a0000 {
+ compatible = "renesas,r8a7795-usb-dmac",
+ "renesas,usb-dmac";
+--
+2.19.0
+
diff --git a/patches/0040-arm64-dts-renesas-r8a7796-add-USB3.0-peripheral-devi.patch b/patches/0040-arm64-dts-renesas-r8a7796-add-USB3.0-peripheral-devi.patch
new file mode 100644
index 0000000..773f678
--- /dev/null
+++ b/patches/0040-arm64-dts-renesas-r8a7796-add-USB3.0-peripheral-devi.patch
@@ -0,0 +1,43 @@
+From 0b8fbf5b5064146d87a6bfaee4cc3926ff3b530a Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 21 Sep 2017 14:31:26 +0900
+Subject: [PATCH 0040/1795] arm64: dts: renesas: r8a7796: add USB3.0 peripheral
+ device node
+
+This patch adds USB3.0 peripheral channel 0 device node for r8a7796.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2affee619d48d101831e83e74cadeb7c5200d9cb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+index 16da83458f18..57ac5ca6ed98 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -1279,6 +1279,17 @@
+ status = "disabled";
+ };
+
++ usb3_peri0: usb@ee020000 {
++ compatible = "renesas,r8a7796-usb3-peri",
++ "renesas,rcar-gen3-usb3-peri";
++ reg = <0 0xee020000 0 0x400>;
++ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 328>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ resets = <&cpg 328>;
++ status = "disabled";
++ };
++
+ ohci0: usb@ee080000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee080000 0 0x100>;
+--
+2.19.0
+
diff --git a/patches/0041-arm64-defconfig-enable-R8A77970-SoC.patch b/patches/0041-arm64-defconfig-enable-R8A77970-SoC.patch
new file mode 100644
index 0000000..47a28ee
--- /dev/null
+++ b/patches/0041-arm64-defconfig-enable-R8A77970-SoC.patch
@@ -0,0 +1,33 @@
+From 3b4778c8bff033b366996035c92ecb86caa53782 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 23 Sep 2017 00:36:25 +0300
+Subject: [PATCH 0041/1795] arm64: defconfig: enable R8A77970 SoC
+
+Enable the Renesas R-Car V3M (R8A77970) SoC in the ARM64 defconfig.
+
+Suggested-by: Simon Horman <horms@verge.net.au>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bb58b29899ff9c6d1e97727ec05b500e832ebd7d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 6b5f0235fdab..fd65b621180d 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -51,6 +51,7 @@ CONFIG_ARCH_SEATTLE=y
+ CONFIG_ARCH_RENESAS=y
+ CONFIG_ARCH_R8A7795=y
+ CONFIG_ARCH_R8A7796=y
++CONFIG_ARCH_R8A77970=y
+ CONFIG_ARCH_R8A77995=y
+ CONFIG_ARCH_STRATIX10=y
+ CONFIG_ARCH_TEGRA=y
+--
+2.19.0
+
diff --git a/patches/0042-arm64-defconfig-enable-NAND-on-Armada-7K-8K-SoCs.patch b/patches/0042-arm64-defconfig-enable-NAND-on-Armada-7K-8K-SoCs.patch
new file mode 100644
index 0000000..bd1a6cd
--- /dev/null
+++ b/patches/0042-arm64-defconfig-enable-NAND-on-Armada-7K-8K-SoCs.patch
@@ -0,0 +1,31 @@
+From a36bad101bc0287fd8effcd564e861fe6ef4853e Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Date: Wed, 27 Sep 2017 17:58:22 +0200
+Subject: [PATCH 0042/1795] arm64: defconfig: enable NAND on Armada 7K/8K SoCs
+
+The PXA3xx NAND driver supports also the NAND controller found on the
+Armada 7K/8K SoCs, so enable it.
+
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+(cherry picked from commit 5fe74e0a72474eb48fa8abe1eb49dedb16b2537b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index fd65b621180d..dfb60597d412 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -158,6 +158,7 @@ CONFIG_MTD_BLOCK=y
+ CONFIG_MTD_M25P80=y
+ CONFIG_MTD_NAND=y
+ CONFIG_MTD_NAND_DENALI_DT=y
++CONFIG_MTD_NAND_PXA3xx=y
+ CONFIG_MTD_SPI_NOR=y
+ CONFIG_BLK_DEV_LOOP=y
+ CONFIG_BLK_DEV_NBD=m
+--
+2.19.0
+
diff --git a/patches/0043-arm64-dts-renesas-salvator-common-drop-avb_phy_int-f.patch b/patches/0043-arm64-dts-renesas-salvator-common-drop-avb_phy_int-f.patch
new file mode 100644
index 0000000..00f9252
--- /dev/null
+++ b/patches/0043-arm64-dts-renesas-salvator-common-drop-avb_phy_int-f.patch
@@ -0,0 +1,40 @@
+From 7e655071b784cb4c3d88a3d7cfdce22092755dc1 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 3 Oct 2017 13:57:11 +0900
+Subject: [PATCH 0043/1795] arm64: dts: renesas: salvator-common: drop
+ "avb_phy_int" from avb_pins
+
+Since the Ethernet AVB driver doesn't support AVB_PHY_INT handling
+and it will be handled by a phy driver as a gpio pin, this patch
+removes the "avb_phy_int" from the avb_pins node.
+
+Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Fixes: 7d73a4da2681 ("arm64: dts: r8a7795: salvator-x: Set drive-strength for ravb pins")
+Fixes: 4903987033be ("arm64: dts: r8a7796: salvator-x: Set drive-strength for ravb pins")
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 86b93a2dff65ab6e22ffd28bb132a2c3970b6e68)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+index 26a978616071..cfb79cb3dd87 100644
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+@@ -380,8 +380,7 @@
+
+ avb_pins: avb {
+ mux {
+- groups = "avb_link", "avb_phy_int", "avb_mdc",
+- "avb_mii";
++ groups = "avb_link", "avb_mdc", "avb_mii";
+ function = "avb";
+ };
+
+--
+2.19.0
+
diff --git a/patches/0044-arm64-dts-renesas-ulcb-drop-avb_phy_int-from-avb_pin.patch b/patches/0044-arm64-dts-renesas-ulcb-drop-avb_phy_int-from-avb_pin.patch
new file mode 100644
index 0000000..895a2cb
--- /dev/null
+++ b/patches/0044-arm64-dts-renesas-ulcb-drop-avb_phy_int-from-avb_pin.patch
@@ -0,0 +1,39 @@
+From 2347831c74555a8b5d02aefbc80849b8d5c1b349 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 3 Oct 2017 13:57:12 +0900
+Subject: [PATCH 0044/1795] arm64: dts: renesas: ulcb: drop "avb_phy_int" from
+ avb_pins
+
+Since the Ethernet AVB driver doesn't support AVB_PHY_INT handling
+and it will be handled by a phy driver as a gpio pin, this patch
+removes the "avb_phy_int" from the avb_pins node.
+
+Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Fixes: 133ace3f3804 ("arm64: dts: ulcb: Set drive-strength for ravb pins")
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bc04ba36fb1b6c7ebe1df6011da8679e2a5b90bf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb.dtsi | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+index f630a8340b37..d32d876156b1 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+@@ -253,8 +253,7 @@
+
+ avb_pins: avb {
+ mux {
+- groups = "avb_link", "avb_phy_int", "avb_mdc",
+- "avb_mii";
++ groups = "avb_link", "avb_mdc", "avb_mii";
+ function = "avb";
+ };
+
+--
+2.19.0
+
diff --git a/patches/0045-arm64-dts-renesas-r8a77995-draak-drop-avb_phy_int-fr.patch b/patches/0045-arm64-dts-renesas-r8a77995-draak-drop-avb_phy_int-fr.patch
new file mode 100644
index 0000000..9854589
--- /dev/null
+++ b/patches/0045-arm64-dts-renesas-r8a77995-draak-drop-avb_phy_int-fr.patch
@@ -0,0 +1,39 @@
+From 9e8b99005aa3d914c8b8d5cbd6bf12b7976ea46f Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 3 Oct 2017 13:57:13 +0900
+Subject: [PATCH 0045/1795] arm64: dts: renesas: r8a77995: draak: drop
+ "avb_phy_int" from avb_pins
+
+Since the Ethernet AVB driver doesn't support AVB_PHY_INT handling
+and it will be handled by a phy driver as a gpio pin, this patch
+removes the "avb_phy_int" from the avb_pins node.
+
+Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Fixes: 4503b50eac08 ("arm64: dts: renesas: r8a77995: draak: enable EthernetAVB")
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 12bb361979b523bbae00542c17cda8f3f0048860)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index 96b7ff5cc321..fac58be83383 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -41,8 +41,7 @@
+ &pfc {
+ avb0_pins: avb {
+ mux {
+- groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
+- "avb0_mii";
++ groups = "avb0_link", "avb0_mdc", "avb0_mii";
+ function = "avb0";
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0046-arm64-dts-renesas-initial-Eagle-board-device-tree.patch b/patches/0046-arm64-dts-renesas-initial-Eagle-board-device-tree.patch
new file mode 100644
index 0000000..5858b53
--- /dev/null
+++ b/patches/0046-arm64-dts-renesas-initial-Eagle-board-device-tree.patch
@@ -0,0 +1,91 @@
+From 9be74f7b4509ece6faf3a22cfc36f529a997dfef Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 12 Sep 2017 23:37:26 +0300
+Subject: [PATCH 0046/1795] arm64: dts: renesas: initial Eagle board device
+ tree
+
+Add the initial device tree for the R8A77970 SoC based Eagle board.
+The board has 1 debug serial port (SCIF0); include support for it,
+so that the serial console can work.
+
+Based on the original (and large) patch by Vladimir Barinov
+<vladimir.barinov@cogentembedded.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1a48290edf6f78962b1d96008aea954b7b3e5969)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/Makefile | 1 +
+ .../arm64/boot/dts/renesas/r8a77970-eagle.dts | 45 +++++++++++++++++++
+ 2 files changed, 46 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index d417701640bd..3c2332a60f4e 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
++dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb
+ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
+
+ always := $(dtb-y)
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+new file mode 100644
+index 000000000000..a4d1d4f24675
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+@@ -0,0 +1,45 @@
++/*
++ * Device Tree Source for the Eagle board
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "r8a77970.dtsi"
++
++/ {
++ model = "Renesas Eagle board based on r8a77970";
++ compatible = "renesas,eagle", "renesas,r8a77970";
++
++ aliases {
++ serial0 = &scif0;
++ };
++
++ chosen {
++ bootargs = "ignore_loglevel";
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@48000000 {
++ device_type = "memory";
++ /* first 128MB is reserved for secure area. */
++ reg = <0x0 0x48000000 0x0 0x38000000>;
++ };
++};
++
++&extal_clk {
++ clock-frequency = <16666666>;
++};
++
++&extalr_clk {
++ clock-frequency = <32768>;
++};
++
++&scif0 {
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0047-arm64-dts-renesas-salvator-common-add-pfc-node-for-U.patch b/patches/0047-arm64-dts-renesas-salvator-common-add-pfc-node-for-U.patch
new file mode 100644
index 0000000..778df20
--- /dev/null
+++ b/patches/0047-arm64-dts-renesas-salvator-common-add-pfc-node-for-U.patch
@@ -0,0 +1,49 @@
+From 4ae8a817fe18a8f592cdb51833917c2447e2d5d1 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 3 Oct 2017 17:01:12 +0900
+Subject: [PATCH 0047/1795] arm64: dts: renesas: salvator-common: add pfc node
+ for USB3.0 channel 0
+
+Since a R-Car Gen3 bootloader enables the PFC of USB3.0 channel 0,
+the USB3.0 host controller works without this setting on the kernel.
+But, this setting should have salvator-common.dtsi. So, this patch
+adds the pfc node for USB3.0 channel 0.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 73de4b8847892fa7d6fffd14139c5083a3fd1580)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+index cfb79cb3dd87..3525b6dfff68 100644
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+@@ -494,6 +494,11 @@
+ bias-pull-down;
+ };
+ };
++
++ usb30_pins: usb30 {
++ groups = "usb30";
++ function = "usb30";
++ };
+ };
+
+ &pwm1 {
+@@ -637,5 +642,8 @@
+ };
+
+ &xhci0 {
++ pinctrl-0 = <&usb30_pins>;
++ pinctrl-names = "default";
++
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0048-arm64-dts-renesas-r8a77995-add-PWM-device-nodes.patch b/patches/0048-arm64-dts-renesas-r8a77995-add-PWM-device-nodes.patch
new file mode 100644
index 0000000..4a00fde
--- /dev/null
+++ b/patches/0048-arm64-dts-renesas-r8a77995-add-PWM-device-nodes.patch
@@ -0,0 +1,71 @@
+From 8a7b33ea06a085b1f6452048e8a43db6675f1b22 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 4 Oct 2017 19:27:30 +0900
+Subject: [PATCH 0048/1795] arm64: dts: renesas: r8a77995: add PWM device nodes
+
+This patch adds PWM device nodes for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d40a434746bf2d6dbcc01bb1a14575c11e933cc3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 40 +++++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index 56e42921e879..bcc4d132f827 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -310,6 +310,46 @@
+ status = "disabled";
+ };
+
++ pwm0: pwm@e6e30000 {
++ compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
++ reg = <0 0xe6e30000 0 0x8>;
++ #pwm-cells = <2>;
++ clocks = <&cpg CPG_MOD 523>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 523>;
++ status = "disabled";
++ };
++
++ pwm1: pwm@e6e31000 {
++ compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
++ reg = <0 0xe6e31000 0 0x8>;
++ #pwm-cells = <2>;
++ clocks = <&cpg CPG_MOD 523>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 523>;
++ status = "disabled";
++ };
++
++ pwm2: pwm@e6e32000 {
++ compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
++ reg = <0 0xe6e32000 0 0x8>;
++ #pwm-cells = <2>;
++ clocks = <&cpg CPG_MOD 523>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 523>;
++ status = "disabled";
++ };
++
++ pwm3: pwm@e6e33000 {
++ compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
++ reg = <0 0xe6e33000 0 0x8>;
++ #pwm-cells = <2>;
++ clocks = <&cpg CPG_MOD 523>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 523>;
++ status = "disabled";
++ };
++
+ ehci0: usb@ee080100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee080100 0 0x100>;
+--
+2.19.0
+
diff --git a/patches/0049-arm64-dts-renesas-r8a77995-draak-enable-PWM-channel-.patch b/patches/0049-arm64-dts-renesas-r8a77995-draak-enable-PWM-channel-.patch
new file mode 100644
index 0000000..6891225
--- /dev/null
+++ b/patches/0049-arm64-dts-renesas-r8a77995-draak-enable-PWM-channel-.patch
@@ -0,0 +1,64 @@
+From 79b05be8e0203fbee6fcfc17f5b7e7032417697f Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 4 Oct 2017 19:27:31 +0900
+Subject: [PATCH 0049/1795] arm64: dts: renesas: r8a77995: draak: enable PWM
+ channel 0 and 1
+
+This patch enables PWM channel 0 and 1 on the draak. Each channel
+connects to LTC2644 for brightness control.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b35334447513c14a4dd55a67c269a743d4a4824b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../arm64/boot/dts/renesas/r8a77995-draak.dts | 24 +++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index fac58be83383..09de73b11db8 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -46,6 +46,16 @@
+ };
+ };
+
++ pwm0_pins: pwm0 {
++ groups = "pwm0_c";
++ function = "pwm0";
++ };
++
++ pwm1_pins: pwm1 {
++ groups = "pwm1_c";
++ function = "pwm1";
++ };
++
+ scif2_pins: scif2 {
+ groups = "scif2_data";
+ function = "scif2";
+@@ -94,6 +104,20 @@
+ status = "okay";
+ };
+
++&pwm0 {
++ pinctrl-0 = <&pwm0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&pwm1 {
++ pinctrl-0 = <&pwm1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
+ &rwdt {
+ timeout-sec = <60>;
+ status = "okay";
+--
+2.19.0
+
diff --git a/patches/0050-arm64-dts-ulcb-kf-initial-device-tree.patch b/patches/0050-arm64-dts-ulcb-kf-initial-device-tree.patch
new file mode 100644
index 0000000..e6188e0
--- /dev/null
+++ b/patches/0050-arm64-dts-ulcb-kf-initial-device-tree.patch
@@ -0,0 +1,62 @@
+From 4c77fb2d761509cc8110fac944d26fb324a021a3 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 6 Oct 2017 20:55:56 +0300
+Subject: [PATCH 0050/1795] arm64: dts: ulcb-kf: initial device tree
+
+Add the initial common dtsi file for Kingfisher infotainment board (R-Car
+Starter Kit extension)
+
+This commit supports the following peripherals:
+- HSCIF0
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 52cb66073d4358644f6adb83221e4432decb28bf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 31 ++++++++++++++++++++++++
+ 1 file changed, 31 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+new file mode 100644
+index 000000000000..849f8b102c67
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -0,0 +1,31 @@
++/*
++ * Device Tree Source for the Kingfisher (ULCB extension) board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/ {
++ aliases {
++ serial1 = &hscif0;
++ };
++};
++
++&hscif0 {
++ pinctrl-0 = <&hscif0_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
++};
++
++&pfc {
++ hscif0_pins: hscif0 {
++ groups = "hscif0_data", "hscif0_ctrl";
++ function = "hscif0";
++ };
++};
+--
+2.19.0
+
diff --git a/patches/0051-arm64-dts-m3ulcb-kf-initial-device-tree.patch b/patches/0051-arm64-dts-m3ulcb-kf-initial-device-tree.patch
new file mode 100644
index 0000000..8f92562
--- /dev/null
+++ b/patches/0051-arm64-dts-m3ulcb-kf-initial-device-tree.patch
@@ -0,0 +1,60 @@
+From 22b1e62ab747b002770e7df89a78579c1a66bf4d Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:18:52 +0300
+Subject: [PATCH 0051/1795] arm64: dts: m3ulcb-kf: initial device tree
+
+Add the initial device tree for the M3ULCB with Kingfisher extension
+infotainment board.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit eded6a4d16c40879540e1073581e0679e9684bdb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/Makefile | 1 +
+ .../boot/dts/renesas/r8a7796-m3ulcb-kf.dts | 19 +++++++++++++++++++
+ 2 files changed, 20 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
+
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index 3c2332a60f4e..683984a7928e 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
++dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
+ dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb
+ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
+new file mode 100644
+index 000000000000..de2390f009e7
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
+@@ -0,0 +1,19 @@
++/*
++ * Device Tree Source for the M3ULCB Kingfisher board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7796-m3ulcb.dts"
++#include "ulcb-kf.dtsi"
++
++/ {
++ model = "Renesas M3ULCB Kingfisher board based on r8a7796";
++ compatible = "shimafuji,kingfisher", "renesas,m3ulcb",
++ "renesas,r8a7796";
++};
+--
+2.19.0
+
diff --git a/patches/0052-arm64-dts-h3ulcb-kf-ES1.x-SoC-initial-device-tree.patch b/patches/0052-arm64-dts-h3ulcb-kf-ES1.x-SoC-initial-device-tree.patch
new file mode 100644
index 0000000..da25280
--- /dev/null
+++ b/patches/0052-arm64-dts-h3ulcb-kf-ES1.x-SoC-initial-device-tree.patch
@@ -0,0 +1,60 @@
+From 76f3281bc1265429371d990675fb8270d2e19496 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:18:58 +0300
+Subject: [PATCH 0052/1795] arm64: dts: h3ulcb-kf: ES1.x SoC initial device
+ tree
+
+Add the initial device tree for the H3ULCB ES1.x SoC with Kingfisher
+extension infotainment board.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d90e97dfe16610542bb83590a81081a47018ba89)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/Makefile | 1 +
+ .../dts/renesas/r8a7795-es1-h3ulcb-kf.dts | 19 +++++++++++++++++++
+ 2 files changed, 20 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index 683984a7928e..2b48424ddf2d 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -2,6 +2,7 @@
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb
+ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
+ dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+new file mode 100644
+index 000000000000..009cb1cb0dde
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+@@ -0,0 +1,19 @@
++/*
++ * Device Tree Source for the H3ULCB Kingfisher board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb.dts"
++#include "ulcb-kf.dtsi"
++
++/ {
++ model = "Renesas H3ULCB Kingfisher board based on r8a7795 ES1.x";
++ compatible = "shimafuji,kingfisher", "renesas,h3ulcb",
++ "renesas,r8a7795";
++};
+--
+2.19.0
+
diff --git a/patches/0053-arm64-dts-h3ulcb-kf-ES2.0-SoC-initial-device-tree.patch b/patches/0053-arm64-dts-h3ulcb-kf-ES2.0-SoC-initial-device-tree.patch
new file mode 100644
index 0000000..b41c4aa
--- /dev/null
+++ b/patches/0053-arm64-dts-h3ulcb-kf-ES2.0-SoC-initial-device-tree.patch
@@ -0,0 +1,59 @@
+From 7ea5331f53fb20800857a12282253a9ff84b8d20 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:19:06 +0300
+Subject: [PATCH 0053/1795] arm64: dts: h3ulcb-kf: ES2.0+ SoC initial device
+ tree
+
+Add the initial device tree for the H3ULCB ES2.0+ SoC with Kingfisher
+extension infotainment board.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 20913f7e923ca87921f9ef9ee3dea65de0bc6a18)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/Makefile | 1 +
+ .../boot/dts/renesas/r8a7795-h3ulcb-kf.dts | 19 +++++++++++++++++++
+ 2 files changed, 20 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
+
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index 2b48424ddf2d..842f5884d437 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -1,5 +1,6 @@
+ # SPDX-License-Identifier: GPL-2.0
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
+new file mode 100644
+index 000000000000..4403227c0f97
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
+@@ -0,0 +1,19 @@
++/*
++ * Device Tree Source for the H3ULCB Kingfisher board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-h3ulcb.dts"
++#include "ulcb-kf.dtsi"
++
++/ {
++ model = "Renesas H3ULCB Kingfisher board based on r8a7795 ES2.0+";
++ compatible = "shimafuji,kingfisher", "renesas,h3ulcb",
++ "renesas,r8a7795";
++};
+--
+2.19.0
+
diff --git a/patches/0054-arm64-dts-ulcb-kf-enable-SCIF1.patch b/patches/0054-arm64-dts-ulcb-kf-enable-SCIF1.patch
new file mode 100644
index 0000000..59a2a6a
--- /dev/null
+++ b/patches/0054-arm64-dts-ulcb-kf-enable-SCIF1.patch
@@ -0,0 +1,50 @@
+From 13f80e0d6d7b331893c1653df83a385fb1cde5ee Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 6 Oct 2017 05:43:51 +0300
+Subject: [PATCH 0054/1795] arm64: dts: ulcb-kf: enable SCIF1
+
+This supports SCIF1 on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c6c816e22bc89ea4ebfcf04772b4623b573dadc7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 849f8b102c67..885878a4822c 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -12,6 +12,7 @@
+ / {
+ aliases {
+ serial1 = &hscif0;
++ serial2 = &scif1;
+ };
+ };
+
+@@ -28,4 +29,17 @@
+ groups = "hscif0_data", "hscif0_ctrl";
+ function = "hscif0";
+ };
++
++ scif1_pins: scif1 {
++ groups = "scif1_data_b", "scif1_ctrl";
++ function = "scif1";
++ };
++};
++
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0055-arm64-dts-ulcb-kf-enable-CAN0-1.patch b/patches/0055-arm64-dts-ulcb-kf-enable-CAN0-1.patch
new file mode 100644
index 0000000..e0b4e05
--- /dev/null
+++ b/patches/0055-arm64-dts-ulcb-kf-enable-CAN0-1.patch
@@ -0,0 +1,60 @@
+From 7fb9f0541e1da5148cc220198ea6de13c09ce94a Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:19:13 +0300
+Subject: [PATCH 0055/1795] arm64: dts: ulcb-kf: enable CAN0/1
+
+This supports CAN0/1 on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ba915c12fa1f8a8b9c4b875199b489936ddeccac)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 885878a4822c..a2cb7363e5ed 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -16,6 +16,18 @@
+ };
+ };
+
++&can0 {
++ pinctrl-0 = <&can0_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
++&can1 {
++ pinctrl-0 = <&can1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
+ &hscif0 {
+ pinctrl-0 = <&hscif0_pins>;
+ pinctrl-names = "default";
+@@ -25,6 +37,16 @@
+ };
+
+ &pfc {
++ can0_pins: can0 {
++ groups = "can0_data_a";
++ function = "can0";
++ };
++
++ can1_pins: can1 {
++ groups = "can1_data";
++ function = "can1";
++ };
++
+ hscif0_pins: hscif0 {
+ groups = "hscif0_data", "hscif0_ctrl";
+ function = "hscif0";
+--
+2.19.0
+
diff --git a/patches/0056-arm64-dts-ulcb-kf-enable-HSUSB.patch b/patches/0056-arm64-dts-ulcb-kf-enable-HSUSB.patch
new file mode 100644
index 0000000..793398b
--- /dev/null
+++ b/patches/0056-arm64-dts-ulcb-kf-enable-HSUSB.patch
@@ -0,0 +1,35 @@
+From c2cf7cc2de2129d655453cc342b55fdbfcf9f0e3 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 7 Sep 2017 01:36:25 +0300
+Subject: [PATCH 0056/1795] arm64: dts: ulcb-kf: enable HSUSB
+
+This supports HSUSB on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit da9c3629085000730fdbc02fd533efb26fcf6382)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index a2cb7363e5ed..aab51d0b9a50 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -36,6 +36,10 @@
+ status = "okay";
+ };
+
++&hsusb {
++ status = "okay";
++};
++
+ &pfc {
+ can0_pins: can0 {
+ groups = "can0_data_a";
+--
+2.19.0
+
diff --git a/patches/0057-arm64-dts-ulcb-kf-enable-USB2.0-Host-channel-0.patch b/patches/0057-arm64-dts-ulcb-kf-enable-USB2.0-Host-channel-0.patch
new file mode 100644
index 0000000..8a7a2f5
--- /dev/null
+++ b/patches/0057-arm64-dts-ulcb-kf-enable-USB2.0-Host-channel-0.patch
@@ -0,0 +1,46 @@
+From 1f29b975465738c65c32e8c3cac1ed04f34e14f0 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 7 Sep 2017 01:36:32 +0300
+Subject: [PATCH 0057/1795] arm64: dts: ulcb-kf: enable USB2.0 Host channel 0
+
+This supports USB2.0 Host channel 0 on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 36bd8e3e34f2cd0b9a074df22327719d8d34b3a5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index aab51d0b9a50..83284eace174 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -28,6 +28,10 @@
+ status = "okay";
+ };
+
++&ehci0 {
++ status = "okay";
++};
++
+ &hscif0 {
+ pinctrl-0 = <&hscif0_pins>;
+ pinctrl-names = "default";
+@@ -40,6 +44,10 @@
+ status = "okay";
+ };
+
++&ohci0 {
++ status = "okay";
++};
++
+ &pfc {
+ can0_pins: can0 {
+ groups = "can0_data_a";
+--
+2.19.0
+
diff --git a/patches/0058-arm64-dts-ulcb-kf-enable-PCIE0-1.patch b/patches/0058-arm64-dts-ulcb-kf-enable-PCIE0-1.patch
new file mode 100644
index 0000000..2a587f9
--- /dev/null
+++ b/patches/0058-arm64-dts-ulcb-kf-enable-PCIE0-1.patch
@@ -0,0 +1,43 @@
+From b2c2d51c4efb8cf132a559b035b5c7f9cb5efaf0 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 6 Oct 2017 05:43:59 +0300
+Subject: [PATCH 0058/1795] arm64: dts: ulcb-kf: enable PCIE0/1
+
+This supports PCIE0/1 on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e0304a365bf07b4a0bb2d56ece5b52f3347d5a01)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 83284eace174..ae970da51fa1 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -48,6 +48,18 @@
+ status = "okay";
+ };
+
++&pcie_bus_clk {
++ clock-frequency = <100000000>;
++};
++
++&pciec0 {
++ status = "okay";
++};
++
++&pciec1 {
++ status = "okay";
++};
++
+ &pfc {
+ can0_pins: can0 {
+ groups = "can0_data_a";
+--
+2.19.0
+
diff --git a/patches/0059-arm64-dts-ulcb-kf-enable-USB3.0-Host.patch b/patches/0059-arm64-dts-ulcb-kf-enable-USB3.0-Host.patch
new file mode 100644
index 0000000..2f65a3d
--- /dev/null
+++ b/patches/0059-arm64-dts-ulcb-kf-enable-USB3.0-Host.patch
@@ -0,0 +1,32 @@
+From fdf5ddd69b24c33c8854b0405c00e82772f2923c Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 7 Sep 2017 01:36:48 +0300
+Subject: [PATCH 0059/1795] arm64: dts: ulcb-kf: enable USB3.0 Host
+
+This supports USB3.0 Host on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit af75811605f6358dd6c6f34043d3826a31a57e60)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index ae970da51fa1..27657fec9696 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -89,3 +89,7 @@
+
+ status = "okay";
+ };
++
++&xhci0 {
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0060-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C2.patch b/patches/0060-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C2.patch
new file mode 100644
index 0000000..4fdfe33
--- /dev/null
+++ b/patches/0060-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C2.patch
@@ -0,0 +1,53 @@
+From 7d1149d6815e3339bc16e17263c83966b4ccbba3 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 6 Oct 2017 05:44:05 +0300
+Subject: [PATCH 0060/1795] arm64: dts: ulcb-kf: enable TCA9539 on I2C2
+
+This supports TCA9539 gpio expanders on I2C2 bus on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1189d1d4e3f97775e4e51571aa1dfbc33e0638bb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 27657fec9696..80444aee7bcb 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -44,6 +44,28 @@
+ status = "okay";
+ };
+
++&i2c2 {
++ gpio_exp_74: gpio@74 {
++ compatible = "ti,tca9539";
++ reg = <0x74>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio6>;
++ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++ };
++
++ gpio_exp_75: gpio@75 {
++ compatible = "ti,tca9539";
++ reg = <0x75>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio6>;
++ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++ };
++};
++
+ &ohci0 {
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0061-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C4.patch b/patches/0061-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C4.patch
new file mode 100644
index 0000000..6966e9a
--- /dev/null
+++ b/patches/0061-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C4.patch
@@ -0,0 +1,53 @@
+From 88f91e49fe90d699a8e94bde2a6d2cc6c4cd6791 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 6 Oct 2017 05:44:11 +0300
+Subject: [PATCH 0061/1795] arm64: dts: ulcb-kf: enable TCA9539 on I2C4
+
+This supports TCA9539 gpio expanders on I2C4 bus on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0f9c47b2446beb4ea90ba90870cbe72b6419d03b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 80444aee7bcb..a6c2343e23cb 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -66,6 +66,28 @@
+ };
+ };
+
++&i2c4 {
++ gpio_exp_76: gpio@76 {
++ compatible = "ti,tca9539";
++ reg = <0x76>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio7>;
++ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++ };
++
++ gpio_exp_77: gpio@77 {
++ compatible = "ti,tca9539";
++ reg = <0x77>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio5>;
++ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
++ };
++};
++
+ &ohci0 {
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0062-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C2.patch b/patches/0062-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C2.patch
new file mode 100644
index 0000000..886ef42
--- /dev/null
+++ b/patches/0062-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C2.patch
@@ -0,0 +1,39 @@
+From 35950f31f2bb725bcb2ada173891d0b2f8c0c835 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:19:34 +0300
+Subject: [PATCH 0062/1795] arm64: dts: ulcb-kf: enable PCA9548 on I2C2
+
+This supports PCA9548 I2C switch on I2C2 bus on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c6f9cbe364322ac168d8299f49cb54c6143f8e07)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index a6c2343e23cb..3dfd3381e8f7 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -64,6 +64,14 @@
+ interrupt-parent = <&gpio6>;
+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+ };
++
++ i2cswitch2: i2c-switch@71 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x71>;
++ reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
++ };
+ };
+
+ &i2c4 {
+--
+2.19.0
+
diff --git a/patches/0063-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C4.patch b/patches/0063-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C4.patch
new file mode 100644
index 0000000..5a00288
--- /dev/null
+++ b/patches/0063-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C4.patch
@@ -0,0 +1,39 @@
+From c72a304e6637dc1552bf8b1ae8ab91beef6b94a4 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:19:48 +0300
+Subject: [PATCH 0063/1795] arm64: dts: ulcb-kf: enable PCA9548 on I2C4
+
+This supports PCA9548 I2C switch on I2C4 bus on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6d5fcdd39f413d0dae466c9f18e6ecd2b6b68362)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 3dfd3381e8f7..1923e5b8ee86 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -94,6 +94,14 @@
+ interrupt-parent = <&gpio5>;
+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
+ };
++
++ i2cswitch4: i2c-switch@71 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x71>;
++ reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
++ };
+ };
+
+ &ohci0 {
+--
+2.19.0
+
diff --git a/patches/0064-arm64-dts-ulcb-kf-hog-USB3-hub-control-gpios.patch b/patches/0064-arm64-dts-ulcb-kf-hog-USB3-hub-control-gpios.patch
new file mode 100644
index 0000000..c380922
--- /dev/null
+++ b/patches/0064-arm64-dts-ulcb-kf-hog-USB3-hub-control-gpios.patch
@@ -0,0 +1,46 @@
+From 943dae87c27462ff29b9a4edb91e2ca6e75e3818 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 7 Sep 2017 01:37:24 +0300
+Subject: [PATCH 0064/1795] arm64: dts: ulcb-kf: hog USB3 hub control gpios
+
+This adds gpio hogs for USB3 hub on ULCB Kingfisher board to power up and
+remove from reset the hub
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4339306acef642af151ae9c7ec4c39d0cae28497)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 1923e5b8ee86..657ad1041965 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -53,6 +53,20 @@
+ interrupt-controller;
+ interrupt-parent = <&gpio6>;
+ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++
++ hub_pwen {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB pwen";
++ };
++
++ hub_rst {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB rst";
++ };
+ };
+
+ gpio_exp_75: gpio@75 {
+--
+2.19.0
+
diff --git a/patches/0065-arm64-dts-r8a7796-Add-INTC-EX-device-node.patch b/patches/0065-arm64-dts-r8a7796-Add-INTC-EX-device-node.patch
new file mode 100644
index 0000000..93dee0e
--- /dev/null
+++ b/patches/0065-arm64-dts-r8a7796-Add-INTC-EX-device-node.patch
@@ -0,0 +1,47 @@
+From 37604f2917f385f273c0d0f5441882f25094220a Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 6 Oct 2017 14:05:51 +0200
+Subject: [PATCH 0065/1795] arm64: dts: r8a7796: Add INTC-EX device node
+
+Add a device node for the Interrupt Controller for External Devices
+(INTC-EX) on R-Car M3-W, which serves external IRQ pins IRQ[0-5].
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fdceea3c2ade76d929725fdd6211feb52bdf705a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+index 57ac5ca6ed98..8085fd91811e 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -383,6 +383,22 @@
+ #power-domain-cells = <1>;
+ };
+
++ intc_ex: interrupt-controller@e61c0000 {
++ compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ reg = <0 0xe61c0000 0 0x200>;
++ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 407>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ resets = <&cpg 407>;
++ };
++
+ i2c_dvfs: i2c@e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+--
+2.19.0
+
diff --git a/patches/0066-arm64-dts-r8a77970-Add-INTC-EX-device-node.patch b/patches/0066-arm64-dts-r8a77970-Add-INTC-EX-device-node.patch
new file mode 100644
index 0000000..acda756
--- /dev/null
+++ b/patches/0066-arm64-dts-r8a77970-Add-INTC-EX-device-node.patch
@@ -0,0 +1,47 @@
+From 40ddd54ce44b8b5b65b53c5315913d2e762ef6f9 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 6 Oct 2017 14:05:52 +0200
+Subject: [PATCH 0066/1795] arm64: dts: r8a77970: Add INTC-EX device node
+
+Add a device node for the Interrupt Controller for External Devices
+(INTC-EX) on R-Car V3M, which serves external IRQ pins IRQ[0-5].
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c6a7fd98966015df742fe15d5a01827262f4fc41)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+index aa9032d34189..97e6981938e7 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -124,6 +124,22 @@
+ #power-domain-cells = <1>;
+ };
+
++ intc_ex: interrupt-controller@e61c0000 {
++ compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ reg = <0 0xe61c0000 0 0x200>;
++ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 407>;
++ power-domains = <&sysc 32>;
++ resets = <&cpg 407>;
++ };
++
+ prr: chipid@fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+--
+2.19.0
+
diff --git a/patches/0067-arm64-dts-r8a77995-Add-INTC-EX-device-node.patch b/patches/0067-arm64-dts-r8a77995-Add-INTC-EX-device-node.patch
new file mode 100644
index 0000000..c59eba4
--- /dev/null
+++ b/patches/0067-arm64-dts-r8a77995-Add-INTC-EX-device-node.patch
@@ -0,0 +1,47 @@
+From ea07acb66de85979af5119f3f6dd407ec3f319ad Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 6 Oct 2017 14:05:53 +0200
+Subject: [PATCH 0067/1795] arm64: dts: r8a77995: Add INTC-EX device node
+
+Add a device node for the Interrupt Controller for External Devices
+(INTC-EX) on R-Car D3, which serves external IRQ pins IRQ[0-5].
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit eb5a5078358771ae24b82acd772dfd5ae52fcd34)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index bcc4d132f827..788e3afae6e3 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -139,6 +139,22 @@
+ #power-domain-cells = <1>;
+ };
+
++ intc_ex: interrupt-controller@e61c0000 {
++ compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ reg = <0 0xe61c0000 0 0x200>;
++ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 407>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 407>;
++ };
++
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+--
+2.19.0
+
diff --git a/patches/0068-arm64-dts-renesas-eagle-add-EtherAVB-support.patch b/patches/0068-arm64-dts-renesas-eagle-add-EtherAVB-support.patch
new file mode 100644
index 0000000..03e6de2
--- /dev/null
+++ b/patches/0068-arm64-dts-renesas-eagle-add-EtherAVB-support.patch
@@ -0,0 +1,56 @@
+From 40068b443ee16910608564ddc1d7c2b493caafd0 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:26 +0300
+Subject: [PATCH 0068/1795] arm64: dts: renesas: eagle: add EtherAVB support
+
+Define the Eagle board dependent part of the EtherAVB device node.
+Enable DHCP and NFS root for the kernel booting.
+
+Based on the original (and large) patch by Vladimir Barinov.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 38525608952ae5793a58c1ef4e447f45593d2ee1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 14 +++++++++++++-
+ 1 file changed, 13 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+index a4d1d4f24675..a711e77cc6a5 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+@@ -18,10 +18,11 @@
+
+ aliases {
+ serial0 = &scif0;
++ ethernet0 = &avb;
+ };
+
+ chosen {
+- bootargs = "ignore_loglevel";
++ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ stdout-path = "serial0:115200n8";
+ };
+
+@@ -43,3 +44,14 @@
+ &scif0 {
+ status = "okay";
+ };
++
++&avb {
++ renesas,no-ether-link;
++ phy-handle = <&phy0>;
++ status = "okay";
++
++ phy0: ethernet-phy@0 {
++ rxc-skew-ps = <1500>;
++ reg = <0>;
++ };
++};
+--
+2.19.0
+
diff --git a/patches/0069-arm64-defconfig-Enable-hisilicon-hibmc-drm-driver.patch b/patches/0069-arm64-defconfig-Enable-hisilicon-hibmc-drm-driver.patch
new file mode 100644
index 0000000..0120f1a
--- /dev/null
+++ b/patches/0069-arm64-defconfig-Enable-hisilicon-hibmc-drm-driver.patch
@@ -0,0 +1,31 @@
+From 8d3e5b30329ced149851334092e404dac96db21b Mon Sep 17 00:00:00 2001
+From: Kefeng Wang <wangkefeng.wang@huawei.com>
+Date: Tue, 22 Aug 2017 21:20:56 +0800
+Subject: [PATCH 0069/1795] arm64: defconfig: Enable hisilicon hibmc drm driver
+
+Enable DRM_HISI_HIBMC as module for Hisilicon D03/D05 board.
+
+Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
+Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
+(cherry picked from commit f9a3da591d4bf5ad28eb9ffabc823dee9e4254f4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index dfb60597d412..58fbf74e858b 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -393,6 +393,7 @@ CONFIG_DRM_TEGRA=m
+ CONFIG_DRM_PANEL_SIMPLE=m
+ CONFIG_DRM_I2C_ADV7511=m
+ CONFIG_DRM_VC4=m
++CONFIG_DRM_HISI_HIBMC=m
+ CONFIG_DRM_HISI_KIRIN=m
+ CONFIG_DRM_MESON=m
+ CONFIG_FB=y
+--
+2.19.0
+
diff --git a/patches/0070-arm64-defconfig-Enable-QCOM_IOMMU.patch b/patches/0070-arm64-defconfig-Enable-QCOM_IOMMU.patch
new file mode 100644
index 0000000..8b54889
--- /dev/null
+++ b/patches/0070-arm64-defconfig-Enable-QCOM_IOMMU.patch
@@ -0,0 +1,34 @@
+From dd02d2abb6eadcf3748481883cb4b9a0727434f5 Mon Sep 17 00:00:00 2001
+From: Nicolas Dechesne <nicolas.dechesne@linaro.org>
+Date: Wed, 11 Oct 2017 17:19:25 +0200
+Subject: [PATCH 0070/1795] arm64: defconfig: Enable QCOM_IOMMU
+
+Enable QCOM IOMMU driver for 'B' family devices, such as APQ8016 found on the
+Dragonboard 410c. With this change, graphics console and GPU are working
+fine (using mesa/freedreno for GPU driver).
+
+Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
+Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Signed-off-by: Andy Gross <andy.gross@linaro.org>
+(cherry picked from commit de11c4de1fbbe1f48ac2ec9b38f1a4618d53d35f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 58fbf74e858b..a9e710db5098 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -518,6 +518,7 @@ CONFIG_HI6220_MBOX=y
+ CONFIG_ROCKCHIP_IOMMU=y
+ CONFIG_ARM_SMMU=y
+ CONFIG_ARM_SMMU_V3=y
++CONFIG_QCOM_IOMMU=y
+ CONFIG_RPMSG_QCOM_SMD=y
+ CONFIG_RASPBERRYPI_POWER=y
+ CONFIG_QCOM_SMEM=y
+--
+2.19.0
+
diff --git a/patches/0071-arm64-defconfig-enable-RTC-on-Armada-7K-8K-SoCs.patch b/patches/0071-arm64-defconfig-enable-RTC-on-Armada-7K-8K-SoCs.patch
new file mode 100644
index 0000000..2991451
--- /dev/null
+++ b/patches/0071-arm64-defconfig-enable-RTC-on-Armada-7K-8K-SoCs.patch
@@ -0,0 +1,31 @@
+From 75db402ebc6638fff402b16d272e2f39dce85ec4 Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Date: Mon, 2 Oct 2017 17:44:16 +0200
+Subject: [PATCH 0071/1795] arm64: defconfig: enable RTC on Armada 7K/8K SoCs
+
+The Armada 38x RTC driver supports also the RTC controller found on the
+Armada 7K/8K SoCs, so enable it.
+
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+(cherry picked from commit f5bdfbe66ae7c64ef3bd64c742e34111eb0e3164)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index a9e710db5098..e6d995696079 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -478,6 +478,7 @@ CONFIG_RTC_DRV_EFI=y
+ CONFIG_RTC_DRV_S3C=y
+ CONFIG_RTC_DRV_PL031=y
+ CONFIG_RTC_DRV_SUN6I=y
++CONFIG_RTC_DRV_ARMADA38X=y
+ CONFIG_RTC_DRV_TEGRA=y
+ CONFIG_RTC_DRV_XGENE=y
+ CONFIG_DMADEVICES=y
+--
+2.19.0
+
diff --git a/patches/0072-arm64-renesas-salvator-common-fixup-audio_clkout.patch b/patches/0072-arm64-renesas-salvator-common-fixup-audio_clkout.patch
new file mode 100644
index 0000000..233c645
--- /dev/null
+++ b/patches/0072-arm64-renesas-salvator-common-fixup-audio_clkout.patch
@@ -0,0 +1,40 @@
+From a3e92f12336203147c98612248aed2801371afcf Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 13 Oct 2017 05:56:58 +0000
+Subject: [PATCH 0072/1795] arm64: renesas: salvator-common: fixup audio_clkout
+
+"audio_clkout" is dummy clock of <&rcar_sound 0> to avoid clock loop
+which invites probe conflict. Thus <&rcar_sound 0> and "audio_clkout"
+should be same value.
+
+On commit 5e2feac33095 ("arm64: renesas: salvator-common: sound
+clock-frequency needs descending order") exchanged <&rcar_sound 0>,
+but it didn't modify "audio_clkout".
+This patch fixup it.
+
+Fixes: 5e2feac33095 ("arm64: renesas: salvator-common: sound clock-frequency needs descending order")
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 64097f4c158199f520c483af0380cb58b23dff0a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+index 3525b6dfff68..e297f86cabf9 100644
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+@@ -52,7 +52,7 @@
+ */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+- clock-frequency = <11289600>;
++ clock-frequency = <12288000>;
+ };
+
+ backlight: backlight {
+--
+2.19.0
+
diff --git a/patches/0073-arm64-renesas-ulcb-fixup-audio_clkout.patch b/patches/0073-arm64-renesas-ulcb-fixup-audio_clkout.patch
new file mode 100644
index 0000000..33a1b60
--- /dev/null
+++ b/patches/0073-arm64-renesas-ulcb-fixup-audio_clkout.patch
@@ -0,0 +1,40 @@
+From 456d1845075570be5129cdeb41dd972ea4a61b4e Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 13 Oct 2017 05:57:18 +0000
+Subject: [PATCH 0073/1795] arm64: renesas: ulcb: fixup audio_clkout
+
+"audio_clkout" is dummy clock of <&rcar_sound 0> to avoid clock loop
+which invites probe conflict. Thus <&rcar_sound 0> and "audio_clkout"
+should be same value.
+
+On commit 2752660a37ae ("arm64: dts: renesas: ulcb: sound
+clock-frequency needs descending order") exchanged <&rcar_sound 0>,
+but it didn't modify "audio_clkout".
+This patch fixup it.
+
+Fixes: 2752660a37ae ("arm64: dts: renesas: ulcb: sound clock-frequency needs descending order")
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 822cecb1bef2bf41663d6c4e7786d9e159f72674)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+index d32d876156b1..73439cf48659 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+@@ -31,7 +31,7 @@
+ */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+- clock-frequency = <11289600>;
++ clock-frequency = <12288000>;
+ };
+
+ hdmi0-out {
+--
+2.19.0
+
diff --git a/patches/0074-arm64-dts-r8a7795-Use-R-Car-GPIO-Gen3-fallback-compa.patch b/patches/0074-arm64-dts-r8a7795-Use-R-Car-GPIO-Gen3-fallback-compa.patch
new file mode 100644
index 0000000..71dfb9d
--- /dev/null
+++ b/patches/0074-arm64-dts-r8a7795-Use-R-Car-GPIO-Gen3-fallback-compa.patch
@@ -0,0 +1,101 @@
+From 8ec27b3d3d5de5c7bd2bfc900cde930e5f5263f6 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:10 +0200
+Subject: [PATCH 0074/1795] arm64: dts: r8a7795: Use R-Car GPIO Gen3 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen3 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in the DT of the r8a7795 SoC.
+
+This should have no run-time effect as the driver matches against
+the per-SoC compat string before considering the fallback compat string.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit d6d7037cb2f8d33cae5384eeaea9b5248fb383ae)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+index d5cfd1a1c539..15ef292a8d9f 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+@@ -220,7 +220,7 @@
+
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -235,7 +235,7 @@
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -250,7 +250,7 @@
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -265,7 +265,7 @@
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -280,7 +280,7 @@
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -295,7 +295,7 @@
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -310,7 +310,7 @@
+
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -325,7 +325,7 @@
+
+ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0075-arm64-dts-r8a7796-Use-R-Car-GPIO-Gen3-fallback-compa.patch b/patches/0075-arm64-dts-r8a7796-Use-R-Car-GPIO-Gen3-fallback-compa.patch
new file mode 100644
index 0000000..cf3529c
--- /dev/null
+++ b/patches/0075-arm64-dts-r8a7796-Use-R-Car-GPIO-Gen3-fallback-compa.patch
@@ -0,0 +1,101 @@
+From 3d568aee4b07a687a153cfb40953b1219efa292c Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:11 +0200
+Subject: [PATCH 0075/1795] arm64: dts: r8a7796: Use R-Car GPIO Gen3 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen3 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in the DT of the r8a7796 SoC.
+
+This should have no run-time effect as the driver matches against
+the per-SoC compat string before considering the fallback compat string.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit c8ee880415894e75b5289618dc2b8108bdd96a23)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+index 8085fd91811e..f2b2e40c655e 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -214,7 +214,7 @@
+
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -229,7 +229,7 @@
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -244,7 +244,7 @@
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -259,7 +259,7 @@
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -274,7 +274,7 @@
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -289,7 +289,7 @@
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -304,7 +304,7 @@
+
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -319,7 +319,7 @@
+
+ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0076-arm64-defconfig-re-enable-Qualcomm-DB410c-USB.patch b/patches/0076-arm64-defconfig-re-enable-Qualcomm-DB410c-USB.patch
new file mode 100644
index 0000000..3894af9
--- /dev/null
+++ b/patches/0076-arm64-defconfig-re-enable-Qualcomm-DB410c-USB.patch
@@ -0,0 +1,54 @@
+From db879c856e35944f67183628195d1d09376b1a8f Mon Sep 17 00:00:00 2001
+From: Alex Elder <elder@linaro.org>
+Date: Mon, 16 Oct 2017 09:22:57 -0500
+Subject: [PATCH 0076/1795] arm64: defconfig: re-enable Qualcomm DB410c USB
+
+Stephen Boyd reworked some Qualcomm USB code earlier this year.
+The result requires a few different config options to be enabled
+in order for the USB on the DragonBoard 410c to continue working,
+but these were never added to arm64 "defconfig". As a result, USB
+on that board stopped working during the v4.13-rc1 merge window.
+
+Re-enable this functionality by setting the needed config options
+in the arm64 "defconfig" file.
+
+Signed-off-by: Alex Elder <elder@linaro.org>
+Signed-off-by: Andy Gross <andy.gross@linaro.org>
+(cherry picked from commit b8eb03a7cf1b767c339771201f9cb974cea1145a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index e6d995696079..2113a685de76 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -431,6 +431,7 @@ CONFIG_USB_DWC2=y
+ CONFIG_USB_CHIPIDEA=y
+ CONFIG_USB_CHIPIDEA_UDC=y
+ CONFIG_USB_CHIPIDEA_HOST=y
++CONFIG_USB_CHIPIDEA_ULPI=y
+ CONFIG_USB_ISP1760=y
+ CONFIG_USB_HSIC_USB3503=y
+ CONFIG_NOP_USB_XCEIV=y
+@@ -439,6 +440,7 @@ CONFIG_USB_QCOM_8X16_PHY=y
+ CONFIG_USB_ULPI=y
+ CONFIG_USB_GADGET=y
+ CONFIG_USB_RENESAS_USBHS_UDC=m
++CONFIG_USB_ULPI_BUS=y
+ CONFIG_MMC=y
+ CONFIG_MMC_BLOCK_MINORS=32
+ CONFIG_MMC_ARMMMCI=y
+@@ -543,6 +545,7 @@ CONFIG_PWM_SAMSUNG=y
+ CONFIG_PWM_TEGRA=m
+ CONFIG_PHY_RCAR_GEN3_USB2=y
+ CONFIG_PHY_HI6220_USB=y
++CONFIG_PHY_QCOM_USB_HS=y
+ CONFIG_PHY_SUN4I_USB=y
+ CONFIG_PHY_MVEBU_CP110_COMPHY=y
+ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+--
+2.19.0
+
diff --git a/patches/0077-arm64-defconfig-Enable-Tegra-PCI-controller.patch b/patches/0077-arm64-defconfig-Enable-Tegra-PCI-controller.patch
new file mode 100644
index 0000000..ddf0a49
--- /dev/null
+++ b/patches/0077-arm64-defconfig-Enable-Tegra-PCI-controller.patch
@@ -0,0 +1,32 @@
+From af04d31bbab2f596065c756385a7cdd95ab625d7 Mon Sep 17 00:00:00 2001
+From: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
+Date: Wed, 18 Oct 2017 17:46:20 +0300
+Subject: [PATCH 0077/1795] arm64: defconfig: Enable Tegra PCI controller
+
+The driver has supported the 64-bit Tegra210 for a while now, so enable
+it in the defconfig.
+
+Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+(cherry picked from commit a9e6753c1c92ae7d2c0c99b420c5c7dd5ebfc37d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 2113a685de76..6e8eced66e43 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -74,6 +74,7 @@ CONFIG_PCIE_QCOM=y
+ CONFIG_PCIE_KIRIN=y
+ CONFIG_PCIE_ARMADA_8K=y
+ CONFIG_PCI_AARDVARK=y
++CONFIG_PCI_TEGRA=y
+ CONFIG_PCIE_RCAR=y
+ CONFIG_PCIE_ROCKCHIP=m
+ CONFIG_PCI_HOST_GENERIC=y
+--
+2.19.0
+
diff --git a/patches/0078-arm64-Add-ThunderX-drivers-to-defconfig.patch b/patches/0078-arm64-Add-ThunderX-drivers-to-defconfig.patch
new file mode 100644
index 0000000..566586e
--- /dev/null
+++ b/patches/0078-arm64-Add-ThunderX-drivers-to-defconfig.patch
@@ -0,0 +1,41 @@
+From 99459a8949c2f21b6ea76226cd0733c03cf8e5d0 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Wed, 11 Oct 2017 16:15:41 +0100
+Subject: [PATCH 0078/1795] arm64: Add ThunderX drivers to defconfig
+
+ThunderX needs its PCI host drivers to do anything useful, and
+it's probably helpful to have networking by default too.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+(cherry picked from commit 0454c9212d25bcf963810db9e4cb6311d666c0d5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 6e8eced66e43..e5ce0ff06023 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -79,6 +79,8 @@ CONFIG_PCIE_RCAR=y
+ CONFIG_PCIE_ROCKCHIP=m
+ CONFIG_PCI_HOST_GENERIC=y
+ CONFIG_PCI_XGENE=y
++CONFIG_PCI_HOST_THUNDER_PEM=y
++CONFIG_PCI_HOST_THUNDER_ECAM=y
+ CONFIG_ARM64_VA_BITS_48=y
+ CONFIG_SCHED_MC=y
+ CONFIG_NUMA=y
+@@ -192,6 +194,7 @@ CONFIG_VIRTIO_NET=y
+ CONFIG_AMD_XGBE=y
+ CONFIG_NET_XGENE=y
+ CONFIG_MACB=y
++CONFIG_THUNDER_NIC_PF=y
+ CONFIG_HNS_DSAF=y
+ CONFIG_HNS_ENET=y
+ CONFIG_E1000E=y
+--
+2.19.0
+
diff --git a/patches/0079-arm64-dts-renesas-salvator-common-add-dr_mode-proper.patch b/patches/0079-arm64-dts-renesas-salvator-common-add-dr_mode-proper.patch
new file mode 100644
index 0000000..bd88850
--- /dev/null
+++ b/patches/0079-arm64-dts-renesas-salvator-common-add-dr_mode-proper.patch
@@ -0,0 +1,50 @@
+From 6b0d58d81695bc11e318accdceeee6bb37ac4f8d Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 12 Oct 2017 18:23:30 +0900
+Subject: [PATCH 0079/1795] arm64: dts: renesas: salvator-common: add dr_mode
+ property for USB2.0 channel 0
+
+Since Salvator-X[S] have a USB2.0 dual-role channel (CN9), this patch
+adds dr_mode property for USB2.0 channel 0 (EHCI/OHCI and HS-USB)
+as "otg".
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e9ce35386b215d3f5d0fbab3cc24b69b8d57d7e6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+index e297f86cabf9..eab44b9bdaa7 100644
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+@@ -275,6 +275,7 @@
+ };
+
+ &ehci0 {
++ dr_mode = "otg";
+ status = "okay";
+ };
+
+@@ -287,6 +288,7 @@
+ };
+
+ &hsusb {
++ dr_mode = "otg";
+ status = "okay";
+ };
+
+@@ -355,6 +357,7 @@
+ };
+
+ &ohci0 {
++ dr_mode = "otg";
+ status = "okay";
+ };
+
+--
+2.19.0
+
diff --git a/patches/0080-arm64-defconfig-enable-CONFIG_GPIO_UNIPHIER.patch b/patches/0080-arm64-defconfig-enable-CONFIG_GPIO_UNIPHIER.patch
new file mode 100644
index 0000000..02a77c7
--- /dev/null
+++ b/patches/0080-arm64-defconfig-enable-CONFIG_GPIO_UNIPHIER.patch
@@ -0,0 +1,31 @@
+From f6758393aa7276482f320b49e3d99d6eef5479d1 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Mon, 30 Oct 2017 19:00:52 +0900
+Subject: [PATCH 0080/1795] arm64: defconfig: enable CONFIG_GPIO_UNIPHIER
+
+Enable the GPIO controller driver used for UniPhier SoC family.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+(cherry picked from commit d0e470e0db7ead4e5dc43057b8ede78451d0dd6b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index e5ce0ff06023..cad81b1723d8 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -305,6 +305,7 @@ CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
+ CONFIG_GPIO_DWAPB=y
+ CONFIG_GPIO_PL061=y
+ CONFIG_GPIO_RCAR=y
++CONFIG_GPIO_UNIPHIER=y
+ CONFIG_GPIO_XGENE=y
+ CONFIG_GPIO_XGENE_SB=y
+ CONFIG_GPIO_PCA953X=y
+--
+2.19.0
+
diff --git a/patches/0081-kbuild-clean-up-.dtb-and-.dtb.S-patterns-from-top-le.patch b/patches/0081-kbuild-clean-up-.dtb-and-.dtb.S-patterns-from-top-le.patch
new file mode 100644
index 0000000..591731b
--- /dev/null
+++ b/patches/0081-kbuild-clean-up-.dtb-and-.dtb.S-patterns-from-top-le.patch
@@ -0,0 +1,583 @@
+From 08989bcf1c6e94a1b3cf0212839b26a8a34f8099 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Thu, 2 Nov 2017 11:51:25 +0900
+Subject: [PATCH 0081/1795] kbuild: clean up *.dtb and *.dtb.S patterns from
+ top-level Makefile
+
+We need to add "clean-files" in Makfiles to clean up DT blobs, but we
+often miss to do so.
+
+Since there are no source files that end with .dtb or .dtb.S, so we
+can clean-up those files from the top-level Makefile.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit 74ce1896c6c65b2f8cccbf59162d542988835835)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/kbuild/makefiles.txt | 1 -
+ Makefile | 2 +-
+ arch/arc/boot/dts/Makefile | 1 -
+ arch/arm/boot/dts/Makefile | 1 -
+ arch/arm64/boot/dts/actions/Makefile | 1 -
+ arch/arm64/boot/dts/al/Makefile | 1 -
+ arch/arm64/boot/dts/allwinner/Makefile | 1 -
+ arch/arm64/boot/dts/altera/Makefile | 1 -
+ arch/arm64/boot/dts/amd/Makefile | 1 -
+ arch/arm64/boot/dts/amlogic/Makefile | 1 -
+ arch/arm64/boot/dts/apm/Makefile | 1 -
+ arch/arm64/boot/dts/arm/Makefile | 1 -
+ arch/arm64/boot/dts/broadcom/Makefile | 1 -
+ arch/arm64/boot/dts/broadcom/northstar2/Makefile | 1 -
+ arch/arm64/boot/dts/broadcom/stingray/Makefile | 1 -
+ arch/arm64/boot/dts/cavium/Makefile | 1 -
+ arch/arm64/boot/dts/exynos/Makefile | 1 -
+ arch/arm64/boot/dts/freescale/Makefile | 1 -
+ arch/arm64/boot/dts/hisilicon/Makefile | 1 -
+ arch/arm64/boot/dts/lg/Makefile | 1 -
+ arch/arm64/boot/dts/marvell/Makefile | 1 -
+ arch/arm64/boot/dts/mediatek/Makefile | 1 -
+ arch/arm64/boot/dts/nvidia/Makefile | 1 -
+ arch/arm64/boot/dts/qcom/Makefile | 1 -
+ arch/arm64/boot/dts/realtek/Makefile | 1 -
+ arch/arm64/boot/dts/renesas/Makefile | 1 -
+ arch/arm64/boot/dts/rockchip/Makefile | 1 -
+ arch/arm64/boot/dts/socionext/Makefile | 1 -
+ arch/arm64/boot/dts/sprd/Makefile | 1 -
+ arch/arm64/boot/dts/xilinx/Makefile | 1 -
+ arch/arm64/boot/dts/zte/Makefile | 1 -
+ arch/c6x/boot/dts/Makefile | 2 --
+ arch/cris/boot/dts/Makefile | 2 --
+ arch/h8300/boot/dts/Makefile | 1 -
+ arch/metag/boot/dts/Makefile | 1 -
+ arch/microblaze/boot/Makefile | 2 +-
+ arch/mips/boot/dts/Makefile | 1 -
+ arch/mips/boot/dts/brcm/Makefile | 1 -
+ arch/mips/boot/dts/cavium-octeon/Makefile | 1 -
+ arch/mips/boot/dts/img/Makefile | 1 -
+ arch/mips/boot/dts/ingenic/Makefile | 1 -
+ arch/mips/boot/dts/lantiq/Makefile | 1 -
+ arch/mips/boot/dts/mti/Makefile | 1 -
+ arch/mips/boot/dts/netlogic/Makefile | 1 -
+ arch/mips/boot/dts/ni/Makefile | 1 -
+ arch/mips/boot/dts/pic32/Makefile | 1 -
+ arch/mips/boot/dts/qca/Makefile | 1 -
+ arch/mips/boot/dts/ralink/Makefile | 1 -
+ arch/mips/boot/dts/xilfpga/Makefile | 1 -
+ arch/nios2/boot/Makefile | 2 --
+ arch/openrisc/boot/dts/Makefile | 2 --
+ arch/powerpc/boot/Makefile | 2 +-
+ arch/sh/boot/dts/Makefile | 2 --
+ arch/xtensa/boot/dts/Makefile | 2 --
+ 54 files changed, 3 insertions(+), 60 deletions(-)
+
+diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt
+index f6f80380dff2..71e9feefb63c 100644
+--- a/Documentation/kbuild/makefiles.txt
++++ b/Documentation/kbuild/makefiles.txt
+@@ -1158,7 +1158,6 @@ When kbuild executes, the following steps are followed (roughly):
+
+ Example:
+ targets += $(dtb-y)
+- clean-files += *.dtb
+ DTC_FLAGS ?= -p 1024
+
+ --- 6.8 Custom kbuild commands
+diff --git a/Makefile b/Makefile
+index aa458afa7fa2..f5caf45de28b 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1573,7 +1573,7 @@ clean: $(clean-dirs)
+ $(call cmd,rmfiles)
+ @find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \
+ \( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \
+- -o -name '*.ko.*' \
++ -o -name '*.ko.*' -o -name '*.dtb' -o -name '*.dtb.S' \
+ -o -name '*.dwo' \
+ -o -name '*.su' \
+ -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
+diff --git a/arch/arc/boot/dts/Makefile b/arch/arc/boot/dts/Makefile
+index 83c9e076ef63..f3c1fe958367 100644
+--- a/arch/arc/boot/dts/Makefile
++++ b/arch/arc/boot/dts/Makefile
+@@ -15,4 +15,3 @@ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index eff87a344566..300f441698fb 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -1075,4 +1075,3 @@ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always := $(dtb-y)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/actions/Makefile b/arch/arm64/boot/dts/actions/Makefile
+index 62922d688ce3..89bb1b534492 100644
+--- a/arch/arm64/boot/dts/actions/Makefile
++++ b/arch/arm64/boot/dts/actions/Makefile
+@@ -2,4 +2,3 @@ dtb-$(CONFIG_ARCH_ACTIONS) += s900-bubblegum-96.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/al/Makefile b/arch/arm64/boot/dts/al/Makefile
+index 8a6cde4f9b23..8606a57e567f 100644
+--- a/arch/arm64/boot/dts/al/Makefile
++++ b/arch/arm64/boot/dts/al/Makefile
+@@ -2,4 +2,3 @@ dtb-$(CONFIG_ARCH_ALPINE) += alpine-v2-evp.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
+index ff35e184e422..5859798a766d 100644
+--- a/arch/arm64/boot/dts/allwinner/Makefile
++++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -12,4 +12,3 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/altera/Makefile b/arch/arm64/boot/dts/altera/Makefile
+index d7a641698d77..7511b51d9b4a 100644
+--- a/arch/arm64/boot/dts/altera/Makefile
++++ b/arch/arm64/boot/dts/altera/Makefile
+@@ -2,4 +2,3 @@ dtb-$(CONFIG_ARCH_STRATIX10) += socfpga_stratix10_socdk.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/amd/Makefile b/arch/arm64/boot/dts/amd/Makefile
+index f9963d63006d..2bd7b0aefce8 100644
+--- a/arch/arm64/boot/dts/amd/Makefile
++++ b/arch/arm64/boot/dts/amd/Makefile
+@@ -5,4 +5,3 @@ dtb-$(CONFIG_ARCH_SEATTLE) += amd-overdrive.dtb \
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
+index 543416b8dff5..ce9244937953 100644
+--- a/arch/arm64/boot/dts/amlogic/Makefile
++++ b/arch/arm64/boot/dts/amlogic/Makefile
+@@ -23,4 +23,3 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/apm/Makefile b/arch/arm64/boot/dts/apm/Makefile
+index a10fbdb34229..ab6f2da36265 100644
+--- a/arch/arm64/boot/dts/apm/Makefile
++++ b/arch/arm64/boot/dts/apm/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_ARCH_XGENE) += apm-merlin.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile
+index 470378addca4..e516bf1fe1a1 100644
+--- a/arch/arm64/boot/dts/arm/Makefile
++++ b/arch/arm64/boot/dts/arm/Makefile
+@@ -6,4 +6,3 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
+index 3df2db7f8878..b3e7e7b447ee 100644
+--- a/arch/arm64/boot/dts/broadcom/Makefile
++++ b/arch/arm64/boot/dts/broadcom/Makefile
+@@ -5,4 +5,3 @@ dts-dirs += northstar2
+ dts-dirs += stingray
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/broadcom/northstar2/Makefile b/arch/arm64/boot/dts/broadcom/northstar2/Makefile
+index e01a1485b813..c589b9b55da8 100644
+--- a/arch/arm64/boot/dts/broadcom/northstar2/Makefile
++++ b/arch/arm64/boot/dts/broadcom/northstar2/Makefile
+@@ -3,4 +3,3 @@ dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-xmc.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/broadcom/stingray/Makefile b/arch/arm64/boot/dts/broadcom/stingray/Makefile
+index 04bb302f3233..fce39a6c2e56 100644
+--- a/arch/arm64/boot/dts/broadcom/stingray/Makefile
++++ b/arch/arm64/boot/dts/broadcom/stingray/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742t.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/cavium/Makefile b/arch/arm64/boot/dts/cavium/Makefile
+index 9f68c277302b..a7b62eb76cdf 100644
+--- a/arch/arm64/boot/dts/cavium/Makefile
++++ b/arch/arm64/boot/dts/cavium/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_ARCH_THUNDER2) += thunder2-99xx.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
+index 6914b2cbd397..c1b199e6213d 100644
+--- a/arch/arm64/boot/dts/exynos/Makefile
++++ b/arch/arm64/boot/dts/exynos/Makefile
+@@ -6,4 +6,3 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
+index dc02e82aba7c..a537b2fff41e 100644
+--- a/arch/arm64/boot/dts/freescale/Makefile
++++ b/arch/arm64/boot/dts/freescale/Makefile
+@@ -16,4 +16,3 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile
+index 521ed484a5d1..ea696896acb3 100644
+--- a/arch/arm64/boot/dts/hisilicon/Makefile
++++ b/arch/arm64/boot/dts/hisilicon/Makefile
+@@ -8,4 +8,3 @@ dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
+index e345b8e58efe..cfde42d55cd8 100644
+--- a/arch/arm64/boot/dts/lg/Makefile
++++ b/arch/arm64/boot/dts/lg/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_ARCH_LG1K) += lg1313-ref.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
+index 5633676fa9d0..11debddd9dfd 100644
+--- a/arch/arm64/boot/dts/marvell/Makefile
++++ b/arch/arm64/boot/dts/marvell/Makefile
+@@ -13,4 +13,3 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-8080-db.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
+index 1d05d1824fa9..75aa07a89e3c 100644
+--- a/arch/arm64/boot/dts/mediatek/Makefile
++++ b/arch/arm64/boot/dts/mediatek/Makefile
+@@ -8,4 +8,3 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
+index 6bc0c6ab4b7f..90a34e66048b 100644
+--- a/arch/arm64/boot/dts/nvidia/Makefile
++++ b/arch/arm64/boot/dts/nvidia/Makefile
+@@ -7,4 +7,3 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
+ dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
+
+ always := $(dtb-y)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
+index e7b25bee3f1e..08841488d9df 100644
+--- a/arch/arm64/boot/dts/qcom/Makefile
++++ b/arch/arm64/boot/dts/qcom/Makefile
+@@ -9,4 +9,3 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8996-mtp.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile
+index 8521e921e59a..88cb515f7b21 100644
+--- a/arch/arm64/boot/dts/realtek/Makefile
++++ b/arch/arm64/boot/dts/realtek/Makefile
+@@ -2,4 +2,3 @@ dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index 842f5884d437..ebb836b2d9e9 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -10,4 +10,3 @@ dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb
+ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
+
+ always := $(dtb-y)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
+index 84801892ee61..4e84ef9baec4 100644
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -14,4 +14,3 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/socionext/Makefile b/arch/arm64/boot/dts/socionext/Makefile
+index 72dbe8acd9fd..1844c004d075 100644
+--- a/arch/arm64/boot/dts/socionext/Makefile
++++ b/arch/arm64/boot/dts/socionext/Makefile
+@@ -7,4 +7,3 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \
+ uniphier-pxs3-ref.dtb
+
+ always := $(dtb-y)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/sprd/Makefile b/arch/arm64/boot/dts/sprd/Makefile
+index d7188be103c5..ae157b3542b4 100644
+--- a/arch/arm64/boot/dts/sprd/Makefile
++++ b/arch/arm64/boot/dts/sprd/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb \
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/xilinx/Makefile b/arch/arm64/boot/dts/xilinx/Makefile
+index ae16427f6a4a..74e195650f04 100644
+--- a/arch/arm64/boot/dts/xilinx/Makefile
++++ b/arch/arm64/boot/dts/xilinx/Makefile
+@@ -2,4 +2,3 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-ep108.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/zte/Makefile b/arch/arm64/boot/dts/zte/Makefile
+index d86c4def6bc9..71e07089cde0 100644
+--- a/arch/arm64/boot/dts/zte/Makefile
++++ b/arch/arm64/boot/dts/zte/Makefile
+@@ -3,4 +3,3 @@ dtb-$(CONFIG_ARCH_ZX) += zx296718-pcbox.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/c6x/boot/dts/Makefile b/arch/c6x/boot/dts/Makefile
+index 7368838c6e71..b212d278ebc4 100644
+--- a/arch/c6x/boot/dts/Makefile
++++ b/arch/c6x/boot/dts/Makefile
+@@ -17,5 +17,3 @@ $(obj)/builtin.dtb: $(obj)/$(DTB).dtb
+ $(call if_changed,cp)
+
+ $(obj)/linked_dtb.o: $(obj)/builtin.dtb
+-
+-clean-files := *.dtb
+diff --git a/arch/cris/boot/dts/Makefile b/arch/cris/boot/dts/Makefile
+index 3318c630caa2..118fe990a173 100644
+--- a/arch/cris/boot/dts/Makefile
++++ b/arch/cris/boot/dts/Makefile
+@@ -3,5 +3,3 @@ BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB)).dtb.o
+ ifneq ($(CONFIG_BUILTIN_DTB),"")
+ obj-$(CONFIG_OF) += $(BUILTIN_DTB)
+ endif
+-
+-clean-files := *.dtb.S
+diff --git a/arch/h8300/boot/dts/Makefile b/arch/h8300/boot/dts/Makefile
+index 14593b51b2b2..e9f70611c86f 100644
+--- a/arch/h8300/boot/dts/Makefile
++++ b/arch/h8300/boot/dts/Makefile
+@@ -13,4 +13,3 @@ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always := $(dtb-y)
+-clean-files := *.dtb.S *.dtb
+diff --git a/arch/metag/boot/dts/Makefile b/arch/metag/boot/dts/Makefile
+index ad5dde558db1..fbd7fc4c481d 100644
+--- a/arch/metag/boot/dts/Makefile
++++ b/arch/metag/boot/dts/Makefile
+@@ -19,4 +19,3 @@ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dts
+ .SECONDARY: $(obj)/$(builtindtb-y).dtb.S
+
+ always += $(dtb-y)
+-clean-files += *.dtb *.dtb.S
+diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile
+index 7c2f52d4a0e4..600e5a198bd2 100644
+--- a/arch/microblaze/boot/Makefile
++++ b/arch/microblaze/boot/Makefile
+@@ -37,4 +37,4 @@ $(obj)/simpleImage.%: vmlinux FORCE
+ $(call if_changed,strip,.strip)
+ @echo 'Kernel: $(UIMAGE_OUT) is ready' ' (#'`cat .version`')'
+
+-clean-files += simpleImage.*.unstrip linux.bin.ub dts/*.dtb
++clean-files += simpleImage.*.unstrip linux.bin.ub
+diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
+index e0a4e939f843..b3f2ee149d8e 100644
+--- a/arch/mips/boot/dts/Makefile
++++ b/arch/mips/boot/dts/Makefile
+@@ -19,4 +19,3 @@ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(foreach d,$(dt
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/brcm/Makefile b/arch/mips/boot/dts/brcm/Makefile
+index 398994312361..80fdad463531 100644
+--- a/arch/mips/boot/dts/brcm/Makefile
++++ b/arch/mips/boot/dts/brcm/Makefile
+@@ -40,4 +40,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/cavium-octeon/Makefile b/arch/mips/boot/dts/cavium-octeon/Makefile
+index 35300e091573..c0223497009e 100644
+--- a/arch/mips/boot/dts/cavium-octeon/Makefile
++++ b/arch/mips/boot/dts/cavium-octeon/Makefile
+@@ -7,4 +7,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/img/Makefile b/arch/mips/boot/dts/img/Makefile
+index 139bcd887b86..519178305ce9 100644
+--- a/arch/mips/boot/dts/img/Makefile
++++ b/arch/mips/boot/dts/img/Makefile
+@@ -8,4 +8,3 @@ obj-$(CONFIG_MACH_PISTACHIO) += pistachio_marduk.dtb.o
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/ingenic/Makefile b/arch/mips/boot/dts/ingenic/Makefile
+index 7798262570da..e2db1e4b5448 100644
+--- a/arch/mips/boot/dts/ingenic/Makefile
++++ b/arch/mips/boot/dts/ingenic/Makefile
+@@ -8,4 +8,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/lantiq/Makefile b/arch/mips/boot/dts/lantiq/Makefile
+index 0c50e3246a63..58f9c11f12a0 100644
+--- a/arch/mips/boot/dts/lantiq/Makefile
++++ b/arch/mips/boot/dts/lantiq/Makefile
+@@ -7,4 +7,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/mti/Makefile b/arch/mips/boot/dts/mti/Makefile
+index 5ee06f73c348..8a306abde117 100644
+--- a/arch/mips/boot/dts/mti/Makefile
++++ b/arch/mips/boot/dts/mti/Makefile
+@@ -8,4 +8,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/netlogic/Makefile b/arch/mips/boot/dts/netlogic/Makefile
+index 1cb2fdbd8949..ef7e73f20961 100644
+--- a/arch/mips/boot/dts/netlogic/Makefile
++++ b/arch/mips/boot/dts/netlogic/Makefile
+@@ -11,4 +11,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/ni/Makefile b/arch/mips/boot/dts/ni/Makefile
+index 66cfdffc51c2..094da7219905 100644
+--- a/arch/mips/boot/dts/ni/Makefile
++++ b/arch/mips/boot/dts/ni/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_FIT_IMAGE_FDT_NI169445) += 169445.dtb
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/pic32/Makefile b/arch/mips/boot/dts/pic32/Makefile
+index a86ddd289cfd..3482cad52849 100644
+--- a/arch/mips/boot/dts/pic32/Makefile
++++ b/arch/mips/boot/dts/pic32/Makefile
+@@ -10,4 +10,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/qca/Makefile b/arch/mips/boot/dts/qca/Makefile
+index eabd94eb59db..b44eabcdb4b0 100644
+--- a/arch/mips/boot/dts/qca/Makefile
++++ b/arch/mips/boot/dts/qca/Makefile
+@@ -10,4 +10,3 @@ dtb-$(CONFIG_ATH79) += ar9331_tl_mr3020.dtb
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/ralink/Makefile b/arch/mips/boot/dts/ralink/Makefile
+index a80eeeecf613..f38c5956953f 100644
+--- a/arch/mips/boot/dts/ralink/Makefile
++++ b/arch/mips/boot/dts/ralink/Makefile
+@@ -12,4 +12,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/xilfpga/Makefile b/arch/mips/boot/dts/xilfpga/Makefile
+index 498ac081e2fe..0afeee033f1b 100644
+--- a/arch/mips/boot/dts/xilfpga/Makefile
++++ b/arch/mips/boot/dts/xilfpga/Makefile
+@@ -7,4 +7,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/nios2/boot/Makefile b/arch/nios2/boot/Makefile
+index c899876320df..2ba23a679732 100644
+--- a/arch/nios2/boot/Makefile
++++ b/arch/nios2/boot/Makefile
+@@ -53,7 +53,5 @@ $(obj)/%.dtb: $(src)/dts/%.dts FORCE
+
+ $(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y))
+
+-clean-files := *.dtb
+-
+ install:
+ sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)"
+diff --git a/arch/openrisc/boot/dts/Makefile b/arch/openrisc/boot/dts/Makefile
+index 792ce7143c3a..17dd791a833f 100644
+--- a/arch/openrisc/boot/dts/Makefile
++++ b/arch/openrisc/boot/dts/Makefile
+@@ -6,6 +6,4 @@ BUILTIN_DTB :=
+ endif
+ obj-y += $(BUILTIN_DTB)
+
+-clean-files := *.dtb.S
+-
+ #DTC_FLAGS ?= -p 1024
+diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
+index b479926f0167..f257925fa490 100644
+--- a/arch/powerpc/boot/Makefile
++++ b/arch/powerpc/boot/Makefile
+@@ -441,7 +441,7 @@ zInstall: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
+ clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
+ zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
+ zImage.miboot zImage.pmac zImage.pseries \
+- zImage.maple simpleImage.* otheros.bld *.dtb
++ zImage.maple simpleImage.* otheros.bld
+
+ # clean up files cached by wrapper
+ clean-kernel-base := vmlinux.strip vmlinux.bin
+diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
+index e5ce3a0de7f4..715def00a436 100644
+--- a/arch/sh/boot/dts/Makefile
++++ b/arch/sh/boot/dts/Makefile
+@@ -1,3 +1 @@
+ obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
+-
+-clean-files := *.dtb.S
+diff --git a/arch/xtensa/boot/dts/Makefile b/arch/xtensa/boot/dts/Makefile
+index a15e241c9153..c62dd6ca1f82 100644
+--- a/arch/xtensa/boot/dts/Makefile
++++ b/arch/xtensa/boot/dts/Makefile
+@@ -16,5 +16,3 @@ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always += $(dtb-y)
+-clean-files += *.dtb *.dtb.S
+-
+--
+2.19.0
+
diff --git a/patches/0082-arm64-dts-renesas-salvator-x-Remove-renesas-no-ether.patch b/patches/0082-arm64-dts-renesas-salvator-x-Remove-renesas-no-ether.patch
new file mode 100644
index 0000000..9eee2be
--- /dev/null
+++ b/patches/0082-arm64-dts-renesas-salvator-x-Remove-renesas-no-ether.patch
@@ -0,0 +1,62 @@
+From 3a5de1e1b611ccb39f700b41656a6d44b75a0dfa Mon Sep 17 00:00:00 2001
+From: Bogdan Mirea <Bogdan-Stefan_Mirea@mentor.com>
+Date: Thu, 21 Dec 2017 17:18:58 +0200
+Subject: [PATCH 0082/1795] arm64: dts: renesas: salvator-x: Remove renesas,
+ no-ether-link property
+
+The present change is a bug fix for AVB link iteratively up/down.
+
+Steps to reproduce:
+- start AVB TX stream (Using aplay via MSE),
+- disconnect+reconnect the eth cable,
+- after a reconnection the eth connection goes iteratively up/down
+ without user interaction,
+- this may heal after some seconds or even stay for minutes.
+
+As the documentation specifies, the "renesas,no-ether-link" option
+should be used when a board does not provide a proper AVB_LINK signal.
+There is no need for this option enabled on RCAR H3/M3 Salvator-X/XS
+and ULCB starter kits since the AVB_LINK is correctly handled by HW.
+
+Choosing to keep or remove the "renesas,no-ether-link" option will
+have impact on the code flow in the following ways:
+- keeping this option enabled may lead to unexpected behavior since
+ the RX & TX are enabled/disabled directly from adjust_link function
+ without any HW interrogation,
+- removing this option, the RX & TX will only be enabled/disabled after
+ HW interrogation. The HW check is made through the LMON pin in PSR
+ register which specifies AVB_LINK signal value (0 - at low level;
+ 1 - at high level).
+
+In conclusion, the present change is also a safety improvement because
+it removes the "renesas,no-ether-link" option leading to a proper way
+of detecting the link state based on HW interrogation and not on
+software heuristic.
+
+Fixes: dc36965a8905 ("arm64: dts: r8a7796: salvator-x: Enable EthernetAVB")
+Fixes: 6fa501c549aa ("arm64: dts: r8a7795: enable EthernetAVB on Salvator-X")
+Signed-off-by: Bogdan Mirea <Bogdan-Stefan_Mirea@mentor.com>
+Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 87c059e9c39dae20b8b9bd19d9ec55a6d6c10468)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+index eab44b9bdaa7..8a2bcc73d5f0 100644
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+@@ -247,7 +247,6 @@
+ &avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+- renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ status = "okay";
+
+--
+2.19.0
+
diff --git a/patches/0083-pinctrl-gpio-Unify-namespace-for-cross-calls.patch b/patches/0083-pinctrl-gpio-Unify-namespace-for-cross-calls.patch
new file mode 100644
index 0000000..ce21ac2
--- /dev/null
+++ b/patches/0083-pinctrl-gpio-Unify-namespace-for-cross-calls.patch
@@ -0,0 +1,532 @@
+From ba6388cb9360489bc594e4493a87531ce1b969e5 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Fri, 22 Sep 2017 11:02:10 +0200
+Subject: [PATCH 0083/1795] pinctrl/gpio: Unify namespace for cross-calls
+
+The pinctrl_request_gpio() and pinctrl_free_gpio() break the nice
+namespacing in the other cross-calls like pinctrl_gpio_foo().
+Just rename them and all references so we have one namespace
+with all cross-calls under pinctrl_gpio_*().
+
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit a9a1d2a7827c9cf780966d0879c73ef5a91380e9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/driver-api/pinctl.rst | 6 +++---
+ Documentation/gpio/gpio-legacy.txt | 10 +++++-----
+ Documentation/translations/zh_CN/gpio.txt | 6 +++---
+ drivers/gpio/gpio-aspeed.c | 4 ++--
+ drivers/gpio/gpio-em.c | 4 ++--
+ drivers/gpio/gpio-pxa.c | 4 ++--
+ drivers/gpio/gpio-rcar.c | 4 ++--
+ drivers/gpio/gpio-tegra.c | 4 ++--
+ drivers/gpio/gpio-tz1090.c | 4 ++--
+ drivers/gpio/gpiolib.c | 4 ++--
+ drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | 4 ++--
+ drivers/pinctrl/bcm/pinctrl-nsp-gpio.c | 4 ++--
+ drivers/pinctrl/core.c | 12 ++++++------
+ drivers/pinctrl/core.h | 2 +-
+ drivers/pinctrl/meson/pinctrl-meson.c | 4 ++--
+ drivers/pinctrl/sh-pfc/gpio.c | 4 ++--
+ drivers/pinctrl/sirf/pinctrl-atlas7.c | 4 ++--
+ drivers/pinctrl/sirf/pinctrl-sirf.c | 4 ++--
+ drivers/pinctrl/spear/pinctrl-plgpio.c | 6 +++---
+ drivers/pinctrl/stm32/pinctrl-stm32.c | 4 ++--
+ include/linux/pinctrl/consumer.h | 8 ++++----
+ 21 files changed, 53 insertions(+), 53 deletions(-)
+
+diff --git a/Documentation/driver-api/pinctl.rst b/Documentation/driver-api/pinctl.rst
+index 48f15b4f9d3e..6cb68d67fa75 100644
+--- a/Documentation/driver-api/pinctl.rst
++++ b/Documentation/driver-api/pinctl.rst
+@@ -757,8 +757,8 @@ that your datasheet calls "GPIO mode", but actually is just an electrical
+ configuration for a certain device. See the section below named
+ "GPIO mode pitfalls" for more details on this scenario.
+
+-The public pinmux API contains two functions named pinctrl_request_gpio()
+-and pinctrl_free_gpio(). These two functions shall *ONLY* be called from
++The public pinmux API contains two functions named pinctrl_gpio_request()
++and pinctrl_gpio_free(). These two functions shall *ONLY* be called from
+ gpiolib-based drivers as part of their gpio_request() and
+ gpio_free() semantics. Likewise the pinctrl_gpio_direction_[input|output]
+ shall only be called from within respective gpio_direction_[input|output]
+@@ -790,7 +790,7 @@ gpiolib driver and the affected GPIO range, pin offset and desired direction
+ will be passed along to this function.
+
+ Alternatively to using these special functions, it is fully allowed to use
+-named functions for each GPIO pin, the pinctrl_request_gpio() will attempt to
++named functions for each GPIO pin, the pinctrl_gpio_request() will attempt to
+ obtain the function "gpioN" where "N" is the global GPIO pin number if no
+ special GPIO-handler is registered.
+
+diff --git a/Documentation/gpio/gpio-legacy.txt b/Documentation/gpio/gpio-legacy.txt
+index 5eacc147ea87..8356d0e78f67 100644
+--- a/Documentation/gpio/gpio-legacy.txt
++++ b/Documentation/gpio/gpio-legacy.txt
+@@ -273,8 +273,8 @@ easily, gating off unused clocks.
+
+ For GPIOs that use pins known to the pinctrl subsystem, that subsystem should
+ be informed of their use; a gpiolib driver's .request() operation may call
+-pinctrl_request_gpio(), and a gpiolib driver's .free() operation may call
+-pinctrl_free_gpio(). The pinctrl subsystem allows a pinctrl_request_gpio()
++pinctrl_gpio_request(), and a gpiolib driver's .free() operation may call
++pinctrl_gpio_free(). The pinctrl subsystem allows a pinctrl_gpio_request()
+ to succeed concurrently with a pin or pingroup being "owned" by a device for
+ pin multiplexing.
+
+@@ -448,8 +448,8 @@ together with an optional gpio feature. We have already covered the
+ case where e.g. a GPIO controller need to reserve a pin or set the
+ direction of a pin by calling any of:
+
+-pinctrl_request_gpio()
+-pinctrl_free_gpio()
++pinctrl_gpio_request()
++pinctrl_gpio_free()
+ pinctrl_gpio_direction_input()
+ pinctrl_gpio_direction_output()
+
+@@ -466,7 +466,7 @@ gpio (under gpiolib) is still maintained by gpio drivers. It may happen
+ that different pin ranges in a SoC is managed by different gpio drivers.
+
+ This makes it logical to let gpio drivers announce their pin ranges to
+-the pin ctrl subsystem before it will call 'pinctrl_request_gpio' in order
++the pin ctrl subsystem before it will call 'pinctrl_gpio_request' in order
+ to request the corresponding pin to be prepared by the pinctrl subsystem
+ before any gpio usage.
+
+diff --git a/Documentation/translations/zh_CN/gpio.txt b/Documentation/translations/zh_CN/gpio.txt
+index bce972521065..4f8bf30a41dc 100644
+--- a/Documentation/translations/zh_CN/gpio.txt
++++ b/Documentation/translations/zh_CN/gpio.txt
+@@ -257,9 +257,9 @@ GPIO 值的命令需要等待其信息排到队首才发送命令，再获得其
+ 简单地关闭未使用时钟)。
+
+ 对于 GPIO 使用 pinctrl 子系统已知的引脚，子系统应该被告知其使用情况；
+-一个 gpiolib 驱动的 .request()操作应调用 pinctrl_request_gpio()，
+-而 gpiolib 驱动的 .free()操作应调用 pinctrl_free_gpio()。pinctrl
+-子系统允许 pinctrl_request_gpio()在某个引脚或引脚组以复用形式“属于”
++一个 gpiolib 驱动的 .request()操作应调用 pinctrl_gpio_request()，
++而 gpiolib 驱动的 .free()操作应调用 pinctrl_gpio_free()。pinctrl
++子系统允许 pinctrl_gpio_request()在某个引脚或引脚组以复用形式“属于”
+ 一个设备时都成功返回。
+
+ 任何须将 GPIO 信号导向适当引脚的引脚复用硬件的编程应该发生在 GPIO
+diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
+index f03fe916eb9d..bf34b5eae705 100644
+--- a/drivers/gpio/gpio-aspeed.c
++++ b/drivers/gpio/gpio-aspeed.c
+@@ -536,12 +536,12 @@ static int aspeed_gpio_request(struct gpio_chip *chip, unsigned int offset)
+ if (!have_gpio(gpiochip_get_data(chip), offset))
+ return -ENODEV;
+
+- return pinctrl_request_gpio(chip->base + offset);
++ return pinctrl_gpio_request(chip->base + offset);
+ }
+
+ static void aspeed_gpio_free(struct gpio_chip *chip, unsigned int offset)
+ {
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+ }
+
+ static inline void __iomem *bank_debounce_reg(struct aspeed_gpio *gpio,
+diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
+index 8d32ccc980d9..b86e09e1b13b 100644
+--- a/drivers/gpio/gpio-em.c
++++ b/drivers/gpio/gpio-em.c
+@@ -239,12 +239,12 @@ static int em_gio_to_irq(struct gpio_chip *chip, unsigned offset)
+
+ static int em_gio_request(struct gpio_chip *chip, unsigned offset)
+ {
+- return pinctrl_request_gpio(chip->base + offset);
++ return pinctrl_gpio_request(chip->base + offset);
+ }
+
+ static void em_gio_free(struct gpio_chip *chip, unsigned offset)
+ {
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+
+ /* Set the GPIO as an input to ensure that the next GPIO request won't
+ * drive the GPIO pin as an output.
+diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
+index 6029899789f3..da68d6cbc1e4 100644
+--- a/drivers/gpio/gpio-pxa.c
++++ b/drivers/gpio/gpio-pxa.c
+@@ -332,12 +332,12 @@ static int pxa_gpio_of_xlate(struct gpio_chip *gc,
+
+ static int pxa_gpio_request(struct gpio_chip *chip, unsigned int offset)
+ {
+- return pinctrl_request_gpio(chip->base + offset);
++ return pinctrl_gpio_request(chip->base + offset);
+ }
+
+ static void pxa_gpio_free(struct gpio_chip *chip, unsigned int offset)
+ {
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+ }
+
+ static int pxa_init_gpio_chip(struct pxa_gpio_chip *pchip, int ngpio,
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index 1f0871553fd2..43b51045aa47 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -249,7 +249,7 @@ static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
+ if (error < 0)
+ return error;
+
+- error = pinctrl_request_gpio(chip->base + offset);
++ error = pinctrl_gpio_request(chip->base + offset);
+ if (error)
+ pm_runtime_put(&p->pdev->dev);
+
+@@ -260,7 +260,7 @@ static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
+ {
+ struct gpio_rcar_priv *p = gpiochip_get_data(chip);
+
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+
+ /*
+ * Set the GPIO as an input to ensure that the next GPIO request won't
+diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
+index fbaf974277df..8db47f671708 100644
+--- a/drivers/gpio/gpio-tegra.c
++++ b/drivers/gpio/gpio-tegra.c
+@@ -141,14 +141,14 @@ static void tegra_gpio_disable(struct tegra_gpio_info *tgi, unsigned int gpio)
+
+ static int tegra_gpio_request(struct gpio_chip *chip, unsigned int offset)
+ {
+- return pinctrl_request_gpio(offset);
++ return pinctrl_gpio_request(offset);
+ }
+
+ static void tegra_gpio_free(struct gpio_chip *chip, unsigned int offset)
+ {
+ struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
+
+- pinctrl_free_gpio(offset);
++ pinctrl_gpio_free(offset);
+ tegra_gpio_disable(tgi, offset);
+ }
+
+diff --git a/drivers/gpio/gpio-tz1090.c b/drivers/gpio/gpio-tz1090.c
+index 22c5be65051f..0bb9bb583889 100644
+--- a/drivers/gpio/gpio-tz1090.c
++++ b/drivers/gpio/gpio-tz1090.c
+@@ -232,7 +232,7 @@ static int tz1090_gpio_request(struct gpio_chip *chip, unsigned int offset)
+ struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
+ int ret;
+
+- ret = pinctrl_request_gpio(chip->base + offset);
++ ret = pinctrl_gpio_request(chip->base + offset);
+ if (ret)
+ return ret;
+
+@@ -246,7 +246,7 @@ static void tz1090_gpio_free(struct gpio_chip *chip, unsigned int offset)
+ {
+ struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
+
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+
+ tz1090_gpio_clear_bit(bank, REG_GPIO_BIT_EN, offset);
+ }
+diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
+index 7e0bfd7347f6..99d0b3510b54 100644
+--- a/drivers/gpio/gpiolib.c
++++ b/drivers/gpio/gpiolib.c
+@@ -1863,7 +1863,7 @@ static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
+ */
+ int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
+ {
+- return pinctrl_request_gpio(chip->gpiodev->base + offset);
++ return pinctrl_gpio_request(chip->gpiodev->base + offset);
+ }
+ EXPORT_SYMBOL_GPL(gpiochip_generic_request);
+
+@@ -1874,7 +1874,7 @@ EXPORT_SYMBOL_GPL(gpiochip_generic_request);
+ */
+ void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
+ {
+- pinctrl_free_gpio(chip->gpiodev->base + offset);
++ pinctrl_gpio_free(chip->gpiodev->base + offset);
+ }
+ EXPORT_SYMBOL_GPL(gpiochip_generic_free);
+
+diff --git a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
+index 85a8c97d9dfe..5d08d989b1d0 100644
+--- a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
++++ b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
+@@ -311,7 +311,7 @@ static int iproc_gpio_request(struct gpio_chip *gc, unsigned offset)
+ if (!chip->pinmux_is_supported)
+ return 0;
+
+- return pinctrl_request_gpio(gpio);
++ return pinctrl_gpio_request(gpio);
+ }
+
+ static void iproc_gpio_free(struct gpio_chip *gc, unsigned offset)
+@@ -322,7 +322,7 @@ static void iproc_gpio_free(struct gpio_chip *gc, unsigned offset)
+ if (!chip->pinmux_is_supported)
+ return;
+
+- pinctrl_free_gpio(gpio);
++ pinctrl_gpio_free(gpio);
+ }
+
+ static int iproc_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
+diff --git a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
+index 1cfe45fd391f..c1887072936e 100644
+--- a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
++++ b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
+@@ -282,14 +282,14 @@ static int nsp_gpio_request(struct gpio_chip *gc, unsigned offset)
+ {
+ unsigned gpio = gc->base + offset;
+
+- return pinctrl_request_gpio(gpio);
++ return pinctrl_gpio_request(gpio);
+ }
+
+ static void nsp_gpio_free(struct gpio_chip *gc, unsigned offset)
+ {
+ unsigned gpio = gc->base + offset;
+
+- pinctrl_free_gpio(gpio);
++ pinctrl_gpio_free(gpio);
+ }
+
+ static int nsp_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
+diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
+index c55517312485..2c0dbfcff3e6 100644
+--- a/drivers/pinctrl/core.c
++++ b/drivers/pinctrl/core.c
+@@ -733,14 +733,14 @@ int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
+ }
+
+ /**
+- * pinctrl_request_gpio() - request a single pin to be used as GPIO
++ * pinctrl_gpio_request() - request a single pin to be used as GPIO
+ * @gpio: the GPIO pin number from the GPIO subsystem number space
+ *
+ * This function should *ONLY* be used from gpiolib-based GPIO drivers,
+ * as part of their gpio_request() semantics, platforms and individual drivers
+ * shall *NOT* request GPIO pins to be muxed in.
+ */
+-int pinctrl_request_gpio(unsigned gpio)
++int pinctrl_gpio_request(unsigned gpio)
+ {
+ struct pinctrl_dev *pctldev;
+ struct pinctrl_gpio_range *range;
+@@ -765,17 +765,17 @@ int pinctrl_request_gpio(unsigned gpio)
+
+ return ret;
+ }
+-EXPORT_SYMBOL_GPL(pinctrl_request_gpio);
++EXPORT_SYMBOL_GPL(pinctrl_gpio_request);
+
+ /**
+- * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO
++ * pinctrl_gpio_free() - free control on a single pin, currently used as GPIO
+ * @gpio: the GPIO pin number from the GPIO subsystem number space
+ *
+ * This function should *ONLY* be used from gpiolib-based GPIO drivers,
+ * as part of their gpio_free() semantics, platforms and individual drivers
+ * shall *NOT* request GPIO pins to be muxed out.
+ */
+-void pinctrl_free_gpio(unsigned gpio)
++void pinctrl_gpio_free(unsigned gpio)
+ {
+ struct pinctrl_dev *pctldev;
+ struct pinctrl_gpio_range *range;
+@@ -795,7 +795,7 @@ void pinctrl_free_gpio(unsigned gpio)
+
+ mutex_unlock(&pctldev->mutex);
+ }
+-EXPORT_SYMBOL_GPL(pinctrl_free_gpio);
++EXPORT_SYMBOL_GPL(pinctrl_gpio_free);
+
+ static int pinctrl_gpio_direction(unsigned gpio, bool input)
+ {
+diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h
+index 7880c3adc450..8cf2eba17c8c 100644
+--- a/drivers/pinctrl/core.h
++++ b/drivers/pinctrl/core.h
+@@ -154,7 +154,7 @@ struct pinctrl_setting {
+ * or pin, and each of these will increment the @usecount.
+ * @mux_owner: The name of device that called pinctrl_get().
+ * @mux_setting: The most recent selected mux setting for this pin, if any.
+- * @gpio_owner: If pinctrl_request_gpio() was called for this pin, this is
++ * @gpio_owner: If pinctrl_gpio_request() was called for this pin, this is
+ * the name of the GPIO that "owns" this pin.
+ */
+ struct pin_desc {
+diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
+index 66ed70c12733..e6e12a7b21e0 100644
+--- a/drivers/pinctrl/meson/pinctrl-meson.c
++++ b/drivers/pinctrl/meson/pinctrl-meson.c
+@@ -412,14 +412,14 @@ static const struct pinconf_ops meson_pinconf_ops = {
+
+ static int meson_gpio_request(struct gpio_chip *chip, unsigned gpio)
+ {
+- return pinctrl_request_gpio(chip->base + gpio);
++ return pinctrl_gpio_request(chip->base + gpio);
+ }
+
+ static void meson_gpio_free(struct gpio_chip *chip, unsigned gpio)
+ {
+ struct meson_pinctrl *pc = gpiochip_get_data(chip);
+
+- pinctrl_free_gpio(pc->data->pin_base + gpio);
++ pinctrl_gpio_free(pc->data->pin_base + gpio);
+ }
+
+ static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
+diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
+index 6b5422766f13..946d9be50b62 100644
+--- a/drivers/pinctrl/sh-pfc/gpio.c
++++ b/drivers/pinctrl/sh-pfc/gpio.c
+@@ -139,12 +139,12 @@ static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
+ if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
+ return -EINVAL;
+
+- return pinctrl_request_gpio(offset);
++ return pinctrl_gpio_request(offset);
+ }
+
+ static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
+ {
+- return pinctrl_free_gpio(offset);
++ return pinctrl_gpio_free(offset);
+ }
+
+ static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
+diff --git a/drivers/pinctrl/sirf/pinctrl-atlas7.c b/drivers/pinctrl/sirf/pinctrl-atlas7.c
+index 4db9323251e3..f4b192b493a0 100644
+--- a/drivers/pinctrl/sirf/pinctrl-atlas7.c
++++ b/drivers/pinctrl/sirf/pinctrl-atlas7.c
+@@ -5860,7 +5860,7 @@ static int atlas7_gpio_request(struct gpio_chip *chip,
+ if (ret < 0)
+ return ret;
+
+- if (pinctrl_request_gpio(chip->base + gpio))
++ if (pinctrl_gpio_request(chip->base + gpio))
+ return -ENODEV;
+
+ raw_spin_lock_irqsave(&a7gc->lock, flags);
+@@ -5890,7 +5890,7 @@ static void atlas7_gpio_free(struct gpio_chip *chip,
+
+ raw_spin_unlock_irqrestore(&a7gc->lock, flags);
+
+- pinctrl_free_gpio(chip->base + gpio);
++ pinctrl_gpio_free(chip->base + gpio);
+ }
+
+ static int atlas7_gpio_direction_input(struct gpio_chip *chip,
+diff --git a/drivers/pinctrl/sirf/pinctrl-sirf.c b/drivers/pinctrl/sirf/pinctrl-sirf.c
+index d3ef05973901..d64add0b84cc 100644
+--- a/drivers/pinctrl/sirf/pinctrl-sirf.c
++++ b/drivers/pinctrl/sirf/pinctrl-sirf.c
+@@ -614,7 +614,7 @@ static int sirfsoc_gpio_request(struct gpio_chip *chip, unsigned offset)
+ struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);
+ unsigned long flags;
+
+- if (pinctrl_request_gpio(chip->base + offset))
++ if (pinctrl_gpio_request(chip->base + offset))
+ return -ENODEV;
+
+ spin_lock_irqsave(&bank->lock, flags);
+@@ -644,7 +644,7 @@ static void sirfsoc_gpio_free(struct gpio_chip *chip, unsigned offset)
+
+ spin_unlock_irqrestore(&bank->lock, flags);
+
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+ }
+
+ static int sirfsoc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
+diff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear/pinctrl-plgpio.c
+index cf6d68c7345b..7a33e2e1e3e7 100644
+--- a/drivers/pinctrl/spear/pinctrl-plgpio.c
++++ b/drivers/pinctrl/spear/pinctrl-plgpio.c
+@@ -204,7 +204,7 @@ static int plgpio_request(struct gpio_chip *chip, unsigned offset)
+ if (offset >= chip->ngpio)
+ return -EINVAL;
+
+- ret = pinctrl_request_gpio(gpio);
++ ret = pinctrl_gpio_request(gpio);
+ if (ret)
+ return ret;
+
+@@ -242,7 +242,7 @@ static int plgpio_request(struct gpio_chip *chip, unsigned offset)
+ if (!IS_ERR(plgpio->clk))
+ clk_disable(plgpio->clk);
+ err0:
+- pinctrl_free_gpio(gpio);
++ pinctrl_gpio_free(gpio);
+ return ret;
+ }
+
+@@ -273,7 +273,7 @@ static void plgpio_free(struct gpio_chip *chip, unsigned offset)
+ if (!IS_ERR(plgpio->clk))
+ clk_disable(plgpio->clk);
+
+- pinctrl_free_gpio(gpio);
++ pinctrl_gpio_free(gpio);
+ }
+
+ /* PLGPIO IRQ */
+diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
+index 50299ad96659..a954d25bac4e 100644
+--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
++++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
+@@ -150,12 +150,12 @@ static int stm32_gpio_request(struct gpio_chip *chip, unsigned offset)
+ return -EINVAL;
+ }
+
+- return pinctrl_request_gpio(chip->base + offset);
++ return pinctrl_gpio_request(chip->base + offset);
+ }
+
+ static void stm32_gpio_free(struct gpio_chip *chip, unsigned offset)
+ {
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+ }
+
+ static int stm32_gpio_get(struct gpio_chip *chip, unsigned offset)
+diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consumer.h
+index a0f2aba72fa9..0412cc9833e9 100644
+--- a/include/linux/pinctrl/consumer.h
++++ b/include/linux/pinctrl/consumer.h
+@@ -25,8 +25,8 @@ struct device;
+ #ifdef CONFIG_PINCTRL
+
+ /* External interface to pin control */
+-extern int pinctrl_request_gpio(unsigned gpio);
+-extern void pinctrl_free_gpio(unsigned gpio);
++extern int pinctrl_gpio_request(unsigned gpio);
++extern void pinctrl_gpio_free(unsigned gpio);
+ extern int pinctrl_gpio_direction_input(unsigned gpio);
+ extern int pinctrl_gpio_direction_output(unsigned gpio);
+ extern int pinctrl_gpio_set_config(unsigned gpio, unsigned long config);
+@@ -62,12 +62,12 @@ static inline int pinctrl_pm_select_idle_state(struct device *dev)
+
+ #else /* !CONFIG_PINCTRL */
+
+-static inline int pinctrl_request_gpio(unsigned gpio)
++static inline int pinctrl_gpio_request(unsigned gpio)
+ {
+ return 0;
+ }
+
+-static inline void pinctrl_free_gpio(unsigned gpio)
++static inline void pinctrl_gpio_free(unsigned gpio)
+ {
+ }
+
+--
+2.19.0
+
diff --git a/patches/0084-Input-gpio-keys-convert-timers-to-use-timer_setup.patch b/patches/0084-Input-gpio-keys-convert-timers-to-use-timer_setup.patch
new file mode 100644
index 0000000..85d3f93
--- /dev/null
+++ b/patches/0084-Input-gpio-keys-convert-timers-to-use-timer_setup.patch
@@ -0,0 +1,48 @@
+From 6e5a4b3b9d1f814b27f1cab927ffaf2b0a61ea9f Mon Sep 17 00:00:00 2001
+From: stephen lu <lumotuwe@gmail.com>
+Date: Mon, 23 Oct 2017 14:43:53 -0700
+Subject: [PATCH 0084/1795] Input: gpio-keys - convert timers to use
+ timer_setup()
+
+In preparation for unconditionally passing the struct timer_list pointer to
+all timer callbacks, switch to using the new timer_setup() and from_timer()
+to pass the timer pointer explicitly.
+
+Signed-off-by: Stephen Lu <lumotuwe@gmail.com>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+(cherry picked from commit 82565a120544b2bdfaf602d9f5e7b9ab9a342ae8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/input/keyboard/gpio_keys.c | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
+index e9f0ebf3267a..87e613dc33b8 100644
+--- a/drivers/input/keyboard/gpio_keys.c
++++ b/drivers/input/keyboard/gpio_keys.c
+@@ -419,9 +419,9 @@ static irqreturn_t gpio_keys_gpio_isr(int irq, void *dev_id)
+ return IRQ_HANDLED;
+ }
+
+-static void gpio_keys_irq_timer(unsigned long _data)
++static void gpio_keys_irq_timer(struct timer_list *t)
+ {
+- struct gpio_button_data *bdata = (struct gpio_button_data *)_data;
++ struct gpio_button_data *bdata = from_timer(bdata, t, release_timer);
+ struct input_dev *input = bdata->input;
+ unsigned long flags;
+
+@@ -582,8 +582,7 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
+ }
+
+ bdata->release_delay = button->debounce_interval;
+- setup_timer(&bdata->release_timer,
+- gpio_keys_irq_timer, (unsigned long)bdata);
++ timer_setup(&bdata->release_timer, gpio_keys_irq_timer, 0);
+
+ isr = gpio_keys_irq_isr;
+ irqflags = 0;
+--
+2.19.0
+
diff --git a/patches/0085-gpio-rcar-Use-of_device_get_match_data-helper.patch b/patches/0085-gpio-rcar-Use-of_device_get_match_data-helper.patch
new file mode 100644
index 0000000..0c42080
--- /dev/null
+++ b/patches/0085-gpio-rcar-Use-of_device_get_match_data-helper.patch
@@ -0,0 +1,52 @@
+From 3460162ad1de35498cdca4bc7b8a1109eb77afdb Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:16:16 +0200
+Subject: [PATCH 0085/1795] gpio: rcar: Use of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+Note that the gpio-rcar driver is used with DT only, so there's always a
+valid match.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit f9f2a6fe1399d1fab38b6c1d0639928a52b67a79)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpio/gpio-rcar.c | 8 ++------
+ 1 file changed, 2 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index 43b51045aa47..3d0a2a7dd631 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -24,6 +24,7 @@
+ #include <linux/irq.h>
+ #include <linux/module.h>
+ #include <linux/of.h>
++#include <linux/of_device.h>
+ #include <linux/pinctrl/consumer.h>
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+@@ -393,16 +394,11 @@ MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
+ static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, unsigned int *npins)
+ {
+ struct device_node *np = p->pdev->dev.of_node;
+- const struct of_device_id *match;
+ const struct gpio_rcar_info *info;
+ struct of_phandle_args args;
+ int ret;
+
+- match = of_match_node(gpio_rcar_of_table, np);
+- if (!match)
+- return -EINVAL;
+-
+- info = match->data;
++ info = of_device_get_match_data(&p->pdev->dev);
+
+ ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args);
+ *npins = ret == 0 ? args.args[2] : RCAR_MAX_GPIO_PER_BANK;
+--
+2.19.0
+
diff --git a/patches/0086-gpio-rcar-document-R8A77970-bindings.patch b/patches/0086-gpio-rcar-document-R8A77970-bindings.patch
new file mode 100644
index 0000000..9b08cba
--- /dev/null
+++ b/patches/0086-gpio-rcar-document-R8A77970-bindings.patch
@@ -0,0 +1,32 @@
+From 373fc5dbe6c7de59d38c12b3553ba4c1534fb8f6 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 11 Oct 2017 22:51:59 +0300
+Subject: [PATCH 0086/1795] gpio-rcar: document R8A77970 bindings
+
+Renesas R-Car V3M (R8A77970) SoC also has the R-Car gen3 compatible GPIO
+controllers, so document the SoC specific bindings.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit f76a2d9d7f9524c54dfd9c7b49ed26e488c4cf6c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+index 51c86f69995e..41137a1cc099 100644
+--- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
++++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+@@ -14,6 +14,7 @@ Required Properties:
+ - "renesas,gpio-r8a7794": for R8A7794 (R-Car E2) compatible GPIO controller.
+ - "renesas,gpio-r8a7795": for R8A7795 (R-Car H3) compatible GPIO controller.
+ - "renesas,gpio-r8a7796": for R8A7796 (R-Car M3-W) compatible GPIO controller.
++ - "renesas,gpio-r8a77970": for R8A77970 (R-Car V3M) compatible GPIO controller.
+ - "renesas,rcar-gen1-gpio": for a generic R-Car Gen1 GPIO controller.
+ - "renesas,rcar-gen2-gpio": for a generic R-Car Gen2 or RZ/G1 GPIO controller.
+ - "renesas,rcar-gen3-gpio": for a generic R-Car Gen3 GPIO controller.
+--
+2.19.0
+
diff --git a/patches/0087-gpio-rcar-use-devm_ioremap_resource.patch b/patches/0087-gpio-rcar-use-devm_ioremap_resource.patch
new file mode 100644
index 0000000..a615f15
--- /dev/null
+++ b/patches/0087-gpio-rcar-use-devm_ioremap_resource.patch
@@ -0,0 +1,57 @@
+From c736bdac71f78a4de06b667febbe7bb51efbd027 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 13 Oct 2017 00:08:14 +0300
+Subject: [PATCH 0087/1795] gpio-rcar: use devm_ioremap_resource()
+
+Using devm_ioremap_resource() has several advantages over devm_ioremap():
+- it checks the passed resource's validity;
+- it calls devm_request_mem_region() to check for the resource overlap;
+- it prints an error message in case of error.
+
+We can call devm_ioremap_resource() instead of devm_ioremap_nocache()
+as ioremap() and ioremap_nocache() are implemented identically on ARM.
+Doing this saves 2 LoCs and 80 bytes (AArch64 gcc 4.8.5).
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 5a24d4b601561da08a70c065d4630bd9fadb37e8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpio/gpio-rcar.c | 14 ++++++--------
+ 1 file changed, 6 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index 3d0a2a7dd631..2cf5f458928b 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -452,19 +452,17 @@ static int gpio_rcar_probe(struct platform_device *pdev)
+
+ pm_runtime_enable(dev);
+
+- io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+-
+- if (!io || !irq) {
+- dev_err(dev, "missing IRQ or IOMEM\n");
++ if (!irq) {
++ dev_err(dev, "missing IRQ\n");
+ ret = -EINVAL;
+ goto err0;
+ }
+
+- p->base = devm_ioremap_nocache(dev, io->start, resource_size(io));
+- if (!p->base) {
+- dev_err(dev, "failed to remap I/O memory\n");
+- ret = -ENXIO;
++ io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ p->base = devm_ioremap_resource(dev, io);
++ if (IS_ERR(p->base)) {
++ ret = PTR_ERR(p->base);
+ goto err0;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0088-gpio-rcar-Add-r8a77995-R-Car-D3-support.patch b/patches/0088-gpio-rcar-Add-r8a77995-R-Car-D3-support.patch
new file mode 100644
index 0000000..f7078ca
--- /dev/null
+++ b/patches/0088-gpio-rcar-Add-r8a77995-R-Car-D3-support.patch
@@ -0,0 +1,36 @@
+From d4aa420547e39a34eb1b257a2b4e40e6a625ab73 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 9 Nov 2017 11:39:20 +0100
+Subject: [PATCH 0088/1795] gpio: rcar: Add r8a77995 (R-Car D3) support
+
+This patch adds binding for r8a77995 (R-Car D3). This SoC can use
+"renesas,rcar-gen3-gpio" fallback compatibility. So, this patch
+doesn't modify the gpio-rcar driver.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 924d4db29f1237f9fe90a7439d2ee81837d282bd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+index 41137a1cc099..a7ac460ad657 100644
+--- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
++++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+@@ -15,6 +15,7 @@ Required Properties:
+ - "renesas,gpio-r8a7795": for R8A7795 (R-Car H3) compatible GPIO controller.
+ - "renesas,gpio-r8a7796": for R8A7796 (R-Car M3-W) compatible GPIO controller.
+ - "renesas,gpio-r8a77970": for R8A77970 (R-Car V3M) compatible GPIO controller.
++ - "renesas,gpio-r8a77995": for R8A77995 (R-Car D3) compatible GPIO controller.
+ - "renesas,rcar-gen1-gpio": for a generic R-Car Gen1 GPIO controller.
+ - "renesas,rcar-gen2-gpio": for a generic R-Car Gen2 or RZ/G1 GPIO controller.
+ - "renesas,rcar-gen3-gpio": for a generic R-Car Gen3 GPIO controller.
+--
+2.19.0
+
diff --git a/patches/0089-i2c-rcar-document-R8A77970-bindings.patch b/patches/0089-i2c-rcar-document-R8A77970-bindings.patch
new file mode 100644
index 0000000..b298efe
--- /dev/null
+++ b/patches/0089-i2c-rcar-document-R8A77970-bindings.patch
@@ -0,0 +1,34 @@
+From 325ddbfee76fc57d47acccce210370d67b622b43 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 13 Oct 2017 15:23:55 +0300
+Subject: [PATCH 0089/1795] i2c: rcar: document R8A77970 bindings
+
+R-Car V3M (R8A77970) SoC also has the R-Car gen3 compatible I2C controller,
+so document the SoC specific bindings.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit db6b78073ac135bb68cae77bb873371d0fe0efa6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/i2c/i2c-rcar.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
+index cad39aee9f73..a777477e4547 100644
+--- a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
++++ b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
+@@ -13,6 +13,7 @@ Required properties:
+ "renesas,i2c-r8a7794" if the device is a part of a R8A7794 SoC.
+ "renesas,i2c-r8a7795" if the device is a part of a R8A7795 SoC.
+ "renesas,i2c-r8a7796" if the device is a part of a R8A7796 SoC.
++ "renesas,i2c-r8a77970" if the device is a part of a R8A77970 SoC.
+ "renesas,rcar-gen1-i2c" for a generic R-Car Gen1 compatible device.
+ "renesas,rcar-gen2-i2c" for a generic R-Car Gen2 or RZ/G1 compatible
+ device.
+--
+2.19.0
+
diff --git a/patches/0090-i2c-riic-remove-clock-and-frequency-restrictions.patch b/patches/0090-i2c-riic-remove-clock-and-frequency-restrictions.patch
new file mode 100644
index 0000000..a798a13
--- /dev/null
+++ b/patches/0090-i2c-riic-remove-clock-and-frequency-restrictions.patch
@@ -0,0 +1,196 @@
+From 15da4a93a1cfb4a61cae50dcc0750c62e71a439d Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Fri, 27 Oct 2017 10:37:56 -0500
+Subject: [PATCH 0090/1795] i2c: riic: remove clock and frequency restrictions
+
+Remove the restriction that the parent clock has to be a specific frequency
+and also allow any speed to be supported.
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit d982d66514192cdbe74eababa63d0a69be4b0ce1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-riic.c | 115 ++++++++++++++++++++++++----------
+ 1 file changed, 81 insertions(+), 34 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c
+index c811af4c8d81..95c2f1ce3cad 100644
+--- a/drivers/i2c/busses/i2c-riic.c
++++ b/drivers/i2c/busses/i2c-riic.c
+@@ -84,12 +84,7 @@
+
+ #define ICSR2_NACKF 0x10
+
+-/* ICBRx (@ PCLK 33MHz) */
+ #define ICBR_RESERVED 0xe0 /* Should be 1 on writes */
+-#define ICBRL_SP100K (19 | ICBR_RESERVED)
+-#define ICBRH_SP100K (16 | ICBR_RESERVED)
+-#define ICBRL_SP400K (21 | ICBR_RESERVED)
+-#define ICBRH_SP400K (9 | ICBR_RESERVED)
+
+ #define RIIC_INIT_MSG -1
+
+@@ -288,48 +283,99 @@ static const struct i2c_algorithm riic_algo = {
+ .functionality = riic_func,
+ };
+
+-static int riic_init_hw(struct riic_dev *riic, u32 spd)
++static int riic_init_hw(struct riic_dev *riic, struct i2c_timings *t)
+ {
+ int ret;
+ unsigned long rate;
++ int total_ticks, cks, brl, brh;
+
+ ret = clk_prepare_enable(riic->clk);
+ if (ret)
+ return ret;
+
++ if (t->bus_freq_hz > 400000) {
++ dev_err(&riic->adapter.dev,
++ "unsupported bus speed (%dHz). 400000 max\n",
++ t->bus_freq_hz);
++ clk_disable_unprepare(riic->clk);
++ return -EINVAL;
++ }
++
++ rate = clk_get_rate(riic->clk);
++
+ /*
+- * TODO: Implement formula to calculate the timing values depending on
+- * variable parent clock rate and arbitrary bus speed
++ * Assume the default register settings:
++ * FER.SCLE = 1 (SCL sync circuit enabled, adds 2 or 3 cycles)
++ * FER.NFE = 1 (noise circuit enabled)
++ * MR3.NF = 0 (1 cycle of noise filtered out)
++ *
++ * Freq (CKS=000) = (I2CCLK + tr + tf)/ (BRH + 3 + 1) + (BRL + 3 + 1)
++ * Freq (CKS!=000) = (I2CCLK + tr + tf)/ (BRH + 2 + 1) + (BRL + 2 + 1)
+ */
+- rate = clk_get_rate(riic->clk);
+- if (rate != 33325000) {
+- dev_err(&riic->adapter.dev,
+- "invalid parent clk (%lu). Must be 33325000Hz\n", rate);
++
++ /*
++ * Determine reference clock rate. We must be able to get the desired
++ * frequency with only 62 clock ticks max (31 high, 31 low).
++ * Aim for a duty of 60% LOW, 40% HIGH.
++ */
++ total_ticks = DIV_ROUND_UP(rate, t->bus_freq_hz);
++
++ for (cks = 0; cks < 7; cks++) {
++ /*
++ * 60% low time must be less than BRL + 2 + 1
++ * BRL max register value is 0x1F.
++ */
++ brl = ((total_ticks * 6) / 10);
++ if (brl <= (0x1F + 3))
++ break;
++
++ total_ticks /= 2;
++ rate /= 2;
++ }
++
++ if (brl > (0x1F + 3)) {
++ dev_err(&riic->adapter.dev, "invalid speed (%lu). Too slow.\n",
++ (unsigned long)t->bus_freq_hz);
+ clk_disable_unprepare(riic->clk);
+ return -EINVAL;
+ }
+
++ brh = total_ticks - brl;
++
++ /* Remove automatic clock ticks for sync circuit and NF */
++ if (cks == 0) {
++ brl -= 4;
++ brh -= 4;
++ } else {
++ brl -= 3;
++ brh -= 3;
++ }
++
++ /*
++ * Remove clock ticks for rise and fall times. Convert ns to clock
++ * ticks.
++ */
++ brl -= t->scl_fall_ns / (1000000000 / rate);
++ brh -= t->scl_rise_ns / (1000000000 / rate);
++
++ /* Adjust for min register values for when SCLE=1 and NFE=1 */
++ if (brl < 1)
++ brl = 1;
++ if (brh < 1)
++ brh = 1;
++
++ pr_debug("i2c-riic: freq=%lu, duty=%d, fall=%lu, rise=%lu, cks=%d, brl=%d, brh=%d\n",
++ rate / total_ticks, ((brl + 3) * 100) / (brl + brh + 6),
++ t->scl_fall_ns / (1000000000 / rate),
++ t->scl_rise_ns / (1000000000 / rate), cks, brl, brh);
++
+ /* Changing the order of accessing IICRST and ICE may break things! */
+ writeb(ICCR1_IICRST | ICCR1_SOWP, riic->base + RIIC_ICCR1);
+ riic_clear_set_bit(riic, 0, ICCR1_ICE, RIIC_ICCR1);
+
+- switch (spd) {
+- case 100000:
+- writeb(ICMR1_CKS(3), riic->base + RIIC_ICMR1);
+- writeb(ICBRH_SP100K, riic->base + RIIC_ICBRH);
+- writeb(ICBRL_SP100K, riic->base + RIIC_ICBRL);
+- break;
+- case 400000:
+- writeb(ICMR1_CKS(1), riic->base + RIIC_ICMR1);
+- writeb(ICBRH_SP400K, riic->base + RIIC_ICBRH);
+- writeb(ICBRL_SP400K, riic->base + RIIC_ICBRL);
+- break;
+- default:
+- dev_err(&riic->adapter.dev,
+- "unsupported bus speed (%dHz). Use 100000 or 400000\n", spd);
+- clk_disable_unprepare(riic->clk);
+- return -EINVAL;
+- }
++ writeb(ICMR1_CKS(cks), riic->base + RIIC_ICMR1);
++ writeb(brh | ICBR_RESERVED, riic->base + RIIC_ICBRH);
++ writeb(brl | ICBR_RESERVED, riic->base + RIIC_ICBRL);
+
+ writeb(0, riic->base + RIIC_ICSER);
+ writeb(ICMR3_ACKWP | ICMR3_RDRFS, riic->base + RIIC_ICMR3);
+@@ -351,11 +397,10 @@ static struct riic_irq_desc riic_irqs[] = {
+
+ static int riic_i2c_probe(struct platform_device *pdev)
+ {
+- struct device_node *np = pdev->dev.of_node;
+ struct riic_dev *riic;
+ struct i2c_adapter *adap;
+ struct resource *res;
+- u32 bus_rate = 0;
++ struct i2c_timings i2c_t;
+ int i, ret;
+
+ riic = devm_kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL);
+@@ -396,8 +441,9 @@ static int riic_i2c_probe(struct platform_device *pdev)
+
+ init_completion(&riic->msg_done);
+
+- of_property_read_u32(np, "clock-frequency", &bus_rate);
+- ret = riic_init_hw(riic, bus_rate);
++ i2c_parse_fw_timings(&pdev->dev, &i2c_t, true);
++
++ ret = riic_init_hw(riic, &i2c_t);
+ if (ret)
+ return ret;
+
+@@ -408,7 +454,8 @@ static int riic_i2c_probe(struct platform_device *pdev)
+
+ platform_set_drvdata(pdev, riic);
+
+- dev_info(&pdev->dev, "registered with %dHz bus speed\n", bus_rate);
++ dev_info(&pdev->dev, "registered with %dHz bus speed\n",
++ i2c_t.bus_freq_hz);
+ return 0;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0091-i2c-sh_mobile-Use-of_device_get_match_data-helper.patch b/patches/0091-i2c-sh_mobile-Use-of_device_get_match_data-helper.patch
new file mode 100644
index 0000000..b9dfb25
--- /dev/null
+++ b/patches/0091-i2c-sh_mobile-Use-of_device_get_match_data-helper.patch
@@ -0,0 +1,47 @@
+From 57dce3e1f66ecd5c5429ea0746cfa7d369a3041b Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:17:05 +0200
+Subject: [PATCH 0091/1795] i2c: sh_mobile: Use of_device_get_match_data()
+ helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit ad59c5ea7fa88284b68721c08faf15f0e77abc0d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 8 +++-----
+ 1 file changed, 3 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 6f2aaeb7c4fa..c03acdf71397 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -881,7 +881,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ struct sh_mobile_i2c_data *pd;
+ struct i2c_adapter *adap;
+ struct resource *res;
+- const struct of_device_id *match;
++ const struct sh_mobile_dt_config *config;
+ int ret;
+ u32 bus_speed;
+
+@@ -913,10 +913,8 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ pd->bus_speed = ret ? STANDARD_MODE : bus_speed;
+ pd->clks_per_count = 1;
+
+- match = of_match_device(sh_mobile_i2c_dt_ids, &dev->dev);
+- if (match) {
+- const struct sh_mobile_dt_config *config = match->data;
+-
++ config = of_device_get_match_data(&dev->dev);
++ if (config) {
+ pd->clks_per_count = config->clks_per_count;
+
+ if (config->setup)
+--
+2.19.0
+
diff --git a/patches/0092-iommu-io-pgtable-arm-Convert-to-IOMMU-API-TLB-sync.patch b/patches/0092-iommu-io-pgtable-arm-Convert-to-IOMMU-API-TLB-sync.patch
new file mode 100644
index 0000000..eb948c1
--- /dev/null
+++ b/patches/0092-iommu-io-pgtable-arm-Convert-to-IOMMU-API-TLB-sync.patch
@@ -0,0 +1,182 @@
+From 3f621158aee6b5f054f52a56d58a6824e9fb8723 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Thu, 28 Sep 2017 15:55:01 +0100
+Subject: [PATCH 0092/1795] iommu/io-pgtable-arm: Convert to IOMMU API TLB sync
+
+Now that the core API issues its own post-unmap TLB sync call, push that
+operation out from the io-pgtable-arm internals into the users. For now,
+we leave the invalidation implicit in the unmap operation, since none of
+the current users would benefit much from any change to that.
+
+CC: Magnus Damm <damm+renesas@opensource.se>
+CC: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Joerg Roedel <jroedel@suse.de>
+(cherry picked from commit 32b124492bdf974f68eaef1bde80dc8058aef002)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/arm-smmu-v3.c | 10 ++++++++++
+ drivers/iommu/arm-smmu.c | 20 +++++++++++++++-----
+ drivers/iommu/io-pgtable-arm.c | 7 +------
+ drivers/iommu/ipmmu-vmsa.c | 10 ++++++++++
+ 4 files changed, 36 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
+index 8f7a3c00b6cf..193f8c860010 100644
+--- a/drivers/iommu/arm-smmu-v3.c
++++ b/drivers/iommu/arm-smmu-v3.c
+@@ -1752,6 +1752,14 @@ arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova, size_t size)
+ return ops->unmap(ops, iova, size);
+ }
+
++static void arm_smmu_iotlb_sync(struct iommu_domain *domain)
++{
++ struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu;
++
++ if (smmu)
++ __arm_smmu_tlb_sync(smmu);
++}
++
+ static phys_addr_t
+ arm_smmu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
+ {
+@@ -1972,6 +1980,8 @@ static struct iommu_ops arm_smmu_ops = {
+ .map = arm_smmu_map,
+ .unmap = arm_smmu_unmap,
+ .map_sg = default_iommu_map_sg,
++ .flush_iotlb_all = arm_smmu_iotlb_sync,
++ .iotlb_sync = arm_smmu_iotlb_sync,
+ .iova_to_phys = arm_smmu_iova_to_phys,
+ .add_device = arm_smmu_add_device,
+ .remove_device = arm_smmu_remove_device,
+diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
+index 2c436376f13e..335bcc18b97a 100644
+--- a/drivers/iommu/arm-smmu.c
++++ b/drivers/iommu/arm-smmu.c
+@@ -250,6 +250,7 @@ enum arm_smmu_domain_stage {
+ struct arm_smmu_domain {
+ struct arm_smmu_device *smmu;
+ struct io_pgtable_ops *pgtbl_ops;
++ const struct iommu_gather_ops *tlb_ops;
+ struct arm_smmu_cfg cfg;
+ enum arm_smmu_domain_stage stage;
+ struct mutex init_mutex; /* Protects smmu pointer */
+@@ -735,7 +736,6 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
+ enum io_pgtable_fmt fmt;
+ struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
+ struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
+- const struct iommu_gather_ops *tlb_ops;
+
+ mutex_lock(&smmu_domain->init_mutex);
+ if (smmu_domain->smmu)
+@@ -813,7 +813,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
+ ias = min(ias, 32UL);
+ oas = min(oas, 32UL);
+ }
+- tlb_ops = &arm_smmu_s1_tlb_ops;
++ smmu_domain->tlb_ops = &arm_smmu_s1_tlb_ops;
+ break;
+ case ARM_SMMU_DOMAIN_NESTED:
+ /*
+@@ -833,9 +833,9 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
+ oas = min(oas, 40UL);
+ }
+ if (smmu->version == ARM_SMMU_V2)
+- tlb_ops = &arm_smmu_s2_tlb_ops_v2;
++ smmu_domain->tlb_ops = &arm_smmu_s2_tlb_ops_v2;
+ else
+- tlb_ops = &arm_smmu_s2_tlb_ops_v1;
++ smmu_domain->tlb_ops = &arm_smmu_s2_tlb_ops_v1;
+ break;
+ default:
+ ret = -EINVAL;
+@@ -863,7 +863,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
+ .pgsize_bitmap = smmu->pgsize_bitmap,
+ .ias = ias,
+ .oas = oas,
+- .tlb = tlb_ops,
++ .tlb = smmu_domain->tlb_ops,
+ .iommu_dev = smmu->dev,
+ };
+
+@@ -1259,6 +1259,14 @@ static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
+ return ops->unmap(ops, iova, size);
+ }
+
++static void arm_smmu_iotlb_sync(struct iommu_domain *domain)
++{
++ struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
++
++ if (smmu_domain->tlb_ops)
++ smmu_domain->tlb_ops->tlb_sync(smmu_domain);
++}
++
+ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
+ dma_addr_t iova)
+ {
+@@ -1562,6 +1570,8 @@ static struct iommu_ops arm_smmu_ops = {
+ .map = arm_smmu_map,
+ .unmap = arm_smmu_unmap,
+ .map_sg = default_iommu_map_sg,
++ .flush_iotlb_all = arm_smmu_iotlb_sync,
++ .iotlb_sync = arm_smmu_iotlb_sync,
+ .iova_to_phys = arm_smmu_iova_to_phys,
+ .add_device = arm_smmu_add_device,
+ .remove_device = arm_smmu_remove_device,
+diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
+index e8018a308868..51e5c43caed1 100644
+--- a/drivers/iommu/io-pgtable-arm.c
++++ b/drivers/iommu/io-pgtable-arm.c
+@@ -609,7 +609,6 @@ static int __arm_lpae_unmap(struct arm_lpae_io_pgtable *data,
+ static int arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova,
+ size_t size)
+ {
+- size_t unmapped;
+ struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops);
+ arm_lpae_iopte *ptep = data->pgd;
+ int lvl = ARM_LPAE_START_LVL(data);
+@@ -617,11 +616,7 @@ static int arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova,
+ if (WARN_ON(iova >= (1ULL << data->iop.cfg.ias)))
+ return 0;
+
+- unmapped = __arm_lpae_unmap(data, iova, size, lvl, ptep);
+- if (unmapped)
+- io_pgtable_tlb_sync(&data->iop);
+-
+- return unmapped;
++ return __arm_lpae_unmap(data, iova, size, lvl, ptep);
+ }
+
+ static phys_addr_t arm_lpae_iova_to_phys(struct io_pgtable_ops *ops,
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 195d6e93ac71..af8140054273 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -619,6 +619,14 @@ static size_t ipmmu_unmap(struct iommu_domain *io_domain, unsigned long iova,
+ return domain->iop->unmap(domain->iop, iova, size);
+ }
+
++static void ipmmu_iotlb_sync(struct iommu_domain *io_domain)
++{
++ struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
++
++ if (domain->mmu)
++ ipmmu_tlb_flush_all(domain);
++}
++
+ static phys_addr_t ipmmu_iova_to_phys(struct iommu_domain *io_domain,
+ dma_addr_t iova)
+ {
+@@ -876,6 +884,8 @@ static const struct iommu_ops ipmmu_ops = {
+ .detach_dev = ipmmu_detach_device,
+ .map = ipmmu_map,
+ .unmap = ipmmu_unmap,
++ .flush_iotlb_all = ipmmu_iotlb_sync,
++ .iotlb_sync = ipmmu_iotlb_sync,
+ .map_sg = default_iommu_map_sg,
+ .iova_to_phys = ipmmu_iova_to_phys,
+ .add_device = ipmmu_add_device_dma,
+--
+2.19.0
+
diff --git a/patches/0093-dt-bindings-iommu-ipmmu-vmsa-Use-generic-node-name.patch b/patches/0093-dt-bindings-iommu-ipmmu-vmsa-Use-generic-node-name.patch
new file mode 100644
index 0000000..22680c8
--- /dev/null
+++ b/patches/0093-dt-bindings-iommu-ipmmu-vmsa-Use-generic-node-name.patch
@@ -0,0 +1,34 @@
+From 7bfb70fd780532b9f9cf256db6d8f01dfb106e2f Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:33:08 +0200
+Subject: [PATCH 0093/1795] dt-bindings: iommu: ipmmu-vmsa: Use generic node
+ name
+
+Use the preferred generic node name in the example.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit d67ac3ae3a3ce464b4fec854c4c85407a99e8e2c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
+index 3ed027cfca95..857df929a654 100644
+--- a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
++++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
+@@ -53,7 +53,7 @@ Example: R8A7791 IPMMU-MX and VSP1-D0 bus master
+ #iommu-cells = <1>;
+ };
+
+- vsp1@fe928000 {
++ vsp@fe928000 {
+ ...
+ iommus = <&ipmmu_mx 13>;
+ ...
+--
+2.19.0
+
diff --git a/patches/0094-iommu-ipmmu-vmsa-Fix-return-value-check-in-ipmmu_fin.patch b/patches/0094-iommu-ipmmu-vmsa-Fix-return-value-check-in-ipmmu_fin.patch
new file mode 100644
index 0000000..d480ccb
--- /dev/null
+++ b/patches/0094-iommu-ipmmu-vmsa-Fix-return-value-check-in-ipmmu_fin.patch
@@ -0,0 +1,36 @@
+From 3c12fd8faabdd37bb5ce9f1b475f86b88e37d268 Mon Sep 17 00:00:00 2001
+From: "weiyongjun (A)" <weiyongjun1@huawei.com>
+Date: Tue, 17 Oct 2017 12:11:22 +0000
+Subject: [PATCH 0094/1795] iommu/ipmmu-vmsa: Fix return value check in
+ ipmmu_find_group_dma()
+
+In case of error, the function iommu_group_get() returns NULL pointer
+not ERR_PTR(). The IS_ERR() test in the return value check should be
+replaced with NULL test.
+
+Fixes: 3ae47292024f ("iommu/ipmmu-vmsa: Add new IOMMU_DOMAIN_DMA ops")
+Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 105a004e2187609a74f75d55fd0f9a054b49d60a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index af8140054273..00e88a88ee3a 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -871,7 +871,7 @@ static struct iommu_group *ipmmu_find_group_dma(struct device *dev)
+ sibling = ipmmu_find_sibling_device(dev);
+ if (sibling)
+ group = iommu_group_get(sibling);
+- if (!sibling || IS_ERR(group))
++ if (!sibling || !group)
+ group = generic_device_group(dev);
+
+ return group;
+--
+2.19.0
+
diff --git a/patches/0095-iommu-ipmmu-vmsa-Unify-domain-alloc-free.patch b/patches/0095-iommu-ipmmu-vmsa-Unify-domain-alloc-free.patch
new file mode 100644
index 0000000..4223713
--- /dev/null
+++ b/patches/0095-iommu-ipmmu-vmsa-Unify-domain-alloc-free.patch
@@ -0,0 +1,131 @@
+From d8005d5db3a8438883a970ac10b651cd269147b7 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Fri, 13 Oct 2017 19:23:39 +0100
+Subject: [PATCH 0095/1795] iommu/ipmmu-vmsa: Unify domain alloc/free
+
+We have two implementations for ipmmu_ops->alloc depending on
+CONFIG_IOMMU_DMA, the difference being whether they accept the
+IOMMU_DOMAIN_DMA type or not. However, iommu_dma_get_cookie() is
+guaranteed to return an error when !CONFIG_IOMMU_DMA, so if
+ipmmu_domain_alloc_dma() was actually checking and handling the return
+value correctly, it would behave the same as ipmmu_domain_alloc()
+anyway.
+
+Similarly for freeing; iommu_put_dma_cookie() is robust by design.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 1c7e7c0278df968221a5edb1a293423e13b13814)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 65 ++++++++++++++------------------------
+ 1 file changed, 24 insertions(+), 41 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 00e88a88ee3a..37154075c00a 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -528,6 +528,27 @@ static struct iommu_domain *__ipmmu_domain_alloc(unsigned type)
+ return &domain->io_domain;
+ }
+
++static struct iommu_domain *ipmmu_domain_alloc(unsigned type)
++{
++ struct iommu_domain *io_domain = NULL;
++
++ switch (type) {
++ case IOMMU_DOMAIN_UNMANAGED:
++ io_domain = __ipmmu_domain_alloc(type);
++ break;
++
++ case IOMMU_DOMAIN_DMA:
++ io_domain = __ipmmu_domain_alloc(type);
++ if (io_domain && iommu_get_dma_cookie(io_domain)) {
++ kfree(io_domain);
++ io_domain = NULL;
++ }
++ break;
++ }
++
++ return io_domain;
++}
++
+ static void ipmmu_domain_free(struct iommu_domain *io_domain)
+ {
+ struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
+@@ -536,6 +557,7 @@ static void ipmmu_domain_free(struct iommu_domain *io_domain)
+ * Free the domain resources. We assume that all devices have already
+ * been detached.
+ */
++ iommu_put_dma_cookie(io_domain);
+ ipmmu_domain_destroy_context(domain);
+ free_io_pgtable_ops(domain->iop);
+ kfree(domain);
+@@ -671,14 +693,6 @@ static int ipmmu_of_xlate(struct device *dev,
+
+ #if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+
+-static struct iommu_domain *ipmmu_domain_alloc(unsigned type)
+-{
+- if (type != IOMMU_DOMAIN_UNMANAGED)
+- return NULL;
+-
+- return __ipmmu_domain_alloc(type);
+-}
+-
+ static int ipmmu_add_device(struct device *dev)
+ {
+ struct ipmmu_vmsa_device *mmu = NULL;
+@@ -779,37 +793,6 @@ static const struct iommu_ops ipmmu_ops = {
+ static DEFINE_SPINLOCK(ipmmu_slave_devices_lock);
+ static LIST_HEAD(ipmmu_slave_devices);
+
+-static struct iommu_domain *ipmmu_domain_alloc_dma(unsigned type)
+-{
+- struct iommu_domain *io_domain = NULL;
+-
+- switch (type) {
+- case IOMMU_DOMAIN_UNMANAGED:
+- io_domain = __ipmmu_domain_alloc(type);
+- break;
+-
+- case IOMMU_DOMAIN_DMA:
+- io_domain = __ipmmu_domain_alloc(type);
+- if (io_domain)
+- iommu_get_dma_cookie(io_domain);
+- break;
+- }
+-
+- return io_domain;
+-}
+-
+-static void ipmmu_domain_free_dma(struct iommu_domain *io_domain)
+-{
+- switch (io_domain->type) {
+- case IOMMU_DOMAIN_DMA:
+- iommu_put_dma_cookie(io_domain);
+- /* fall-through */
+- default:
+- ipmmu_domain_free(io_domain);
+- break;
+- }
+-}
+-
+ static int ipmmu_add_device_dma(struct device *dev)
+ {
+ struct iommu_group *group;
+@@ -878,8 +861,8 @@ static struct iommu_group *ipmmu_find_group_dma(struct device *dev)
+ }
+
+ static const struct iommu_ops ipmmu_ops = {
+- .domain_alloc = ipmmu_domain_alloc_dma,
+- .domain_free = ipmmu_domain_free_dma,
++ .domain_alloc = ipmmu_domain_alloc,
++ .domain_free = ipmmu_domain_free,
+ .attach_dev = ipmmu_attach_device,
+ .detach_dev = ipmmu_detach_device,
+ .map = ipmmu_map,
+--
+2.19.0
+
diff --git a/patches/0096-iommu-ipmmu-vmsa-Simplify-group-allocation.patch b/patches/0096-iommu-ipmmu-vmsa-Simplify-group-allocation.patch
new file mode 100644
index 0000000..5ce044f
--- /dev/null
+++ b/patches/0096-iommu-ipmmu-vmsa-Simplify-group-allocation.patch
@@ -0,0 +1,135 @@
+From e6378f334e411675a80aaa4cbea7ee5c9309d1a9 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Fri, 13 Oct 2017 19:23:40 +0100
+Subject: [PATCH 0096/1795] iommu/ipmmu-vmsa: Simplify group allocation
+
+We go through quite the merry dance in order to find masters behind the
+same IPMMU instance, so that we can ensure they are grouped together.
+None of which is really necessary, since the master's private data
+already points to the particular IPMMU it is associated with, and that
+IPMMU instance data is the perfect place to keep track of a per-instance
+group directly.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit b354c73edc7eb8d6ee643866e9e4de7842213b06)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 53 +++++++-------------------------------
+ 1 file changed, 9 insertions(+), 44 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 37154075c00a..6e6a86f3c375 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -43,6 +43,7 @@ struct ipmmu_vmsa_device {
+ DECLARE_BITMAP(ctx, IPMMU_CTX_MAX);
+ struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX];
+
++ struct iommu_group *group;
+ struct dma_iommu_mapping *mapping;
+ };
+
+@@ -59,8 +60,6 @@ struct ipmmu_vmsa_domain {
+
+ struct ipmmu_vmsa_iommu_priv {
+ struct ipmmu_vmsa_device *mmu;
+- struct device *dev;
+- struct list_head list;
+ };
+
+ static struct ipmmu_vmsa_domain *to_vmsa_domain(struct iommu_domain *dom)
+@@ -674,7 +673,6 @@ static int ipmmu_init_platform_device(struct device *dev,
+ return -ENOMEM;
+
+ priv->mmu = platform_get_drvdata(ipmmu_pdev);
+- priv->dev = dev;
+ dev->iommu_fwspec->iommu_priv = priv;
+ return 0;
+ }
+@@ -790,9 +788,6 @@ static const struct iommu_ops ipmmu_ops = {
+
+ #ifdef CONFIG_IOMMU_DMA
+
+-static DEFINE_SPINLOCK(ipmmu_slave_devices_lock);
+-static LIST_HEAD(ipmmu_slave_devices);
+-
+ static int ipmmu_add_device_dma(struct device *dev)
+ {
+ struct iommu_group *group;
+@@ -807,55 +802,25 @@ static int ipmmu_add_device_dma(struct device *dev)
+ if (IS_ERR(group))
+ return PTR_ERR(group);
+
+- spin_lock(&ipmmu_slave_devices_lock);
+- list_add(&to_priv(dev)->list, &ipmmu_slave_devices);
+- spin_unlock(&ipmmu_slave_devices_lock);
+ return 0;
+ }
+
+ static void ipmmu_remove_device_dma(struct device *dev)
+ {
+- struct ipmmu_vmsa_iommu_priv *priv = to_priv(dev);
+-
+- spin_lock(&ipmmu_slave_devices_lock);
+- list_del(&priv->list);
+- spin_unlock(&ipmmu_slave_devices_lock);
+-
+ iommu_group_remove_device(dev);
+ }
+
+-static struct device *ipmmu_find_sibling_device(struct device *dev)
++static struct iommu_group *ipmmu_find_group(struct device *dev)
+ {
+ struct ipmmu_vmsa_iommu_priv *priv = to_priv(dev);
+- struct ipmmu_vmsa_iommu_priv *sibling_priv = NULL;
+- bool found = false;
+-
+- spin_lock(&ipmmu_slave_devices_lock);
+-
+- list_for_each_entry(sibling_priv, &ipmmu_slave_devices, list) {
+- if (priv == sibling_priv)
+- continue;
+- if (sibling_priv->mmu == priv->mmu) {
+- found = true;
+- break;
+- }
+- }
+-
+- spin_unlock(&ipmmu_slave_devices_lock);
+-
+- return found ? sibling_priv->dev : NULL;
+-}
+-
+-static struct iommu_group *ipmmu_find_group_dma(struct device *dev)
+-{
+ struct iommu_group *group;
+- struct device *sibling;
+
+- sibling = ipmmu_find_sibling_device(dev);
+- if (sibling)
+- group = iommu_group_get(sibling);
+- if (!sibling || !group)
+- group = generic_device_group(dev);
++ if (priv->mmu->group)
++ return iommu_group_ref_get(priv->mmu->group);
++
++ group = iommu_group_alloc();
++ if (!IS_ERR(group))
++ priv->mmu->group = group;
+
+ return group;
+ }
+@@ -873,7 +838,7 @@ static const struct iommu_ops ipmmu_ops = {
+ .iova_to_phys = ipmmu_iova_to_phys,
+ .add_device = ipmmu_add_device_dma,
+ .remove_device = ipmmu_remove_device_dma,
+- .device_group = ipmmu_find_group_dma,
++ .device_group = ipmmu_find_group,
+ .pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K,
+ .of_xlate = ipmmu_of_xlate,
+ };
+--
+2.19.0
+
diff --git a/patches/0097-iommu-ipmmu-vmsa-Clean-up-struct-ipmmu_vmsa_iommu_pr.patch b/patches/0097-iommu-ipmmu-vmsa-Clean-up-struct-ipmmu_vmsa_iommu_pr.patch
new file mode 100644
index 0000000..dbac6fc
--- /dev/null
+++ b/patches/0097-iommu-ipmmu-vmsa-Clean-up-struct-ipmmu_vmsa_iommu_pr.patch
@@ -0,0 +1,145 @@
+From 90d20f74d386ac9881000b6f9d7e2a3088ca41e6 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Fri, 13 Oct 2017 19:23:41 +0100
+Subject: [PATCH 0097/1795] iommu/ipmmu-vmsa: Clean up struct
+ ipmmu_vmsa_iommu_priv
+
+Now that the IPMMU instance pointer is the only thing remaining in the
+private data structure, we no longer need the extra level of indirection
+and can simply stash that directlty in the fwspec.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit e4efe4a9a2ace658a36b5a4f515c11d4d36400a8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 36 ++++++++++++------------------------
+ 1 file changed, 12 insertions(+), 24 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 6e6a86f3c375..fd05a5f5a47e 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -58,16 +58,12 @@ struct ipmmu_vmsa_domain {
+ spinlock_t lock; /* Protects mappings */
+ };
+
+-struct ipmmu_vmsa_iommu_priv {
+- struct ipmmu_vmsa_device *mmu;
+-};
+-
+ static struct ipmmu_vmsa_domain *to_vmsa_domain(struct iommu_domain *dom)
+ {
+ return container_of(dom, struct ipmmu_vmsa_domain, io_domain);
+ }
+
+-static struct ipmmu_vmsa_iommu_priv *to_priv(struct device *dev)
++static struct ipmmu_vmsa_device *to_ipmmu(struct device *dev)
+ {
+ return dev->iommu_fwspec ? dev->iommu_fwspec->iommu_priv : NULL;
+ }
+@@ -565,15 +561,14 @@ static void ipmmu_domain_free(struct iommu_domain *io_domain)
+ static int ipmmu_attach_device(struct iommu_domain *io_domain,
+ struct device *dev)
+ {
+- struct ipmmu_vmsa_iommu_priv *priv = to_priv(dev);
+ struct iommu_fwspec *fwspec = dev->iommu_fwspec;
+- struct ipmmu_vmsa_device *mmu = priv->mmu;
++ struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
+ struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
+ unsigned long flags;
+ unsigned int i;
+ int ret = 0;
+
+- if (!priv || !priv->mmu) {
++ if (!mmu) {
+ dev_err(dev, "Cannot attach to IPMMU\n");
+ return -ENXIO;
+ }
+@@ -662,18 +657,12 @@ static int ipmmu_init_platform_device(struct device *dev,
+ struct of_phandle_args *args)
+ {
+ struct platform_device *ipmmu_pdev;
+- struct ipmmu_vmsa_iommu_priv *priv;
+
+ ipmmu_pdev = of_find_device_by_node(args->np);
+ if (!ipmmu_pdev)
+ return -ENODEV;
+
+- priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+- if (!priv)
+- return -ENOMEM;
+-
+- priv->mmu = platform_get_drvdata(ipmmu_pdev);
+- dev->iommu_fwspec->iommu_priv = priv;
++ dev->iommu_fwspec->iommu_priv = platform_get_drvdata(ipmmu_pdev);
+ return 0;
+ }
+
+@@ -683,7 +672,7 @@ static int ipmmu_of_xlate(struct device *dev,
+ iommu_fwspec_add_ids(dev, spec->args, 1);
+
+ /* Initialize once - xlate() will call multiple times */
+- if (to_priv(dev))
++ if (to_ipmmu(dev))
+ return 0;
+
+ return ipmmu_init_platform_device(dev, spec);
+@@ -693,14 +682,14 @@ static int ipmmu_of_xlate(struct device *dev,
+
+ static int ipmmu_add_device(struct device *dev)
+ {
+- struct ipmmu_vmsa_device *mmu = NULL;
++ struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
+ struct iommu_group *group;
+ int ret;
+
+ /*
+ * Only let through devices that have been verified in xlate()
+ */
+- if (!to_priv(dev))
++ if (!mmu)
+ return -ENODEV;
+
+ /* Create a device group and add the device to it. */
+@@ -729,7 +718,6 @@ static int ipmmu_add_device(struct device *dev)
+ * - Make the mapping size configurable ? We currently use a 2GB mapping
+ * at a 1GB offset to ensure that NULL VAs will fault.
+ */
+- mmu = to_priv(dev)->mmu;
+ if (!mmu->mapping) {
+ struct dma_iommu_mapping *mapping;
+
+@@ -795,7 +783,7 @@ static int ipmmu_add_device_dma(struct device *dev)
+ /*
+ * Only let through devices that have been verified in xlate()
+ */
+- if (!to_priv(dev))
++ if (!to_ipmmu(dev))
+ return -ENODEV;
+
+ group = iommu_group_get_for_dev(dev);
+@@ -812,15 +800,15 @@ static void ipmmu_remove_device_dma(struct device *dev)
+
+ static struct iommu_group *ipmmu_find_group(struct device *dev)
+ {
+- struct ipmmu_vmsa_iommu_priv *priv = to_priv(dev);
++ struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
+ struct iommu_group *group;
+
+- if (priv->mmu->group)
+- return iommu_group_ref_get(priv->mmu->group);
++ if (mmu->group)
++ return iommu_group_ref_get(mmu->group);
+
+ group = iommu_group_alloc();
+ if (!IS_ERR(group))
+- priv->mmu->group = group;
++ mmu->group = group;
+
+ return group;
+ }
+--
+2.19.0
+
diff --git a/patches/0098-iommu-ipmmu-vmsa-Unify-ipmmu_ops.patch b/patches/0098-iommu-ipmmu-vmsa-Unify-ipmmu_ops.patch
new file mode 100644
index 0000000..4a3c1b0
--- /dev/null
+++ b/patches/0098-iommu-ipmmu-vmsa-Unify-ipmmu_ops.patch
@@ -0,0 +1,173 @@
+From fb81bdcd8c1d96edb0bce62324c06dc90aa36b36 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Fri, 13 Oct 2017 19:23:42 +0100
+Subject: [PATCH 0098/1795] iommu/ipmmu-vmsa: Unify ipmmu_ops
+
+The remaining difference between the ARM-specific and iommu-dma ops is
+in the {add,remove}_device implementations, but even those have some
+overlap and duplication. By stubbing out the few arm_iommu_*() calls,
+we can get rid of the rest of the inline #ifdeffery to both simplify the
+code and improve build coverage.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 49c875f030523d676a508e53f7dc3e592e9439d7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 69 +++++++++++---------------------------
+ 1 file changed, 19 insertions(+), 50 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index fd05a5f5a47e..f6d2e8e650be 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -27,6 +27,11 @@
+ #if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+ #include <asm/dma-iommu.h>
+ #include <asm/pgalloc.h>
++#else
++#define arm_iommu_create_mapping(...) NULL
++#define arm_iommu_attach_device(...) -ENODEV
++#define arm_iommu_release_mapping(...) do {} while (0)
++#define arm_iommu_detach_device(...) do {} while (0)
+ #endif
+
+ #include "io-pgtable.h"
+@@ -678,26 +683,17 @@ static int ipmmu_of_xlate(struct device *dev,
+ return ipmmu_init_platform_device(dev, spec);
+ }
+
+-#if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+-
+-static int ipmmu_add_device(struct device *dev)
++static int ipmmu_init_arm_mapping(struct device *dev)
+ {
+ struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
+ struct iommu_group *group;
+ int ret;
+
+- /*
+- * Only let through devices that have been verified in xlate()
+- */
+- if (!mmu)
+- return -ENODEV;
+-
+ /* Create a device group and add the device to it. */
+ group = iommu_group_alloc();
+ if (IS_ERR(group)) {
+ dev_err(dev, "Failed to allocate IOMMU group\n");
+- ret = PTR_ERR(group);
+- goto error;
++ return PTR_ERR(group);
+ }
+
+ ret = iommu_group_add_device(group, dev);
+@@ -705,8 +701,7 @@ static int ipmmu_add_device(struct device *dev)
+
+ if (ret < 0) {
+ dev_err(dev, "Failed to add device to IPMMU group\n");
+- group = NULL;
+- goto error;
++ return ret;
+ }
+
+ /*
+@@ -742,41 +737,14 @@ static int ipmmu_add_device(struct device *dev)
+ return 0;
+
+ error:
+- if (mmu)
++ iommu_group_remove_device(dev);
++ if (mmu->mapping)
+ arm_iommu_release_mapping(mmu->mapping);
+
+- if (!IS_ERR_OR_NULL(group))
+- iommu_group_remove_device(dev);
+-
+ return ret;
+ }
+
+-static void ipmmu_remove_device(struct device *dev)
+-{
+- arm_iommu_detach_device(dev);
+- iommu_group_remove_device(dev);
+-}
+-
+-static const struct iommu_ops ipmmu_ops = {
+- .domain_alloc = ipmmu_domain_alloc,
+- .domain_free = ipmmu_domain_free,
+- .attach_dev = ipmmu_attach_device,
+- .detach_dev = ipmmu_detach_device,
+- .map = ipmmu_map,
+- .unmap = ipmmu_unmap,
+- .map_sg = default_iommu_map_sg,
+- .iova_to_phys = ipmmu_iova_to_phys,
+- .add_device = ipmmu_add_device,
+- .remove_device = ipmmu_remove_device,
+- .pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K,
+- .of_xlate = ipmmu_of_xlate,
+-};
+-
+-#endif /* !CONFIG_ARM && CONFIG_IOMMU_DMA */
+-
+-#ifdef CONFIG_IOMMU_DMA
+-
+-static int ipmmu_add_device_dma(struct device *dev)
++static int ipmmu_add_device(struct device *dev)
+ {
+ struct iommu_group *group;
+
+@@ -786,15 +754,20 @@ static int ipmmu_add_device_dma(struct device *dev)
+ if (!to_ipmmu(dev))
+ return -ENODEV;
+
++ if (IS_ENABLED(CONFIG_ARM) && !IS_ENABLED(CONFIG_IOMMU_DMA))
++ return ipmmu_init_arm_mapping(dev);
++
+ group = iommu_group_get_for_dev(dev);
+ if (IS_ERR(group))
+ return PTR_ERR(group);
+
++ iommu_group_put(group);
+ return 0;
+ }
+
+-static void ipmmu_remove_device_dma(struct device *dev)
++static void ipmmu_remove_device(struct device *dev)
+ {
++ arm_iommu_detach_device(dev);
+ iommu_group_remove_device(dev);
+ }
+
+@@ -824,15 +797,13 @@ static const struct iommu_ops ipmmu_ops = {
+ .iotlb_sync = ipmmu_iotlb_sync,
+ .map_sg = default_iommu_map_sg,
+ .iova_to_phys = ipmmu_iova_to_phys,
+- .add_device = ipmmu_add_device_dma,
+- .remove_device = ipmmu_remove_device_dma,
++ .add_device = ipmmu_add_device,
++ .remove_device = ipmmu_remove_device,
+ .device_group = ipmmu_find_group,
+ .pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K,
+ .of_xlate = ipmmu_of_xlate,
+ };
+
+-#endif /* CONFIG_IOMMU_DMA */
+-
+ /* -----------------------------------------------------------------------------
+ * Probe/remove and init
+ */
+@@ -929,9 +900,7 @@ static int ipmmu_remove(struct platform_device *pdev)
+ iommu_device_sysfs_remove(&mmu->iommu);
+ iommu_device_unregister(&mmu->iommu);
+
+-#if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+ arm_iommu_release_mapping(mmu->mapping);
+-#endif
+
+ ipmmu_device_reset(mmu);
+
+--
+2.19.0
+
diff --git a/patches/0099-iommu-ipmmu-vmsa-Introduce-features-break-out-alias.patch b/patches/0099-iommu-ipmmu-vmsa-Introduce-features-break-out-alias.patch
new file mode 100644
index 0000000..63521f8
--- /dev/null
+++ b/patches/0099-iommu-ipmmu-vmsa-Introduce-features-break-out-alias.patch
@@ -0,0 +1,105 @@
+From 5a02eb587adad058b3538ff9c9464a972a14cc92 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:29:25 +0900
+Subject: [PATCH 0099/1795] iommu/ipmmu-vmsa: Introduce features, break out
+ alias
+
+Introduce struct ipmmu_features to track various hardware
+and software implementation changes inside the driver for
+different kinds of IPMMU hardware. Add use_ns_alias_offset
+as a first example of a feature to control if the secure
+register bank offset should be used or not.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 33f3ac9b511612153bae1d328b0c84c0367cd08d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 31 ++++++++++++++++++++++++-------
+ 1 file changed, 24 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index f6d2e8e650be..5ce7879cb58d 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -19,6 +19,7 @@
+ #include <linux/iommu.h>
+ #include <linux/module.h>
+ #include <linux/of.h>
++#include <linux/of_device.h>
+ #include <linux/of_platform.h>
+ #include <linux/platform_device.h>
+ #include <linux/sizes.h>
+@@ -38,11 +39,15 @@
+
+ #define IPMMU_CTX_MAX 1
+
++struct ipmmu_features {
++ bool use_ns_alias_offset;
++};
++
+ struct ipmmu_vmsa_device {
+ struct device *dev;
+ void __iomem *base;
+ struct iommu_device iommu;
+-
++ const struct ipmmu_features *features;
+ unsigned int num_utlbs;
+ spinlock_t lock; /* Protects ctx and domains[] */
+ DECLARE_BITMAP(ctx, IPMMU_CTX_MAX);
+@@ -817,6 +822,21 @@ static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu)
+ ipmmu_write(mmu, i * IM_CTX_SIZE + IMCTR, 0);
+ }
+
++static const struct ipmmu_features ipmmu_features_default = {
++ .use_ns_alias_offset = true,
++};
++
++static const struct of_device_id ipmmu_of_ids[] = {
++ {
++ .compatible = "renesas,ipmmu-vmsa",
++ .data = &ipmmu_features_default,
++ }, {
++ /* Terminator */
++ },
++};
++
++MODULE_DEVICE_TABLE(of, ipmmu_of_ids);
++
+ static int ipmmu_probe(struct platform_device *pdev)
+ {
+ struct ipmmu_vmsa_device *mmu;
+@@ -834,6 +854,7 @@ static int ipmmu_probe(struct platform_device *pdev)
+ mmu->num_utlbs = 32;
+ spin_lock_init(&mmu->lock);
+ bitmap_zero(mmu->ctx, IPMMU_CTX_MAX);
++ mmu->features = of_device_get_match_data(&pdev->dev);
+
+ /* Map I/O memory and request IRQ. */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+@@ -853,7 +874,8 @@ static int ipmmu_probe(struct platform_device *pdev)
+ * Offset the registers base unconditionally to point to the non-secure
+ * alias space for now.
+ */
+- mmu->base += IM_NS_ALIAS_OFFSET;
++ if (mmu->features->use_ns_alias_offset)
++ mmu->base += IM_NS_ALIAS_OFFSET;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+@@ -907,11 +929,6 @@ static int ipmmu_remove(struct platform_device *pdev)
+ return 0;
+ }
+
+-static const struct of_device_id ipmmu_of_ids[] = {
+- { .compatible = "renesas,ipmmu-vmsa", },
+- { }
+-};
+-
+ static struct platform_driver ipmmu_driver = {
+ .driver = {
+ .name = "ipmmu-vmsa",
+--
+2.19.0
+
diff --git a/patches/0100-iommu-ipmmu-vmsa-Add-optional-root-device-feature.patch b/patches/0100-iommu-ipmmu-vmsa-Add-optional-root-device-feature.patch
new file mode 100644
index 0000000..d0fe7fe
--- /dev/null
+++ b/patches/0100-iommu-ipmmu-vmsa-Add-optional-root-device-feature.patch
@@ -0,0 +1,189 @@
+From 943e6dd529212c6868cdb032f982ab824e6aceab Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:29:36 +0900
+Subject: [PATCH 0100/1795] iommu/ipmmu-vmsa: Add optional root device feature
+
+Add root device handling to the IPMMU driver by allowing certain
+DT compat strings to enable has_cache_leaf_nodes that in turn will
+support both root devices with interrupts and leaf devices that
+face the actual IPMMU consumer devices.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit fd5140e29a59e04a6c3e8cc56536bda3e60bbf49)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 90 +++++++++++++++++++++++++++++++-------
+ 1 file changed, 73 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 5ce7879cb58d..5db853b92d3b 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -41,12 +41,14 @@
+
+ struct ipmmu_features {
+ bool use_ns_alias_offset;
++ bool has_cache_leaf_nodes;
+ };
+
+ struct ipmmu_vmsa_device {
+ struct device *dev;
+ void __iomem *base;
+ struct iommu_device iommu;
++ struct ipmmu_vmsa_device *root;
+ const struct ipmmu_features *features;
+ unsigned int num_utlbs;
+ spinlock_t lock; /* Protects ctx and domains[] */
+@@ -198,6 +200,36 @@ static struct ipmmu_vmsa_device *to_ipmmu(struct device *dev)
+ #define IMUASID_ASID0_MASK (0xff << 0)
+ #define IMUASID_ASID0_SHIFT 0
+
++/* -----------------------------------------------------------------------------
++ * Root device handling
++ */
++
++static struct platform_driver ipmmu_driver;
++
++static bool ipmmu_is_root(struct ipmmu_vmsa_device *mmu)
++{
++ return mmu->root == mmu;
++}
++
++static int __ipmmu_check_device(struct device *dev, void *data)
++{
++ struct ipmmu_vmsa_device *mmu = dev_get_drvdata(dev);
++ struct ipmmu_vmsa_device **rootp = data;
++
++ if (ipmmu_is_root(mmu))
++ *rootp = mmu;
++
++ return 0;
++}
++
++static struct ipmmu_vmsa_device *ipmmu_find_root(void)
++{
++ struct ipmmu_vmsa_device *root = NULL;
++
++ return driver_for_each_device(&ipmmu_driver.driver, NULL, &root,
++ __ipmmu_check_device) == 0 ? root : NULL;
++}
++
+ /* -----------------------------------------------------------------------------
+ * Read/Write Access
+ */
+@@ -215,13 +247,15 @@ static void ipmmu_write(struct ipmmu_vmsa_device *mmu, unsigned int offset,
+
+ static u32 ipmmu_ctx_read(struct ipmmu_vmsa_domain *domain, unsigned int reg)
+ {
+- return ipmmu_read(domain->mmu, domain->context_id * IM_CTX_SIZE + reg);
++ return ipmmu_read(domain->mmu->root,
++ domain->context_id * IM_CTX_SIZE + reg);
+ }
+
+ static void ipmmu_ctx_write(struct ipmmu_vmsa_domain *domain, unsigned int reg,
+ u32 data)
+ {
+- ipmmu_write(domain->mmu, domain->context_id * IM_CTX_SIZE + reg, data);
++ ipmmu_write(domain->mmu->root,
++ domain->context_id * IM_CTX_SIZE + reg, data);
+ }
+
+ /* -----------------------------------------------------------------------------
+@@ -369,12 +403,12 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ * TODO: Add support for coherent walk through CCI with DVM and remove
+ * cache handling. For now, delegate it to the io-pgtable code.
+ */
+- domain->cfg.iommu_dev = domain->mmu->dev;
++ domain->cfg.iommu_dev = domain->mmu->root->dev;
+
+ /*
+ * Find an unused context.
+ */
+- ret = ipmmu_domain_allocate_context(domain->mmu, domain);
++ ret = ipmmu_domain_allocate_context(domain->mmu->root, domain);
+ if (ret == IPMMU_CTX_MAX)
+ return -EBUSY;
+
+@@ -383,7 +417,8 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ domain->iop = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &domain->cfg,
+ domain);
+ if (!domain->iop) {
+- ipmmu_domain_free_context(domain->mmu, domain->context_id);
++ ipmmu_domain_free_context(domain->mmu->root,
++ domain->context_id);
+ return -EINVAL;
+ }
+
+@@ -437,7 +472,7 @@ static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain)
+ */
+ ipmmu_ctx_write(domain, IMCTR, IMCTR_FLUSH);
+ ipmmu_tlb_sync(domain);
+- ipmmu_domain_free_context(domain->mmu, domain->context_id);
++ ipmmu_domain_free_context(domain->mmu->root, domain->context_id);
+ }
+
+ /* -----------------------------------------------------------------------------
+@@ -824,6 +859,7 @@ static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu)
+
+ static const struct ipmmu_features ipmmu_features_default = {
+ .use_ns_alias_offset = true,
++ .has_cache_leaf_nodes = false,
+ };
+
+ static const struct of_device_id ipmmu_of_ids[] = {
+@@ -878,19 +914,39 @@ static int ipmmu_probe(struct platform_device *pdev)
+ mmu->base += IM_NS_ALIAS_OFFSET;
+
+ irq = platform_get_irq(pdev, 0);
+- if (irq < 0) {
+- dev_err(&pdev->dev, "no IRQ found\n");
+- return irq;
+- }
+
+- ret = devm_request_irq(&pdev->dev, irq, ipmmu_irq, 0,
+- dev_name(&pdev->dev), mmu);
+- if (ret < 0) {
+- dev_err(&pdev->dev, "failed to request IRQ %d\n", irq);
+- return ret;
+- }
++ /*
++ * Determine if this IPMMU instance is a root device by checking for
++ * the lack of has_cache_leaf_nodes flag or renesas,ipmmu-main property.
++ */
++ if (!mmu->features->has_cache_leaf_nodes ||
++ !of_find_property(pdev->dev.of_node, "renesas,ipmmu-main", NULL))
++ mmu->root = mmu;
++ else
++ mmu->root = ipmmu_find_root();
+
+- ipmmu_device_reset(mmu);
++ /*
++ * Wait until the root device has been registered for sure.
++ */
++ if (!mmu->root)
++ return -EPROBE_DEFER;
++
++ /* Root devices have mandatory IRQs */
++ if (ipmmu_is_root(mmu)) {
++ if (irq < 0) {
++ dev_err(&pdev->dev, "no IRQ found\n");
++ return irq;
++ }
++
++ ret = devm_request_irq(&pdev->dev, irq, ipmmu_irq, 0,
++ dev_name(&pdev->dev), mmu);
++ if (ret < 0) {
++ dev_err(&pdev->dev, "failed to request IRQ %d\n", irq);
++ return ret;
++ }
++
++ ipmmu_device_reset(mmu);
++ }
+
+ ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL,
+ dev_name(&pdev->dev));
+--
+2.19.0
+
diff --git a/patches/0101-iommu-ipmmu-vmsa-Enable-multi-context-support.patch b/patches/0101-iommu-ipmmu-vmsa-Enable-multi-context-support.patch
new file mode 100644
index 0000000..3cd6fa3
--- /dev/null
+++ b/patches/0101-iommu-ipmmu-vmsa-Enable-multi-context-support.patch
@@ -0,0 +1,125 @@
+From 8eaee8d0fcde4bd505126f104b43545dea09b9f3 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:29:46 +0900
+Subject: [PATCH 0101/1795] iommu/ipmmu-vmsa: Enable multi context support
+
+Add support for up to 8 contexts. Each context is mapped to one
+domain. One domain is assigned one or more slave devices. Contexts
+are allocated dynamically and slave devices are grouped together
+based on which IPMMU device they are connected to. This makes slave
+devices tied to the same IPMMU device share the same IOVA space.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 5fd163416fb7b6592521c39f867d5ae6360e7924)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 30 ++++++++++++++++++++++--------
+ 1 file changed, 22 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 5db853b92d3b..c70efd80f740 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -37,11 +37,12 @@
+
+ #include "io-pgtable.h"
+
+-#define IPMMU_CTX_MAX 1
++#define IPMMU_CTX_MAX 8
+
+ struct ipmmu_features {
+ bool use_ns_alias_offset;
+ bool has_cache_leaf_nodes;
++ unsigned int number_of_contexts;
+ };
+
+ struct ipmmu_vmsa_device {
+@@ -51,6 +52,7 @@ struct ipmmu_vmsa_device {
+ struct ipmmu_vmsa_device *root;
+ const struct ipmmu_features *features;
+ unsigned int num_utlbs;
++ unsigned int num_ctx;
+ spinlock_t lock; /* Protects ctx and domains[] */
+ DECLARE_BITMAP(ctx, IPMMU_CTX_MAX);
+ struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX];
+@@ -352,11 +354,12 @@ static int ipmmu_domain_allocate_context(struct ipmmu_vmsa_device *mmu,
+
+ spin_lock_irqsave(&mmu->lock, flags);
+
+- ret = find_first_zero_bit(mmu->ctx, IPMMU_CTX_MAX);
+- if (ret != IPMMU_CTX_MAX) {
++ ret = find_first_zero_bit(mmu->ctx, mmu->num_ctx);
++ if (ret != mmu->num_ctx) {
+ mmu->domains[ret] = domain;
+ set_bit(ret, mmu->ctx);
+- }
++ } else
++ ret = -EBUSY;
+
+ spin_unlock_irqrestore(&mmu->lock, flags);
+
+@@ -409,8 +412,8 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ * Find an unused context.
+ */
+ ret = ipmmu_domain_allocate_context(domain->mmu->root, domain);
+- if (ret == IPMMU_CTX_MAX)
+- return -EBUSY;
++ if (ret < 0)
++ return ret;
+
+ domain->context_id = ret;
+
+@@ -539,7 +542,7 @@ static irqreturn_t ipmmu_irq(int irq, void *dev)
+ /*
+ * Check interrupts for all active contexts.
+ */
+- for (i = 0; i < IPMMU_CTX_MAX; i++) {
++ for (i = 0; i < mmu->num_ctx; i++) {
+ if (!mmu->domains[i])
+ continue;
+ if (ipmmu_domain_irq(mmu->domains[i]) == IRQ_HANDLED)
+@@ -624,6 +627,13 @@ static int ipmmu_attach_device(struct iommu_domain *io_domain,
+ /* The domain hasn't been used yet, initialize it. */
+ domain->mmu = mmu;
+ ret = ipmmu_domain_init_context(domain);
++ if (ret < 0) {
++ dev_err(dev, "Unable to initialize IPMMU context\n");
++ domain->mmu = NULL;
++ } else {
++ dev_info(dev, "Using IPMMU context %u\n",
++ domain->context_id);
++ }
+ } else if (domain->mmu != mmu) {
+ /*
+ * Something is wrong, we can't attach two devices using
+@@ -853,13 +863,14 @@ static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu)
+ unsigned int i;
+
+ /* Disable all contexts. */
+- for (i = 0; i < 4; ++i)
++ for (i = 0; i < mmu->num_ctx; ++i)
+ ipmmu_write(mmu, i * IM_CTX_SIZE + IMCTR, 0);
+ }
+
+ static const struct ipmmu_features ipmmu_features_default = {
+ .use_ns_alias_offset = true,
+ .has_cache_leaf_nodes = false,
++ .number_of_contexts = 1, /* software only tested with one context */
+ };
+
+ static const struct of_device_id ipmmu_of_ids[] = {
+@@ -913,6 +924,9 @@ static int ipmmu_probe(struct platform_device *pdev)
+ if (mmu->features->use_ns_alias_offset)
+ mmu->base += IM_NS_ALIAS_OFFSET;
+
++ mmu->num_ctx = min_t(unsigned int, IPMMU_CTX_MAX,
++ mmu->features->number_of_contexts);
++
+ irq = platform_get_irq(pdev, 0);
+
+ /*
+--
+2.19.0
+
diff --git a/patches/0102-iommu-ipmmu-vmsa-Make-use-of-IOMMU_OF_DECLARE.patch b/patches/0102-iommu-ipmmu-vmsa-Make-use-of-IOMMU_OF_DECLARE.patch
new file mode 100644
index 0000000..d9e62ea
--- /dev/null
+++ b/patches/0102-iommu-ipmmu-vmsa-Make-use-of-IOMMU_OF_DECLARE.patch
@@ -0,0 +1,114 @@
+From 4e758c6bbbc3ba79dad00069f40b0f99f5c70d19 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:29:57 +0900
+Subject: [PATCH 0102/1795] iommu/ipmmu-vmsa: Make use of IOMMU_OF_DECLARE()
+
+Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
+is enabled. The only current supported case for 32-bit ARM
+is disabled, however for 64-bit ARM usage of OF is required.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit cda52fcd999f389c6f24f079910a62e53912d411)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 50 +++++++++++++++++++++++++++++++-------
+ 1 file changed, 41 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index c70efd80f740..9cde61970bb5 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -20,6 +20,7 @@
+ #include <linux/module.h>
+ #include <linux/of.h>
+ #include <linux/of_device.h>
++#include <linux/of_iommu.h>
+ #include <linux/of_platform.h>
+ #include <linux/platform_device.h>
+ #include <linux/sizes.h>
+@@ -962,17 +963,30 @@ static int ipmmu_probe(struct platform_device *pdev)
+ ipmmu_device_reset(mmu);
+ }
+
+- ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL,
+- dev_name(&pdev->dev));
+- if (ret)
+- return ret;
++ /*
++ * Register the IPMMU to the IOMMU subsystem in the following cases:
++ * - R-Car Gen2 IPMMU (all devices registered)
++ * - R-Car Gen3 IPMMU (leaf devices only - skip root IPMMU-MM device)
++ */
++ if (!mmu->features->has_cache_leaf_nodes || !ipmmu_is_root(mmu)) {
++ ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL,
++ dev_name(&pdev->dev));
++ if (ret)
++ return ret;
+
+- iommu_device_set_ops(&mmu->iommu, &ipmmu_ops);
+- iommu_device_set_fwnode(&mmu->iommu, &pdev->dev.of_node->fwnode);
++ iommu_device_set_ops(&mmu->iommu, &ipmmu_ops);
++ iommu_device_set_fwnode(&mmu->iommu,
++ &pdev->dev.of_node->fwnode);
+
+- ret = iommu_device_register(&mmu->iommu);
+- if (ret)
+- return ret;
++ ret = iommu_device_register(&mmu->iommu);
++ if (ret)
++ return ret;
++
++#if defined(CONFIG_IOMMU_DMA)
++ if (!iommu_present(&platform_bus_type))
++ bus_set_iommu(&platform_bus_type, &ipmmu_ops);
++#endif
++ }
+
+ /*
+ * We can't create the ARM mapping here as it requires the bus to have
+@@ -1010,15 +1024,22 @@ static struct platform_driver ipmmu_driver = {
+
+ static int __init ipmmu_init(void)
+ {
++ static bool setup_done;
+ int ret;
+
++ if (setup_done)
++ return 0;
++
+ ret = platform_driver_register(&ipmmu_driver);
+ if (ret < 0)
+ return ret;
+
++#if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+ if (!iommu_present(&platform_bus_type))
+ bus_set_iommu(&platform_bus_type, &ipmmu_ops);
++#endif
+
++ setup_done = true;
+ return 0;
+ }
+
+@@ -1030,6 +1051,17 @@ static void __exit ipmmu_exit(void)
+ subsys_initcall(ipmmu_init);
+ module_exit(ipmmu_exit);
+
++#ifdef CONFIG_IOMMU_DMA
++static int __init ipmmu_vmsa_iommu_of_setup(struct device_node *np)
++{
++ ipmmu_init();
++ return 0;
++}
++
++IOMMU_OF_DECLARE(ipmmu_vmsa_iommu_of, "renesas,ipmmu-vmsa",
++ ipmmu_vmsa_iommu_of_setup);
++#endif
++
+ MODULE_DESCRIPTION("IOMMU API for Renesas VMSA-compatible IPMMU");
+ MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
+ MODULE_LICENSE("GPL v2");
+--
+2.19.0
+
diff --git a/patches/0103-iommu-ipmmu-vmsa-IPMMU-device-is-40-bit-bus-master.patch b/patches/0103-iommu-ipmmu-vmsa-IPMMU-device-is-40-bit-bus-master.patch
new file mode 100644
index 0000000..eee64a8
--- /dev/null
+++ b/patches/0103-iommu-ipmmu-vmsa-IPMMU-device-is-40-bit-bus-master.patch
@@ -0,0 +1,34 @@
+From cecfc76f8f5e54e14e51ff99f649acdf75a0056e Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:30:07 +0900
+Subject: [PATCH 0103/1795] iommu/ipmmu-vmsa: IPMMU device is 40-bit bus master
+
+The r8a7795 IPMMU supports 40-bit bus mastering. Both
+the coherent DMA mask and the streaming DMA mask are
+set to unlock the 40-bit address space for coherent
+allocations and streaming operations.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 1c894225bf5b1cdffac0c6ef935b61273203d7d5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 9cde61970bb5..6b74ec62f4b4 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -903,6 +903,7 @@ static int ipmmu_probe(struct platform_device *pdev)
+ spin_lock_init(&mmu->lock);
+ bitmap_zero(mmu->ctx, IPMMU_CTX_MAX);
+ mmu->features = of_device_get_match_data(&pdev->dev);
++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40));
+
+ /* Map I/O memory and request IRQ. */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+--
+2.19.0
+
diff --git a/patches/0104-iommu-ipmmu-vmsa-Write-IMCTR-twice.patch b/patches/0104-iommu-ipmmu-vmsa-Write-IMCTR-twice.patch
new file mode 100644
index 0000000..045b9f1
--- /dev/null
+++ b/patches/0104-iommu-ipmmu-vmsa-Write-IMCTR-twice.patch
@@ -0,0 +1,171 @@
+From 76b5706b45a6e41d53cb081f051783df71db9fcb Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:30:18 +0900
+Subject: [PATCH 0104/1795] iommu/ipmmu-vmsa: Write IMCTR twice
+
+Write IMCTR both in the root device and the leaf node.
+
+To allow access of IMCTR introduce the following function:
+ - ipmmu_ctx_write_all()
+
+While at it also rename context functions:
+ - ipmmu_ctx_read() -> ipmmu_ctx_read_root()
+ - ipmmu_ctx_write() -> ipmmu_ctx_write_root()
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit d574893aee991efa67fefa849347c49de5df8108)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 56 ++++++++++++++++++++++++--------------
+ 1 file changed, 35 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 6b74ec62f4b4..7587017972b0 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -248,19 +248,31 @@ static void ipmmu_write(struct ipmmu_vmsa_device *mmu, unsigned int offset,
+ iowrite32(data, mmu->base + offset);
+ }
+
+-static u32 ipmmu_ctx_read(struct ipmmu_vmsa_domain *domain, unsigned int reg)
++static u32 ipmmu_ctx_read_root(struct ipmmu_vmsa_domain *domain,
++ unsigned int reg)
+ {
+ return ipmmu_read(domain->mmu->root,
+ domain->context_id * IM_CTX_SIZE + reg);
+ }
+
+-static void ipmmu_ctx_write(struct ipmmu_vmsa_domain *domain, unsigned int reg,
+- u32 data)
++static void ipmmu_ctx_write_root(struct ipmmu_vmsa_domain *domain,
++ unsigned int reg, u32 data)
+ {
+ ipmmu_write(domain->mmu->root,
+ domain->context_id * IM_CTX_SIZE + reg, data);
+ }
+
++static void ipmmu_ctx_write_all(struct ipmmu_vmsa_domain *domain,
++ unsigned int reg, u32 data)
++{
++ if (domain->mmu != domain->mmu->root)
++ ipmmu_write(domain->mmu,
++ domain->context_id * IM_CTX_SIZE + reg, data);
++
++ ipmmu_write(domain->mmu->root,
++ domain->context_id * IM_CTX_SIZE + reg, data);
++}
++
+ /* -----------------------------------------------------------------------------
+ * TLB and microTLB Management
+ */
+@@ -270,7 +282,7 @@ static void ipmmu_tlb_sync(struct ipmmu_vmsa_domain *domain)
+ {
+ unsigned int count = 0;
+
+- while (ipmmu_ctx_read(domain, IMCTR) & IMCTR_FLUSH) {
++ while (ipmmu_ctx_read_root(domain, IMCTR) & IMCTR_FLUSH) {
+ cpu_relax();
+ if (++count == TLB_LOOP_TIMEOUT) {
+ dev_err_ratelimited(domain->mmu->dev,
+@@ -285,9 +297,9 @@ static void ipmmu_tlb_invalidate(struct ipmmu_vmsa_domain *domain)
+ {
+ u32 reg;
+
+- reg = ipmmu_ctx_read(domain, IMCTR);
++ reg = ipmmu_ctx_read_root(domain, IMCTR);
+ reg |= IMCTR_FLUSH;
+- ipmmu_ctx_write(domain, IMCTR, reg);
++ ipmmu_ctx_write_all(domain, IMCTR, reg);
+
+ ipmmu_tlb_sync(domain);
+ }
+@@ -428,31 +440,32 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+
+ /* TTBR0 */
+ ttbr = domain->cfg.arm_lpae_s1_cfg.ttbr[0];
+- ipmmu_ctx_write(domain, IMTTLBR0, ttbr);
+- ipmmu_ctx_write(domain, IMTTUBR0, ttbr >> 32);
++ ipmmu_ctx_write_root(domain, IMTTLBR0, ttbr);
++ ipmmu_ctx_write_root(domain, IMTTUBR0, ttbr >> 32);
+
+ /*
+ * TTBCR
+ * We use long descriptors with inner-shareable WBWA tables and allocate
+ * the whole 32-bit VA space to TTBR0.
+ */
+- ipmmu_ctx_write(domain, IMTTBCR, IMTTBCR_EAE |
+- IMTTBCR_SH0_INNER_SHAREABLE | IMTTBCR_ORGN0_WB_WA |
+- IMTTBCR_IRGN0_WB_WA | IMTTBCR_SL0_LVL_1);
++ ipmmu_ctx_write_root(domain, IMTTBCR, IMTTBCR_EAE |
++ IMTTBCR_SH0_INNER_SHAREABLE | IMTTBCR_ORGN0_WB_WA |
++ IMTTBCR_IRGN0_WB_WA | IMTTBCR_SL0_LVL_1);
+
+ /* MAIR0 */
+- ipmmu_ctx_write(domain, IMMAIR0, domain->cfg.arm_lpae_s1_cfg.mair[0]);
++ ipmmu_ctx_write_root(domain, IMMAIR0,
++ domain->cfg.arm_lpae_s1_cfg.mair[0]);
+
+ /* IMBUSCR */
+- ipmmu_ctx_write(domain, IMBUSCR,
+- ipmmu_ctx_read(domain, IMBUSCR) &
+- ~(IMBUSCR_DVM | IMBUSCR_BUSSEL_MASK));
++ ipmmu_ctx_write_root(domain, IMBUSCR,
++ ipmmu_ctx_read_root(domain, IMBUSCR) &
++ ~(IMBUSCR_DVM | IMBUSCR_BUSSEL_MASK));
+
+ /*
+ * IMSTR
+ * Clear all interrupt flags.
+ */
+- ipmmu_ctx_write(domain, IMSTR, ipmmu_ctx_read(domain, IMSTR));
++ ipmmu_ctx_write_root(domain, IMSTR, ipmmu_ctx_read_root(domain, IMSTR));
+
+ /*
+ * IMCTR
+@@ -461,7 +474,8 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ * software management as we have no use for it. Flush the TLB as
+ * required when modifying the context registers.
+ */
+- ipmmu_ctx_write(domain, IMCTR, IMCTR_INTEN | IMCTR_FLUSH | IMCTR_MMUEN);
++ ipmmu_ctx_write_all(domain, IMCTR,
++ IMCTR_INTEN | IMCTR_FLUSH | IMCTR_MMUEN);
+
+ return 0;
+ }
+@@ -474,7 +488,7 @@ static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain)
+ *
+ * TODO: Is TLB flush really needed ?
+ */
+- ipmmu_ctx_write(domain, IMCTR, IMCTR_FLUSH);
++ ipmmu_ctx_write_all(domain, IMCTR, IMCTR_FLUSH);
+ ipmmu_tlb_sync(domain);
+ ipmmu_domain_free_context(domain->mmu->root, domain->context_id);
+ }
+@@ -490,11 +504,11 @@ static irqreturn_t ipmmu_domain_irq(struct ipmmu_vmsa_domain *domain)
+ u32 status;
+ u32 iova;
+
+- status = ipmmu_ctx_read(domain, IMSTR);
++ status = ipmmu_ctx_read_root(domain, IMSTR);
+ if (!(status & err_mask))
+ return IRQ_NONE;
+
+- iova = ipmmu_ctx_read(domain, IMEAR);
++ iova = ipmmu_ctx_read_root(domain, IMEAR);
+
+ /*
+ * Clear the error status flags. Unlike traditional interrupt flag
+@@ -502,7 +516,7 @@ static irqreturn_t ipmmu_domain_irq(struct ipmmu_vmsa_domain *domain)
+ * seems to require 0. The error address register must be read before,
+ * otherwise its value will be 0.
+ */
+- ipmmu_ctx_write(domain, IMSTR, 0);
++ ipmmu_ctx_write_root(domain, IMSTR, 0);
+
+ /* Log fatal errors. */
+ if (status & IMSTR_MHIT)
+--
+2.19.0
+
diff --git a/patches/0105-iommu-ipmmu-vmsa-Make-IMBUSCTR-setup-optional.patch b/patches/0105-iommu-ipmmu-vmsa-Make-IMBUSCTR-setup-optional.patch
new file mode 100644
index 0000000..2609ec0
--- /dev/null
+++ b/patches/0105-iommu-ipmmu-vmsa-Make-IMBUSCTR-setup-optional.patch
@@ -0,0 +1,54 @@
+From c91b5ab334d8239ff2f760392a0befe6eb32fbb1 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:30:28 +0900
+Subject: [PATCH 0105/1795] iommu/ipmmu-vmsa: Make IMBUSCTR setup optional
+
+Introduce a feature to allow opt-out of setting up
+IMBUSCR. The default case is unchanged.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit f5c858912acd2b17059ebe6f34abac183bdfbf80)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 9 ++++++---
+ 1 file changed, 6 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 7587017972b0..49f2c697b108 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -44,6 +44,7 @@ struct ipmmu_features {
+ bool use_ns_alias_offset;
+ bool has_cache_leaf_nodes;
+ unsigned int number_of_contexts;
++ bool setup_imbuscr;
+ };
+
+ struct ipmmu_vmsa_device {
+@@ -457,9 +458,10 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ domain->cfg.arm_lpae_s1_cfg.mair[0]);
+
+ /* IMBUSCR */
+- ipmmu_ctx_write_root(domain, IMBUSCR,
+- ipmmu_ctx_read_root(domain, IMBUSCR) &
+- ~(IMBUSCR_DVM | IMBUSCR_BUSSEL_MASK));
++ if (domain->mmu->features->setup_imbuscr)
++ ipmmu_ctx_write_root(domain, IMBUSCR,
++ ipmmu_ctx_read_root(domain, IMBUSCR) &
++ ~(IMBUSCR_DVM | IMBUSCR_BUSSEL_MASK));
+
+ /*
+ * IMSTR
+@@ -886,6 +888,7 @@ static const struct ipmmu_features ipmmu_features_default = {
+ .use_ns_alias_offset = true,
+ .has_cache_leaf_nodes = false,
+ .number_of_contexts = 1, /* software only tested with one context */
++ .setup_imbuscr = true,
+ };
+
+ static const struct of_device_id ipmmu_of_ids[] = {
+--
+2.19.0
+
diff --git a/patches/0106-iommu-ipmmu-vmsa-Allow-two-bit-SL0.patch b/patches/0106-iommu-ipmmu-vmsa-Allow-two-bit-SL0.patch
new file mode 100644
index 0000000..be2e95b
--- /dev/null
+++ b/patches/0106-iommu-ipmmu-vmsa-Allow-two-bit-SL0.patch
@@ -0,0 +1,75 @@
+From a80a7e3d2c7510bbf5c4300ddb30eb9604efdd35 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:30:39 +0900
+Subject: [PATCH 0106/1795] iommu/ipmmu-vmsa: Allow two bit SL0
+
+Introduce support for two bit SL0 bitfield in IMTTBCR
+by using a separate feature flag.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit c295f504fb5a38abbb4094e687ee333a75613a0c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 14 +++++++++++++-
+ 1 file changed, 13 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 49f2c697b108..65ad6910cb70 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -45,6 +45,7 @@ struct ipmmu_features {
+ bool has_cache_leaf_nodes;
+ unsigned int number_of_contexts;
+ bool setup_imbuscr;
++ bool twobit_imttbcr_sl0;
+ };
+
+ struct ipmmu_vmsa_device {
+@@ -144,6 +145,10 @@ static struct ipmmu_vmsa_device *to_ipmmu(struct device *dev)
+ #define IMTTBCR_TSZ0_MASK (7 << 0)
+ #define IMTTBCR_TSZ0_SHIFT O
+
++#define IMTTBCR_SL0_TWOBIT_LVL_3 (0 << 6)
++#define IMTTBCR_SL0_TWOBIT_LVL_2 (1 << 6)
++#define IMTTBCR_SL0_TWOBIT_LVL_1 (2 << 6)
++
+ #define IMBUSCR 0x000c
+ #define IMBUSCR_DVM (1 << 2)
+ #define IMBUSCR_BUSSEL_SYS (0 << 0)
+@@ -396,6 +401,7 @@ static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu,
+ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ {
+ u64 ttbr;
++ u32 tmp;
+ int ret;
+
+ /*
+@@ -449,9 +455,14 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ * We use long descriptors with inner-shareable WBWA tables and allocate
+ * the whole 32-bit VA space to TTBR0.
+ */
++ if (domain->mmu->features->twobit_imttbcr_sl0)
++ tmp = IMTTBCR_SL0_TWOBIT_LVL_1;
++ else
++ tmp = IMTTBCR_SL0_LVL_1;
++
+ ipmmu_ctx_write_root(domain, IMTTBCR, IMTTBCR_EAE |
+ IMTTBCR_SH0_INNER_SHAREABLE | IMTTBCR_ORGN0_WB_WA |
+- IMTTBCR_IRGN0_WB_WA | IMTTBCR_SL0_LVL_1);
++ IMTTBCR_IRGN0_WB_WA | tmp);
+
+ /* MAIR0 */
+ ipmmu_ctx_write_root(domain, IMMAIR0,
+@@ -889,6 +900,7 @@ static const struct ipmmu_features ipmmu_features_default = {
+ .has_cache_leaf_nodes = false,
+ .number_of_contexts = 1, /* software only tested with one context */
+ .setup_imbuscr = true,
++ .twobit_imttbcr_sl0 = false,
+ };
+
+ static const struct of_device_id ipmmu_of_ids[] = {
+--
+2.19.0
+
diff --git a/patches/0107-iommu-ipmmu-vmsa-Hook-up-r8a7795-DT-matching-code.patch b/patches/0107-iommu-ipmmu-vmsa-Hook-up-r8a7795-DT-matching-code.patch
new file mode 100644
index 0000000..9caa4cc
--- /dev/null
+++ b/patches/0107-iommu-ipmmu-vmsa-Hook-up-r8a7795-DT-matching-code.patch
@@ -0,0 +1,88 @@
+From 834eb971ccfc690bbb2c27ed298e23c4f2df72d4 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:30:50 +0900
+Subject: [PATCH 0107/1795] iommu/ipmmu-vmsa: Hook up r8a7795 DT matching code
+
+Tie in r8a7795 features and update the IOMMU_OF_DECLARE
+compat string to include the updated compat string.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 58b8e8bf409236cdea379b8a3ab5d7b85a003d22)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 29 +++++++++++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 65ad6910cb70..8dce3a9de9d8 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -25,6 +25,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/sizes.h>
+ #include <linux/slab.h>
++#include <linux/sys_soc.h>
+
+ #if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+ #include <asm/dma-iommu.h>
+@@ -749,9 +750,24 @@ static int ipmmu_init_platform_device(struct device *dev,
+ return 0;
+ }
+
++static bool ipmmu_slave_whitelist(struct device *dev)
++{
++ /* By default, do not allow use of IPMMU */
++ return false;
++}
++
++static const struct soc_device_attribute soc_r8a7795[] = {
++ { .soc_id = "r8a7795", },
++ { /* sentinel */ }
++};
++
+ static int ipmmu_of_xlate(struct device *dev,
+ struct of_phandle_args *spec)
+ {
++ /* For R-Car Gen3 use a white list to opt-in slave devices */
++ if (soc_device_match(soc_r8a7795) && !ipmmu_slave_whitelist(dev))
++ return -ENODEV;
++
+ iommu_fwspec_add_ids(dev, spec->args, 1);
+
+ /* Initialize once - xlate() will call multiple times */
+@@ -903,10 +919,21 @@ static const struct ipmmu_features ipmmu_features_default = {
+ .twobit_imttbcr_sl0 = false,
+ };
+
++static const struct ipmmu_features ipmmu_features_r8a7795 = {
++ .use_ns_alias_offset = false,
++ .has_cache_leaf_nodes = true,
++ .number_of_contexts = 8,
++ .setup_imbuscr = false,
++ .twobit_imttbcr_sl0 = true,
++};
++
+ static const struct of_device_id ipmmu_of_ids[] = {
+ {
+ .compatible = "renesas,ipmmu-vmsa",
+ .data = &ipmmu_features_default,
++ }, {
++ .compatible = "renesas,ipmmu-r8a7795",
++ .data = &ipmmu_features_r8a7795,
+ }, {
+ /* Terminator */
+ },
+@@ -1090,6 +1117,8 @@ static int __init ipmmu_vmsa_iommu_of_setup(struct device_node *np)
+
+ IOMMU_OF_DECLARE(ipmmu_vmsa_iommu_of, "renesas,ipmmu-vmsa",
+ ipmmu_vmsa_iommu_of_setup);
++IOMMU_OF_DECLARE(ipmmu_r8a7795_iommu_of, "renesas,ipmmu-r8a7795",
++ ipmmu_vmsa_iommu_of_setup);
+ #endif
+
+ MODULE_DESCRIPTION("IOMMU API for Renesas VMSA-compatible IPMMU");
+--
+2.19.0
+
diff --git a/patches/0108-irqchip-gic-Deal-with-broken-firmware-exposing-only-.patch b/patches/0108-irqchip-gic-Deal-with-broken-firmware-exposing-only-.patch
new file mode 100644
index 0000000..a26b3a3
--- /dev/null
+++ b/patches/0108-irqchip-gic-Deal-with-broken-firmware-exposing-only-.patch
@@ -0,0 +1,158 @@
+From adde40ad18b5dcbeb2ec4acd09b347842b41e707 Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Fri, 27 Oct 2017 10:34:22 +0200
+Subject: [PATCH 0108/1795] irqchip/gic: Deal with broken firmware exposing
+ only 4kB of GICv2 CPU interface
+
+There is a lot of broken firmware out there that don't really
+expose the information the kernel requires when it comes with dealing
+with GICv2:
+
+(1) Firmware that only describes the first 4kB of GICv2
+(2) Firmware that describe 128kB of CPU interface, while
+ the usable portion of the address space is between
+ 60 and 68kB
+
+So far, we only deal with (2). But we have platforms exhibiting
+behaviour (1), resulting in two sub-cases:
+(a) The GIC is occupying 8kB, as required by the GICv2 architecture
+(b) It is actually spread 128kB, and this is likely to be a version
+ of (2)
+
+This patch tries to work around both (a) and (b) by poking at
+the outside of the described memory region, and try to work out
+what is actually there. This is of course unsafe, and should
+only be enabled if there is no way to otherwise fix the DT provided
+by the firmware (we provide a "irqchip.gicv2_force_probe" option
+to that effect).
+
+Note that for the time being, we restrict ourselves to GICv2
+implementations provided by ARM, since there I have no knowledge
+of an alternative implementations. This could be relaxed if such
+an implementation comes to light on a broken platform.
+
+Reviewed-by: Christoffer Dall <cdall@linaro.org>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+(cherry picked from commit 0962289b1cd91534f7111e763d3e6a17dcd47ecb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../admin-guide/kernel-parameters.txt | 7 ++
+ drivers/irqchip/irq-gic.c | 71 ++++++++++++++++---
+ 2 files changed, 69 insertions(+), 9 deletions(-)
+
+diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
+index 9841bad6f271..900c83e10d4d 100644
+--- a/Documentation/admin-guide/kernel-parameters.txt
++++ b/Documentation/admin-guide/kernel-parameters.txt
+@@ -1713,6 +1713,13 @@
+ irqaffinity= [SMP] Set the default irq affinity mask
+ The argument is a cpu list, as described above.
+
++ irqchip.gicv2_force_probe=
++ [ARM, ARM64]
++ Format: <bool>
++ Force the kernel to look for the second 4kB page
++ of a GICv2 controller even if the memory range
++ exposed by the device tree is too small.
++
+ irqfixup [HW]
+ When an interrupt is not handled search all handlers
+ for it. Intended to get systems with badly broken
+diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
+index 651d726e8b12..f641e8e2c78d 100644
+--- a/drivers/irqchip/irq-gic.c
++++ b/drivers/irqchip/irq-gic.c
+@@ -1256,6 +1256,19 @@ static void gic_teardown(struct gic_chip_data *gic)
+
+ #ifdef CONFIG_OF
+ static int gic_cnt __initdata;
++static bool gicv2_force_probe;
++
++static int __init gicv2_force_probe_cfg(char *buf)
++{
++ return strtobool(buf, &gicv2_force_probe);
++}
++early_param("irqchip.gicv2_force_probe", gicv2_force_probe_cfg);
++
++static bool gic_check_gicv2(void __iomem *base)
++{
++ u32 val = readl_relaxed(base + GIC_CPU_IDENT);
++ return (val & 0xff0fff) == 0x02043B;
++}
+
+ static bool gic_check_eoimode(struct device_node *node, void __iomem **base)
+ {
+@@ -1265,20 +1278,60 @@ static bool gic_check_eoimode(struct device_node *node, void __iomem **base)
+
+ if (!is_hyp_mode_available())
+ return false;
+- if (resource_size(&cpuif_res) < SZ_8K)
+- return false;
+- if (resource_size(&cpuif_res) == SZ_128K) {
+- u32 val_low, val_high;
++ if (resource_size(&cpuif_res) < SZ_8K) {
++ void __iomem *alt;
++ /*
++ * Check for a stupid firmware that only exposes the
++ * first page of a GICv2.
++ */
++ if (!gic_check_gicv2(*base))
++ return false;
+
++ if (!gicv2_force_probe) {
++ pr_warn("GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set\n");
++ return false;
++ }
++
++ alt = ioremap(cpuif_res.start, SZ_8K);
++ if (!alt)
++ return false;
++ if (!gic_check_gicv2(alt + SZ_4K)) {
++ /*
++ * The first page was that of a GICv2, and
++ * the second was *something*. Let's trust it
++ * to be a GICv2, and update the mapping.
++ */
++ pr_warn("GIC: GICv2 at %pa, but range is too small (broken DT?), assuming 8kB\n",
++ &cpuif_res.start);
++ iounmap(*base);
++ *base = alt;
++ return true;
++ }
++
++ /*
++ * We detected *two* initial GICv2 pages in a
++ * row. Could be a GICv2 aliased over two 64kB
++ * pages. Update the resource, map the iospace, and
++ * pray.
++ */
++ iounmap(alt);
++ alt = ioremap(cpuif_res.start, SZ_128K);
++ if (!alt)
++ return false;
++ pr_warn("GIC: Aliased GICv2 at %pa, trying to find the canonical range over 128kB\n",
++ &cpuif_res.start);
++ cpuif_res.end = cpuif_res.start + SZ_128K -1;
++ iounmap(*base);
++ *base = alt;
++ }
++ if (resource_size(&cpuif_res) == SZ_128K) {
+ /*
+- * Verify that we have the first 4kB of a GIC400
++ * Verify that we have the first 4kB of a GICv2
+ * aliased over the first 64kB by checking the
+ * GICC_IIDR register on both ends.
+ */
+- val_low = readl_relaxed(*base + GIC_CPU_IDENT);
+- val_high = readl_relaxed(*base + GIC_CPU_IDENT + 0xf000);
+- if ((val_low & 0xffff0fff) != 0x0202043B ||
+- val_low != val_high)
++ if (!gic_check_gicv2(*base) ||
++ !gic_check_gicv2(*base + 0xf000))
+ return false;
+
+ /*
+--
+2.19.0
+
diff --git a/patches/0109-KVM-arm-arm64-Check-that-system-supports-split-eoi-d.patch b/patches/0109-KVM-arm-arm64-Check-that-system-supports-split-eoi-d.patch
new file mode 100644
index 0000000..80ccc34
--- /dev/null
+++ b/patches/0109-KVM-arm-arm64-Check-that-system-supports-split-eoi-d.patch
@@ -0,0 +1,79 @@
+From 3ef51abc406abb6dba35604cd012afe200d20fe8 Mon Sep 17 00:00:00 2001
+From: Christoffer Dall <cdall@linaro.org>
+Date: Tue, 6 Dec 2016 22:00:52 +0100
+Subject: [PATCH 0109/1795] KVM: arm/arm64: Check that system supports split
+ eoi/deactivate
+
+Some systems without proper firmware and/or hardware description data
+don't support the split EOI and deactivate operation.
+
+On such systems, we cannot leave the physical interrupt active after the
+timer handler on the host has run, so we cannot support KVM with an
+in-kernel GIC with the timer changes we are about to introduce.
+
+This patch makes sure that trying to initialize the KVM GIC code will
+fail on such systems.
+
+Acked-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Christoffer Dall <cdall@linaro.org>
+(cherry picked from commit d33a3c8c48c3264419a683885a27a5c85df35f12)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/irqchip/irq-gic-v3.c | 8 ++++++--
+ drivers/irqchip/irq-gic.c | 6 ++++--
+ 2 files changed, 10 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
+index 3d7374655587..2437497eaf4d 100644
+--- a/drivers/irqchip/irq-gic-v3.c
++++ b/drivers/irqchip/irq-gic-v3.c
+@@ -1231,7 +1231,9 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare
+ goto out_unmap_rdist;
+
+ gic_populate_ppi_partitions(node);
+- gic_of_setup_kvm_info(node);
++
++ if (static_key_true(&supports_deactivate))
++ gic_of_setup_kvm_info(node);
+ return 0;
+
+ out_unmap_rdist:
+@@ -1531,7 +1533,9 @@ gic_acpi_init(struct acpi_subtable_header *header, const unsigned long end)
+ goto out_fwhandle_free;
+
+ acpi_set_irq_model(ACPI_IRQ_MODEL_GIC, domain_handle);
+- gic_acpi_setup_kvm_info();
++
++ if (static_key_true(&supports_deactivate))
++ gic_acpi_setup_kvm_info();
+
+ return 0;
+
+diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
+index f641e8e2c78d..121af5cf688f 100644
+--- a/drivers/irqchip/irq-gic.c
++++ b/drivers/irqchip/irq-gic.c
+@@ -1420,7 +1420,8 @@ static void __init gic_of_setup_kvm_info(struct device_node *node)
+ if (ret)
+ return;
+
+- gic_set_kvm_info(&gic_v2_kvm_info);
++ if (static_key_true(&supports_deactivate))
++ gic_set_kvm_info(&gic_v2_kvm_info);
+ }
+
+ int __init
+@@ -1652,7 +1653,8 @@ static int __init gic_v2_acpi_init(struct acpi_subtable_header *header,
+ if (IS_ENABLED(CONFIG_ARM_GIC_V2M))
+ gicv2m_init(NULL, gic_data[0].domain);
+
+- gic_acpi_setup_kvm_info();
++ if (static_key_true(&supports_deactivate))
++ gic_acpi_setup_kvm_info();
+
+ return 0;
+ }
+--
+2.19.0
+
diff --git a/patches/0110-irqchip-renesas-intc-irqpin-Use-of_device_get_match_.patch b/patches/0110-irqchip-renesas-intc-irqpin-Use-of_device_get_match_.patch
new file mode 100644
index 0000000..ce9b7c1
--- /dev/null
+++ b/patches/0110-irqchip-renesas-intc-irqpin-Use-of_device_get_match_.patch
@@ -0,0 +1,51 @@
+From 448d24fe5279a114c233776bb1ed9b48f06811a7 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:17:58 +0200
+Subject: [PATCH 0110/1795] irqchip/renesas-intc-irqpin: Use
+ of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+(cherry picked from commit 42a5968c0ae8f19906e16fa34ea9bdb6f5095166)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/irqchip/irq-renesas-intc-irqpin.c | 9 +++------
+ 1 file changed, 3 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
+index 713177d97c7a..06f29cf5018a 100644
+--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
++++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
+@@ -389,9 +389,8 @@ MODULE_DEVICE_TABLE(of, intc_irqpin_dt_ids);
+
+ static int intc_irqpin_probe(struct platform_device *pdev)
+ {
+- const struct intc_irqpin_config *config = NULL;
++ const struct intc_irqpin_config *config;
+ struct device *dev = &pdev->dev;
+- const struct of_device_id *of_id;
+ struct intc_irqpin_priv *p;
+ struct intc_irqpin_iomem *i;
+ struct resource *io[INTC_IRQPIN_REG_NR];
+@@ -422,11 +421,9 @@ static int intc_irqpin_probe(struct platform_device *pdev)
+ p->pdev = pdev;
+ platform_set_drvdata(pdev, p);
+
+- of_id = of_match_device(intc_irqpin_dt_ids, dev);
+- if (of_id && of_id->data) {
+- config = of_id->data;
++ config = of_device_get_match_data(dev);
++ if (config)
+ p->needs_clk = config->needs_clk;
+- }
+
+ p->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(p->clk)) {
+--
+2.19.0
+
diff --git a/patches/0111-dt-bindings-irqchip-renesas-irqc-Document-R-Car-M3-W.patch b/patches/0111-dt-bindings-irqchip-renesas-irqc-Document-R-Car-M3-W.patch
new file mode 100644
index 0000000..62ac8c4
--- /dev/null
+++ b/patches/0111-dt-bindings-irqchip-renesas-irqc-Document-R-Car-M3-W.patch
@@ -0,0 +1,39 @@
+From 4cd3f709290d6723d6ef6f3c3a74f0ecfb52cc5d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 6 Oct 2017 13:51:32 +0200
+Subject: [PATCH 0111/1795] dt-bindings: irqchip: renesas-irqc: Document R-Car
+ M3-W, V3M, D3 support
+
+Document support for the Interrupt Controller for Externel Devices
+(INTC-EX) in the Renesas M3-W (r8a7796), V3M (r8a77970), and D3
+(r8a77995) SoCs.
+
+No driver update is needed.
+
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+(cherry picked from commit bea173e5acd73d536dd234b34328cd52c1cadaab)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/interrupt-controller/renesas,irqc.txt | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
+index e3f052d8c11a..33c9a10fdc91 100644
+--- a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
++++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
+@@ -13,6 +13,9 @@ Required properties:
+ - "renesas,irqc-r8a7793" (R-Car M2-N)
+ - "renesas,irqc-r8a7794" (R-Car E2)
+ - "renesas,intc-ex-r8a7795" (R-Car H3)
++ - "renesas,intc-ex-r8a7796" (R-Car M3-W)
++ - "renesas,intc-ex-r8a77970" (R-Car V3M)
++ - "renesas,intc-ex-r8a77995" (R-Car D3)
+ - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
+ interrupts.txt in this directory
+ - clocks: Must contain a reference to the functional clock.
+--
+2.19.0
+
diff --git a/patches/0112-mtd-spi-nor-Add-support-for-mr25h128.patch b/patches/0112-mtd-spi-nor-Add-support-for-mr25h128.patch
new file mode 100644
index 0000000..6b6ce04
--- /dev/null
+++ b/patches/0112-mtd-spi-nor-Add-support-for-mr25h128.patch
@@ -0,0 +1,57 @@
+From 41668e64c5392e0b02acd4e85bcf65b7f8897950 Mon Sep 17 00:00:00 2001
+From: Philipp Puschmann <pp@emlix.com>
+Date: Thu, 19 Oct 2017 10:12:47 +0200
+Subject: [PATCH 0112/1795] mtd: spi-nor: Add support for mr25h128
+
+Add Everspin mr25h128 16KB MRAM to the list of supported chips.
+
+Signed-off-by: Philipp Puschmann <pp@emlix.com>
+Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
+(cherry picked from commit 282e45dc64d1832c9b51d2c6f6eb0a634c924fa7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt | 1 +
+ drivers/mtd/devices/m25p80.c | 1 +
+ drivers/mtd/spi-nor/spi-nor.c | 1 +
+ 3 files changed, 3 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
+index 9ce35af8507c..956bb046e599 100644
+--- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
++++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
+@@ -13,6 +13,7 @@ Required properties:
+ at25df321a
+ at25df641
+ at26df081a
++ mr25h128
+ mr25h256
+ mr25h10
+ mr25h40
+diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
+index 00eea6fd379c..dbe6a1de2bb8 100644
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -359,6 +359,7 @@ static const struct spi_device_id m25p_ids[] = {
+ {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
+
+ /* Everspin MRAMs (non-JEDEC) */
++ { "mr25h128" }, /* 128 Kib, 40 MHz */
+ { "mr25h256" }, /* 256 Kib, 40 MHz */
+ { "mr25h10" }, /* 1 Mib, 40 MHz */
+ { "mr25h40" }, /* 4 Mib, 40 MHz */
+diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
+index 19c000722cbc..52056198f457 100644
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -964,6 +964,7 @@ static const struct flash_info spi_nor_ids[] = {
+ { "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_LOCK) },
+
+ /* Everspin */
++ { "mr25h128", CAT25_INFO( 16 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "mr25h40", CAT25_INFO(512 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+--
+2.19.0
+
diff --git a/patches/0113-net-phy-micrel-check-return-code-in-flp-center-funct.patch b/patches/0113-net-phy-micrel-check-return-code-in-flp-center-funct.patch
new file mode 100644
index 0000000..0bb9fdf
--- /dev/null
+++ b/patches/0113-net-phy-micrel-check-return-code-in-flp-center-funct.patch
@@ -0,0 +1,45 @@
+From b055902a4ba6a0a334604285cf9700ae9f96527b Mon Sep 17 00:00:00 2001
+From: Max Uvarov <muvarov@gmail.com>
+Date: Thu, 30 Nov 2017 13:08:29 +0300
+Subject: [PATCH 0113/1795] net: phy-micrel: check return code in flp center
+ function
+
+Fix obvious typo that first return value is set but not checked.
+
+Signed-off-by: Max Uvarov <muvarov@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit a0da456bbf95d2a9294799bb05c61bfb24736bb7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/phy/micrel.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
+index 6c45ff650ec7..422ff6333c52 100644
+--- a/drivers/net/phy/micrel.c
++++ b/drivers/net/phy/micrel.c
+@@ -496,16 +496,18 @@ static int ksz9031_of_load_skew_values(struct phy_device *phydev,
+ return ksz9031_extended_write(phydev, OP_DATA, 2, reg, newval);
+ }
+
++/* Center KSZ9031RNX FLP timing at 16ms. */
+ static int ksz9031_center_flp_timing(struct phy_device *phydev)
+ {
+ int result;
+
+- /* Center KSZ9031RNX FLP timing at 16ms. */
+ result = ksz9031_extended_write(phydev, OP_DATA, 0,
+ MII_KSZ9031RN_FLP_BURST_TX_HI, 0x0006);
++ if (result)
++ return result;
++
+ result = ksz9031_extended_write(phydev, OP_DATA, 0,
+ MII_KSZ9031RN_FLP_BURST_TX_LO, 0x1A80);
+-
+ if (result)
+ return result;
+
+--
+2.19.0
+
diff --git a/patches/0114-phy-rcar-gen2-Add-r8a7743-5-support.patch b/patches/0114-phy-rcar-gen2-Add-r8a7743-5-support.patch
new file mode 100644
index 0000000..d04fd9e
--- /dev/null
+++ b/patches/0114-phy-rcar-gen2-Add-r8a7743-5-support.patch
@@ -0,0 +1,43 @@
+From 1adef86be1c8d335cf1ddace3fb5c0da38bd967f Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 9 Oct 2017 11:22:23 +0100
+Subject: [PATCH 0114/1795] phy: rcar-gen2: Add r8a7743/5 support
+
+Add USB PHY support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5)
+USB PHY is identical to the R-Car Gen2 family.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Rob Herring <robh@kernel.org>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit f7da4e6d29539bad2c29dd8ccb4ac628fe19f82b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
+index 91da947ae9b6..eeb9e1874ea6 100644
+--- a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
++++ b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
+@@ -4,10 +4,13 @@ This file provides information on what the device node for the R-Car generation
+ 2 USB PHY contains.
+
+ Required properties:
+-- compatible: "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
++- compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
++ "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
++ "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
+ "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
+ "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
+- "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 compatible device.
++ "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 or
++ RZ/G1 compatible device.
+
+ When compatible with the generic version, nodes must list the
+ SoC-specific version corresponding to the platform first
+--
+2.19.0
+
diff --git a/patches/0115-phy-rcar-gen3-usb2-select-USB_COMMON.patch b/patches/0115-phy-rcar-gen3-usb2-select-USB_COMMON.patch
new file mode 100644
index 0000000..1c5ce8c
--- /dev/null
+++ b/patches/0115-phy-rcar-gen3-usb2-select-USB_COMMON.patch
@@ -0,0 +1,42 @@
+From d164b3a815f713ec83339d9c5c141726fb21f5ea Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Thu, 2 Nov 2017 12:56:36 +0100
+Subject: [PATCH 0115/1795] phy: rcar-gen3-usb2: select USB_COMMON
+
+When USB is disabled, we get a link error for this driver
+because of the added OTG support
+
+drivers/phy/renesas/phy-rcar-gen3-usb2.o: In function `rcar_gen3_phy_usb2_probe':
+phy-rcar-gen3-usb2.c:(.text+0x250): undefined reference to `of_usb_get_dr_mode_by_phy'
+
+Other phy drivers select USB_COMMON for this, so let's do the same
+here.
+
+Fixes: 7e0540f41332 ("phy: rcar-gen3-usb2: check dr_mode for otg mode")
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 2b88212c4cc67ff33dec5bb4d690044b97a5f979)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/phy/renesas/Kconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/phy/renesas/Kconfig b/drivers/phy/renesas/Kconfig
+index cb09245e9b4c..c845facacb06 100644
+--- a/drivers/phy/renesas/Kconfig
++++ b/drivers/phy/renesas/Kconfig
+@@ -12,7 +12,9 @@ config PHY_RCAR_GEN3_USB2
+ tristate "Renesas R-Car generation 3 USB 2.0 PHY driver"
+ depends on ARCH_RENESAS
+ depends on EXTCON
++ depends on USB_SUPPORT
+ select GENERIC_PHY
++ select USB_COMMON
+ help
+ Support for USB 2.0 PHY found on Renesas R-Car generation 3 SoCs.
+
+--
+2.19.0
+
diff --git a/patches/0116-extcon-Split-out-extcon-header-file-for-consumer-and.patch b/patches/0116-extcon-Split-out-extcon-header-file-for-consumer-and.patch
new file mode 100644
index 0000000..ee27c39
--- /dev/null
+++ b/patches/0116-extcon-Split-out-extcon-header-file-for-consumer-and.patch
@@ -0,0 +1,724 @@
+From 811e26d8f942680e9f9faed1b6bb91bd8702cdcc Mon Sep 17 00:00:00 2001
+From: Chanwoo Choi <cw00.choi@samsung.com>
+Date: Thu, 21 Sep 2017 12:11:24 +0900
+Subject: [PATCH 0116/1795] extcon: Split out extcon header file for consumer
+ and provider device
+
+The extcon has two type of extcon devices as following.
+- 'extcon provider deivce' adds new extcon device and detect the
+ state/properties of external connector. Also, it notifies the
+ state/properties to the extcon consumer device.
+- 'extcon consumer device' gets the change state/properties
+ from extcon provider device.
+Prior to that, include/linux/extcon.h contains all exported API for
+both provider and consumer device driver. To clarify the meaning of
+header file and to remove the wrong use-case on consumer device,
+this patch separates into extcon.h and extcon-provider.h.
+
+[Description for include/linux/{extcon.h|extcon-provider.h}]
+- extcon.h includes the extcon API and data structure for extcon consumer
+ device driver. This header file contains the following APIs:
+ : Register/unregister the notifier to catch the change of extcon device
+ : Get the extcon device instance
+ : Get the extcon device name
+ : Get the state of each external connector
+ : Get the property value of each external connector
+ : Get the property capability of each external connector
+
+- extcon-provider.h includes the extcon API and data structure for extcon
+ provider device driver. This header file contains the following APIs:
+ : Include 'include/linux/extcon.h'
+ : Allocate the memory for extcon device instance
+ : Register/unregister extcon device
+ : Set the state of each external connector
+ : Set the property value of each external connector
+ : Set the property capability of each external connector
+
+Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
+Acked-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Acked-by: Chen-Yu Tsai <wens@csie.org>
+Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
+Acked-by: Lee Jones <lee.jones@linaro.org>
+Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 176aa36012135d172394a928a03fb03dfecd83f9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/extcon/extcon-adc-jack.c | 2 +-
+ drivers/extcon/extcon-arizona.c | 2 +-
+ drivers/extcon/extcon-axp288.c | 2 +-
+ drivers/extcon/extcon-gpio.c | 2 +-
+ drivers/extcon/extcon-intel-cht-wc.c | 2 +-
+ drivers/extcon/extcon-intel-int3496.c | 2 +-
+ drivers/extcon/extcon-max14577.c | 2 +-
+ drivers/extcon/extcon-max3355.c | 2 +-
+ drivers/extcon/extcon-max77693.c | 2 +-
+ drivers/extcon/extcon-max77843.c | 2 +-
+ drivers/extcon/extcon-max8997.c | 2 +-
+ drivers/extcon/extcon-qcom-spmi-misc.c | 2 +-
+ drivers/extcon/extcon-rt8973a.c | 2 +-
+ drivers/extcon/extcon-sm5502.c | 2 +-
+ drivers/extcon/extcon-usb-gpio.c | 2 +-
+ drivers/extcon/extcon-usbc-cros-ec.c | 2 +-
+ drivers/extcon/extcon.h | 2 +-
+ drivers/phy/allwinner/phy-sun4i-usb.c | 2 +-
+ drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c | 2 +-
+ drivers/phy/renesas/phy-rcar-gen3-usb2.c | 2 +-
+ drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 2 +-
+ drivers/power/supply/qcom_smbb.c | 2 +-
+ drivers/usb/gadget/udc/renesas_usb3.c | 2 +-
+ drivers/usb/phy/phy-tahvo.c | 2 +-
+ include/linux/extcon-provider.h | 142 ++++++++++++++++++
+ include/linux/extcon.h | 109 +-------------
+ include/linux/mfd/palmas.h | 2 +-
+ 27 files changed, 172 insertions(+), 129 deletions(-)
+ create mode 100644 include/linux/extcon-provider.h
+
+diff --git a/drivers/extcon/extcon-adc-jack.c b/drivers/extcon/extcon-adc-jack.c
+index 6f6537ab0a79..3877d86c746a 100644
+--- a/drivers/extcon/extcon-adc-jack.c
++++ b/drivers/extcon/extcon-adc-jack.c
+@@ -26,7 +26,7 @@
+ #include <linux/workqueue.h>
+ #include <linux/iio/consumer.h>
+ #include <linux/extcon/extcon-adc-jack.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ /**
+ * struct adc_jack_data - internal data for adc_jack device driver
+diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c
+index f84da4a17724..da0e9bc4262f 100644
+--- a/drivers/extcon/extcon-arizona.c
++++ b/drivers/extcon/extcon-arizona.c
+@@ -27,7 +27,7 @@
+ #include <linux/pm_runtime.h>
+ #include <linux/property.h>
+ #include <linux/regulator/consumer.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ #include <sound/soc.h>
+
+diff --git a/drivers/extcon/extcon-axp288.c b/drivers/extcon/extcon-axp288.c
+index f4fd03e58e37..981fba56bc18 100644
+--- a/drivers/extcon/extcon-axp288.c
++++ b/drivers/extcon/extcon-axp288.c
+@@ -22,7 +22,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/property.h>
+ #include <linux/notifier.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/regmap.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+diff --git a/drivers/extcon/extcon-gpio.c b/drivers/extcon/extcon-gpio.c
+index ebed22f22d75..ab770adcca7e 100644
+--- a/drivers/extcon/extcon-gpio.c
++++ b/drivers/extcon/extcon-gpio.c
+@@ -17,7 +17,7 @@
+ * GNU General Public License for more details.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/extcon/extcon-gpio.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+diff --git a/drivers/extcon/extcon-intel-cht-wc.c b/drivers/extcon/extcon-intel-cht-wc.c
+index 60baaf693103..b7e9ea377d70 100644
+--- a/drivers/extcon/extcon-intel-cht-wc.c
++++ b/drivers/extcon/extcon-intel-cht-wc.c
+@@ -15,7 +15,7 @@
+ * more details.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+ #include <linux/mfd/intel_soc_pmic.h>
+diff --git a/drivers/extcon/extcon-intel-int3496.c b/drivers/extcon/extcon-intel-int3496.c
+index a6661097b2f9..191e99f06a9a 100644
+--- a/drivers/extcon/extcon-intel-int3496.c
++++ b/drivers/extcon/extcon-intel-int3496.c
+@@ -19,7 +19,7 @@
+ */
+
+ #include <linux/acpi.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/gpio.h>
+ #include <linux/interrupt.h>
+ #include <linux/module.h>
+diff --git a/drivers/extcon/extcon-max14577.c b/drivers/extcon/extcon-max14577.c
+index f6414b7fa5bc..6c2c9996eb71 100644
+--- a/drivers/extcon/extcon-max14577.c
++++ b/drivers/extcon/extcon-max14577.c
+@@ -23,7 +23,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/mfd/max14577.h>
+ #include <linux/mfd/max14577-private.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ #define DELAY_MS_DEFAULT 17000 /* unit: millisecond */
+
+diff --git a/drivers/extcon/extcon-max3355.c b/drivers/extcon/extcon-max3355.c
+index 533e16a952b8..0aa410836f4e 100644
+--- a/drivers/extcon/extcon-max3355.c
++++ b/drivers/extcon/extcon-max3355.c
+@@ -9,7 +9,7 @@
+ * may be copied, distributed, and modified under those terms.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+ #include <linux/interrupt.h>
+diff --git a/drivers/extcon/extcon-max77693.c b/drivers/extcon/extcon-max77693.c
+index 7a5856809047..643411066ad9 100644
+--- a/drivers/extcon/extcon-max77693.c
++++ b/drivers/extcon/extcon-max77693.c
+@@ -26,7 +26,7 @@
+ #include <linux/mfd/max77693.h>
+ #include <linux/mfd/max77693-common.h>
+ #include <linux/mfd/max77693-private.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/regmap.h>
+ #include <linux/irqdomain.h>
+
+diff --git a/drivers/extcon/extcon-max77843.c b/drivers/extcon/extcon-max77843.c
+index 6e722d552cf1..28f251ff0fa2 100644
+--- a/drivers/extcon/extcon-max77843.c
++++ b/drivers/extcon/extcon-max77843.c
+@@ -11,7 +11,7 @@
+ * (at your option) any later version.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/i2c.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+diff --git a/drivers/extcon/extcon-max8997.c b/drivers/extcon/extcon-max8997.c
+index 4a0612fb9c07..8152790d72e1 100644
+--- a/drivers/extcon/extcon-max8997.c
++++ b/drivers/extcon/extcon-max8997.c
+@@ -25,7 +25,7 @@
+ #include <linux/kobject.h>
+ #include <linux/mfd/max8997.h>
+ #include <linux/mfd/max8997-private.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/irqdomain.h>
+
+ #define DEV_NAME "max8997-muic"
+diff --git a/drivers/extcon/extcon-qcom-spmi-misc.c b/drivers/extcon/extcon-qcom-spmi-misc.c
+index b8cde096a808..660bbf163bf5 100644
+--- a/drivers/extcon/extcon-qcom-spmi-misc.c
++++ b/drivers/extcon/extcon-qcom-spmi-misc.c
+@@ -15,7 +15,7 @@
+ * GNU General Public License for more details.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+diff --git a/drivers/extcon/extcon-rt8973a.c b/drivers/extcon/extcon-rt8973a.c
+index eaa355e7d9e4..e059bd5f2041 100644
+--- a/drivers/extcon/extcon-rt8973a.c
++++ b/drivers/extcon/extcon-rt8973a.c
+@@ -20,7 +20,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/regmap.h>
+ #include <linux/slab.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ #include "extcon-rt8973a.h"
+
+diff --git a/drivers/extcon/extcon-sm5502.c b/drivers/extcon/extcon-sm5502.c
+index 106ef0297b53..0cfb5a3efdf6 100644
+--- a/drivers/extcon/extcon-sm5502.c
++++ b/drivers/extcon/extcon-sm5502.c
+@@ -19,7 +19,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/regmap.h>
+ #include <linux/slab.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ #include "extcon-sm5502.h"
+
+diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon-usb-gpio.c
+index 9c925b05b7aa..53762864a9f7 100644
+--- a/drivers/extcon/extcon-usb-gpio.c
++++ b/drivers/extcon/extcon-usb-gpio.c
+@@ -14,7 +14,7 @@
+ * GNU General Public License for more details.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+ #include <linux/init.h>
+diff --git a/drivers/extcon/extcon-usbc-cros-ec.c b/drivers/extcon/extcon-usbc-cros-ec.c
+index 598956f1dcae..6187f731b29d 100644
+--- a/drivers/extcon/extcon-usbc-cros-ec.c
++++ b/drivers/extcon/extcon-usbc-cros-ec.c
+@@ -14,7 +14,7 @@
+ * GNU General Public License for more details.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/mfd/cros_ec.h>
+ #include <linux/module.h>
+diff --git a/drivers/extcon/extcon.h b/drivers/extcon/extcon.h
+index 61358479bfcc..93b5e0306966 100644
+--- a/drivers/extcon/extcon.h
++++ b/drivers/extcon/extcon.h
+@@ -2,7 +2,7 @@
+ #ifndef __LINUX_EXTCON_INTERNAL_H__
+ #define __LINUX_EXTCON_INTERNAL_H__
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ /**
+ * struct extcon_dev - An extcon device represents one external connector.
+diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
+index afedb8cd1990..263e2562de3b 100644
+--- a/drivers/phy/allwinner/phy-sun4i-usb.c
++++ b/drivers/phy/allwinner/phy-sun4i-usb.c
+@@ -24,7 +24,7 @@
+ #include <linux/clk.h>
+ #include <linux/delay.h>
+ #include <linux/err.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/io.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+diff --git a/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c b/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
+index d099a0c8cee5..7ceea5ae2704 100644
+--- a/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
++++ b/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
+@@ -12,7 +12,7 @@
+ */
+
+ #include <linux/delay.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+ #include <linux/init.h>
+diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+index 54c34298a000..b33e2994ccce 100644
+--- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
++++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+@@ -12,7 +12,7 @@
+ * published by the Free Software Foundation.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/interrupt.h>
+ #include <linux/io.h>
+ #include <linux/module.h>
+diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+index ee7ce5ee53f9..5049dac79bd0 100644
+--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
++++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+@@ -17,7 +17,7 @@
+ #include <linux/clk.h>
+ #include <linux/clk-provider.h>
+ #include <linux/delay.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/interrupt.h>
+ #include <linux/io.h>
+ #include <linux/gpio/consumer.h>
+diff --git a/drivers/power/supply/qcom_smbb.c b/drivers/power/supply/qcom_smbb.c
+index f6a0d245731d..11de691b9a71 100644
+--- a/drivers/power/supply/qcom_smbb.c
++++ b/drivers/power/supply/qcom_smbb.c
+@@ -34,7 +34,7 @@
+ #include <linux/power_supply.h>
+ #include <linux/regmap.h>
+ #include <linux/slab.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/regulator/driver.h>
+
+ #define SMBB_CHG_VMAX 0x040
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index c12a1a6554ba..8de7d72b130b 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -12,7 +12,7 @@
+ #include <linux/delay.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/err.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/interrupt.h>
+ #include <linux/io.h>
+ #include <linux/module.h>
+diff --git a/drivers/usb/phy/phy-tahvo.c b/drivers/usb/phy/phy-tahvo.c
+index 1ec00eae339a..bf2c364867a0 100644
+--- a/drivers/usb/phy/phy-tahvo.c
++++ b/drivers/usb/phy/phy-tahvo.c
+@@ -23,7 +23,7 @@
+ #include <linux/io.h>
+ #include <linux/clk.h>
+ #include <linux/usb.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+ #include <linux/usb/otg.h>
+diff --git a/include/linux/extcon-provider.h b/include/linux/extcon-provider.h
+new file mode 100644
+index 000000000000..2feca5881fa7
+--- /dev/null
++++ b/include/linux/extcon-provider.h
+@@ -0,0 +1,142 @@
++/*
++ * External Connector (extcon) framework
++ * - linux/include/linux/extcon-provider.h for extcon provider device driver.
++ *
++ * Copyright (C) 2017 Samsung Electronics
++ * Author: Chanwoo Choi <cw00.choi@samsung.com>
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#ifndef __LINUX_EXTCON_PROVIDER_H__
++#define __LINUX_EXTCON_PROVIDER_H__
++
++#include <linux/extcon.h>
++
++struct extcon_dev;
++
++#if IS_ENABLED(CONFIG_EXTCON)
++
++/* Following APIs register/unregister the extcon device. */
++extern int extcon_dev_register(struct extcon_dev *edev);
++extern void extcon_dev_unregister(struct extcon_dev *edev);
++extern int devm_extcon_dev_register(struct device *dev,
++ struct extcon_dev *edev);
++extern void devm_extcon_dev_unregister(struct device *dev,
++ struct extcon_dev *edev);
++
++/* Following APIs allocate/free the memory of the extcon device. */
++extern struct extcon_dev *extcon_dev_allocate(const unsigned int *cable);
++extern void extcon_dev_free(struct extcon_dev *edev);
++extern struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
++ const unsigned int *cable);
++extern void devm_extcon_dev_free(struct device *dev, struct extcon_dev *edev);
++
++/* Synchronize the state and property value for each external connector. */
++extern int extcon_sync(struct extcon_dev *edev, unsigned int id);
++
++/*
++ * Following APIs set the connected state of each external connector.
++ * The 'id' argument indicates the defined external connector.
++ */
++extern int extcon_set_state(struct extcon_dev *edev, unsigned int id,
++ bool state);
++extern int extcon_set_state_sync(struct extcon_dev *edev, unsigned int id,
++ bool state);
++
++/*
++ * Following APIs set the property of each external connector.
++ * The 'id' argument indicates the defined external connector
++ * and the 'prop' indicates the extcon property.
++ *
++ * And extcon_set_property_capability() set the capability of the property
++ * for each external connector. They are used to set the capability of the
++ * property of each external connector based on the id and property.
++ */
++extern int extcon_set_property(struct extcon_dev *edev, unsigned int id,
++ unsigned int prop,
++ union extcon_property_value prop_val);
++extern int extcon_set_property_sync(struct extcon_dev *edev, unsigned int id,
++ unsigned int prop,
++ union extcon_property_value prop_val);
++extern int extcon_set_property_capability(struct extcon_dev *edev,
++ unsigned int id, unsigned int prop);
++
++#else /* CONFIG_EXTCON */
++static inline int extcon_dev_register(struct extcon_dev *edev)
++{
++ return 0;
++}
++
++static inline void extcon_dev_unregister(struct extcon_dev *edev) { }
++
++static inline int devm_extcon_dev_register(struct device *dev,
++ struct extcon_dev *edev)
++{
++ return -EINVAL;
++}
++
++static inline void devm_extcon_dev_unregister(struct device *dev,
++ struct extcon_dev *edev) { }
++
++static inline struct extcon_dev *extcon_dev_allocate(const unsigned int *cable)
++{
++ return ERR_PTR(-ENOSYS);
++}
++
++static inline void extcon_dev_free(struct extcon_dev *edev) { }
++
++static inline struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
++ const unsigned int *cable)
++{
++ return ERR_PTR(-ENOSYS);
++}
++
++static inline void devm_extcon_dev_free(struct extcon_dev *edev) { }
++
++
++static inline int extcon_set_state(struct extcon_dev *edev, unsigned int id,
++ bool state)
++{
++ return 0;
++}
++
++static inline int extcon_set_state_sync(struct extcon_dev *edev, unsigned int id,
++ bool state)
++{
++ return 0;
++}
++
++static inline int extcon_sync(struct extcon_dev *edev, unsigned int id)
++{
++ return 0;
++}
++
++static inline int extcon_set_property(struct extcon_dev *edev, unsigned int id,
++ unsigned int prop,
++ union extcon_property_value prop_val)
++{
++ return 0;
++}
++
++static inline int extcon_set_property_sync(struct extcon_dev *edev,
++ unsigned int id, unsigned int prop,
++ union extcon_property_value prop_val)
++{
++ return 0;
++}
++
++static inline int extcon_set_property_capability(struct extcon_dev *edev,
++ unsigned int id, unsigned int prop)
++{
++ return 0;
++}
++#endif /* CONFIG_EXTCON */
++#endif /* __LINUX_EXTCON_PROVIDER_H__ */
+diff --git a/include/linux/extcon.h b/include/linux/extcon.h
+index 744d60ca80c3..6d94e82c8ad9 100644
+--- a/include/linux/extcon.h
++++ b/include/linux/extcon.h
+@@ -1,5 +1,6 @@
+ /*
+ * External Connector (extcon) framework
++ * - linux/include/linux/extcon.h for extcon consumer device driver.
+ *
+ * Copyright (C) 2015 Samsung Electronics
+ * Author: Chanwoo Choi <cw00.choi@samsung.com>
+@@ -170,61 +171,29 @@ union extcon_property_value {
+ int intval; /* type : integer (intval) */
+ };
+
+-struct extcon_cable;
+ struct extcon_dev;
+
+ #if IS_ENABLED(CONFIG_EXTCON)
+-
+-/* Following APIs register/unregister the extcon device. */
+-extern int extcon_dev_register(struct extcon_dev *edev);
+-extern void extcon_dev_unregister(struct extcon_dev *edev);
+-extern int devm_extcon_dev_register(struct device *dev,
+- struct extcon_dev *edev);
+-extern void devm_extcon_dev_unregister(struct device *dev,
+- struct extcon_dev *edev);
+-
+-/* Following APIs allocate/free the memory of the extcon device. */
+-extern struct extcon_dev *extcon_dev_allocate(const unsigned int *cable);
+-extern void extcon_dev_free(struct extcon_dev *edev);
+-extern struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
+- const unsigned int *cable);
+-extern void devm_extcon_dev_free(struct device *dev, struct extcon_dev *edev);
+-
+-/* Synchronize the state and property value for each external connector. */
+-extern int extcon_sync(struct extcon_dev *edev, unsigned int id);
+-
+ /*
+- * Following APIs get/set the connected state of each external connector.
++ * Following APIs get the connected state of each external connector.
+ * The 'id' argument indicates the defined external connector.
+ */
+ extern int extcon_get_state(struct extcon_dev *edev, unsigned int id);
+-extern int extcon_set_state(struct extcon_dev *edev, unsigned int id,
+- bool state);
+-extern int extcon_set_state_sync(struct extcon_dev *edev, unsigned int id,
+- bool state);
+
+ /*
+- * Following APIs get/set the property of each external connector.
++ * Following APIs get the property of each external connector.
+ * The 'id' argument indicates the defined external connector
+ * and the 'prop' indicates the extcon property.
+ *
+- * And extcon_get/set_property_capability() set the capability of the property
+- * for each external connector. They are used to set the capability of the
++ * And extcon_get_property_capability() get the capability of the property
++ * for each external connector. They are used to get the capability of the
+ * property of each external connector based on the id and property.
+ */
+ extern int extcon_get_property(struct extcon_dev *edev, unsigned int id,
+ unsigned int prop,
+ union extcon_property_value *prop_val);
+-extern int extcon_set_property(struct extcon_dev *edev, unsigned int id,
+- unsigned int prop,
+- union extcon_property_value prop_val);
+-extern int extcon_set_property_sync(struct extcon_dev *edev, unsigned int id,
+- unsigned int prop,
+- union extcon_property_value prop_val);
+ extern int extcon_get_property_capability(struct extcon_dev *edev,
+ unsigned int id, unsigned int prop);
+-extern int extcon_set_property_capability(struct extcon_dev *edev,
+- unsigned int id, unsigned int prop);
+
+ /*
+ * Following APIs register the notifier block in order to detect
+@@ -268,79 +237,17 @@ extern struct extcon_dev *extcon_get_edev_by_phandle(struct device *dev,
+ extern const char *extcon_get_edev_name(struct extcon_dev *edev);
+
+ #else /* CONFIG_EXTCON */
+-static inline int extcon_dev_register(struct extcon_dev *edev)
+-{
+- return 0;
+-}
+-
+-static inline void extcon_dev_unregister(struct extcon_dev *edev) { }
+-
+-static inline int devm_extcon_dev_register(struct device *dev,
+- struct extcon_dev *edev)
+-{
+- return -EINVAL;
+-}
+-
+-static inline void devm_extcon_dev_unregister(struct device *dev,
+- struct extcon_dev *edev) { }
+-
+-static inline struct extcon_dev *extcon_dev_allocate(const unsigned int *cable)
+-{
+- return ERR_PTR(-ENOSYS);
+-}
+-
+-static inline void extcon_dev_free(struct extcon_dev *edev) { }
+-
+-static inline struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
+- const unsigned int *cable)
+-{
+- return ERR_PTR(-ENOSYS);
+-}
+-
+-static inline void devm_extcon_dev_free(struct extcon_dev *edev) { }
+-
+-
+ static inline int extcon_get_state(struct extcon_dev *edev, unsigned int id)
+ {
+ return 0;
+ }
+
+-static inline int extcon_set_state(struct extcon_dev *edev, unsigned int id,
+- bool state)
+-{
+- return 0;
+-}
+-
+-static inline int extcon_set_state_sync(struct extcon_dev *edev, unsigned int id,
+- bool state)
+-{
+- return 0;
+-}
+-
+-static inline int extcon_sync(struct extcon_dev *edev, unsigned int id)
+-{
+- return 0;
+-}
+-
+ static inline int extcon_get_property(struct extcon_dev *edev, unsigned int id,
+ unsigned int prop,
+ union extcon_property_value *prop_val)
+ {
+ return 0;
+ }
+-static inline int extcon_set_property(struct extcon_dev *edev, unsigned int id,
+- unsigned int prop,
+- union extcon_property_value prop_val)
+-{
+- return 0;
+-}
+-
+-static inline int extcon_set_property_sync(struct extcon_dev *edev,
+- unsigned int id, unsigned int prop,
+- union extcon_property_value prop_val)
+-{
+- return 0;
+-}
+
+ static inline int extcon_get_property_capability(struct extcon_dev *edev,
+ unsigned int id, unsigned int prop)
+@@ -348,12 +255,6 @@ static inline int extcon_get_property_capability(struct extcon_dev *edev,
+ return 0;
+ }
+
+-static inline int extcon_set_property_capability(struct extcon_dev *edev,
+- unsigned int id, unsigned int prop)
+-{
+- return 0;
+-}
+-
+ static inline int extcon_register_notifier(struct extcon_dev *edev,
+ unsigned int id, struct notifier_block *nb)
+ {
+diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
+index 6dec43826303..3c8568aa82a5 100644
+--- a/include/linux/mfd/palmas.h
++++ b/include/linux/mfd/palmas.h
+@@ -20,7 +20,7 @@
+ #include <linux/leds.h>
+ #include <linux/regmap.h>
+ #include <linux/regulator/driver.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/of_gpio.h>
+ #include <linux/usb/phy_companion.h>
+
+--
+2.19.0
+
diff --git a/patches/0117-phy-rcar-gen3-usb2-check-dr_mode-for-otg-mode.patch b/patches/0117-phy-rcar-gen3-usb2-check-dr_mode-for-otg-mode.patch
new file mode 100644
index 0000000..943b180
--- /dev/null
+++ b/patches/0117-phy-rcar-gen3-usb2-check-dr_mode-for-otg-mode.patch
@@ -0,0 +1,66 @@
+From 65e4bd402be9b3c6456ad68d428938b1f6e433c1 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 12 Oct 2017 15:34:45 +0900
+Subject: [PATCH 0117/1795] phy: rcar-gen3-usb2: check dr_mode for otg mode
+
+The previous code assumed a channel has otg capability if a channel
+has interrupt property. But, it is not good because:
+ - Battery charging feature also needs interrupt property.
+ - Some R-Car Gen3 SoCs (e.g. R-Car D3) don't have OTG capability.
+
+So, this patch checks whether usb 2.0 host node has dr_mode property or
+not. If it has 'dr_mode = "otg";', this driver enables otg capability.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 7e0540f41332cb07055c5fe6629dc83c71974c82)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/phy/renesas/phy-rcar-gen3-usb2.c | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+index b33e2994ccce..cc70dca47212 100644
+--- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
++++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+@@ -1,7 +1,7 @@
+ /*
+ * Renesas R-Car Gen3 for USB2.0 PHY driver
+ *
+- * Copyright (C) 2015 Renesas Electronics Corporation
++ * Copyright (C) 2015-2017 Renesas Electronics Corporation
+ *
+ * This is based on the phy-rcar-gen2 driver:
+ * Copyright (C) 2014 Renesas Solutions Corp.
+@@ -22,6 +22,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/regulator/consumer.h>
++#include <linux/usb/of.h>
+ #include <linux/workqueue.h>
+
+ /******* USB2.0 Host registers (original offset is +0x200) *******/
+@@ -415,13 +416,16 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
+ /* call request_irq for OTG */
+ irq = platform_get_irq(pdev, 0);
+ if (irq >= 0) {
+- int ret;
+-
+ INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
+ irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
+ IRQF_SHARED, dev_name(dev), channel);
+ if (irq < 0)
+ dev_err(dev, "No irq handler (%d)\n", irq);
++ }
++
++ if (of_usb_get_dr_mode_by_phy(dev->of_node, 0) == USB_DR_MODE_OTG) {
++ int ret;
++
+ channel->has_otg = true;
+ channel->extcon = devm_extcon_dev_allocate(dev,
+ rcar_gen3_phy_cable);
+--
+2.19.0
+
diff --git a/patches/0118-phy-rcar-gen3-usb2-use-enum-phy_mode-in-the-role_sto.patch b/patches/0118-phy-rcar-gen3-usb2-use-enum-phy_mode-in-the-role_sto.patch
new file mode 100644
index 0000000..f355edf
--- /dev/null
+++ b/patches/0118-phy-rcar-gen3-usb2-use-enum-phy_mode-in-the-role_sto.patch
@@ -0,0 +1,78 @@
+From 915e2b2c574fa47b88bbff81a8ed18ac8c5b3b51 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 12 Oct 2017 15:34:46 +0900
+Subject: [PATCH 0118/1795] phy: rcar-gen3-usb2: use enum phy_mode in the
+ role_store()
+
+This patch modifies the role_store() to use "enum phy_mode" instead
+of the local "bool" for host/device mode selection.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit b56acc82f9719d6aa1c1003ac7e34391da85a824)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/phy/renesas/phy-rcar-gen3-usb2.c | 29 +++++++++++++++---------
+ 1 file changed, 18 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+index cc70dca47212..e77bc50bfc26 100644
+--- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
++++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+@@ -219,33 +219,40 @@ static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
+ return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
+ }
+
++static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
++{
++ if (rcar_gen3_is_host(ch))
++ return PHY_MODE_USB_HOST;
++
++ return PHY_MODE_USB_DEVICE;
++}
++
+ static ssize_t role_store(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+ {
+ struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
+- bool is_b_device, is_host, new_mode_is_host;
++ bool is_b_device;
++ enum phy_mode cur_mode, new_mode;
+
+ if (!ch->has_otg || !ch->phy->init_count)
+ return -EIO;
+
+- /*
+- * is_b_device: true is B-Device. false is A-Device.
+- * If {new_mode_}is_host: true is Host mode. false is Peripheral mode.
+- */
+- is_b_device = rcar_gen3_check_id(ch);
+- is_host = rcar_gen3_is_host(ch);
+ if (!strncmp(buf, "host", strlen("host")))
+- new_mode_is_host = true;
++ new_mode = PHY_MODE_USB_HOST;
+ else if (!strncmp(buf, "peripheral", strlen("peripheral")))
+- new_mode_is_host = false;
++ new_mode = PHY_MODE_USB_DEVICE;
+ else
+ return -EINVAL;
+
++ /* is_b_device: true is B-Device. false is A-Device. */
++ is_b_device = rcar_gen3_check_id(ch);
++ cur_mode = rcar_gen3_get_phy_mode(ch);
++
+ /* If current and new mode is the same, this returns the error */
+- if (is_host == new_mode_is_host)
++ if (cur_mode == new_mode)
+ return -EINVAL;
+
+- if (new_mode_is_host) { /* And is_host must be false */
++ if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
+ if (!is_b_device) /* A-Peripheral */
+ rcar_gen3_init_from_a_peri_to_a_host(ch);
+ else /* B-Peripheral */
+--
+2.19.0
+
diff --git a/patches/0119-phy-rcar-gen3-usb2-add-SoC-specific-parameter-for-de.patch b/patches/0119-phy-rcar-gen3-usb2-add-SoC-specific-parameter-for-de.patch
new file mode 100644
index 0000000..d268903
--- /dev/null
+++ b/patches/0119-phy-rcar-gen3-usb2-add-SoC-specific-parameter-for-de.patch
@@ -0,0 +1,130 @@
+From 6b9daa7867c82371d4105f4b8dca8ba3ebc88c11 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 12 Oct 2017 15:34:47 +0900
+Subject: [PATCH 0119/1795] phy: rcar-gen3-usb2: add SoC-specific parameter for
+ dedicated pins
+
+This patch adds SoC-specific parameter to avoid reading/writing
+specific registers wrongly if this driver runs on a SoC which doesn't
+have dedicated pins (e.g. R-Car D3). This patch also changes the
+value "has_otg" to "has_otg_pins" for slightly easier reading of
+the code.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 9adaaa9e4517afb8c5cb8931cc4ea0f81f54d396)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/phy/renesas/phy-rcar-gen3-usb2.c | 31 ++++++++++++++++--------
+ 1 file changed, 21 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+index e77bc50bfc26..9c90e7d67e0a 100644
+--- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
++++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+@@ -18,6 +18,7 @@
+ #include <linux/module.h>
+ #include <linux/of.h>
+ #include <linux/of_address.h>
++#include <linux/of_device.h>
+ #include <linux/phy/phy.h>
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+@@ -80,6 +81,8 @@
+ #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
+ #define USB2_ADPCTRL_DRVVBUS BIT(4)
+
++#define RCAR_GEN3_PHY_HAS_DEDICATED_PINS 1
++
+ struct rcar_gen3_chan {
+ void __iomem *base;
+ struct extcon_dev *extcon;
+@@ -87,7 +90,7 @@ struct rcar_gen3_chan {
+ struct regulator *vbus;
+ struct work_struct work;
+ bool extcon_host;
+- bool has_otg;
++ bool has_otg_pins;
+ };
+
+ static void rcar_gen3_phy_usb2_work(struct work_struct *work)
+@@ -234,7 +237,7 @@ static ssize_t role_store(struct device *dev, struct device_attribute *attr,
+ bool is_b_device;
+ enum phy_mode cur_mode, new_mode;
+
+- if (!ch->has_otg || !ch->phy->init_count)
++ if (!ch->has_otg_pins || !ch->phy->init_count)
+ return -EIO;
+
+ if (!strncmp(buf, "host", strlen("host")))
+@@ -272,7 +275,7 @@ static ssize_t role_show(struct device *dev, struct device_attribute *attr,
+ {
+ struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
+
+- if (!ch->has_otg || !ch->phy->init_count)
++ if (!ch->has_otg_pins || !ch->phy->init_count)
+ return -EIO;
+
+ return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
+@@ -311,7 +314,7 @@ static int rcar_gen3_phy_usb2_init(struct phy *p)
+ writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
+
+ /* Initialize otg part */
+- if (channel->has_otg)
++ if (channel->has_otg_pins)
+ rcar_gen3_init_otg(channel);
+
+ return 0;
+@@ -385,9 +388,17 @@ static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
+ }
+
+ static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
+- { .compatible = "renesas,usb2-phy-r8a7795" },
+- { .compatible = "renesas,usb2-phy-r8a7796" },
+- { .compatible = "renesas,rcar-gen3-usb2-phy" },
++ {
++ .compatible = "renesas,usb2-phy-r8a7795",
++ .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
++ },
++ {
++ .compatible = "renesas,usb2-phy-r8a7796",
++ .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
++ },
++ {
++ .compatible = "renesas,rcar-gen3-usb2-phy",
++ },
+ { }
+ };
+ MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
+@@ -433,7 +444,7 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
+ if (of_usb_get_dr_mode_by_phy(dev->of_node, 0) == USB_DR_MODE_OTG) {
+ int ret;
+
+- channel->has_otg = true;
++ channel->has_otg_pins = (uintptr_t)of_device_get_match_data(dev);
+ channel->extcon = devm_extcon_dev_allocate(dev,
+ rcar_gen3_phy_cable);
+ if (IS_ERR(channel->extcon))
+@@ -475,7 +486,7 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
+ dev_err(dev, "Failed to register PHY provider\n");
+ ret = PTR_ERR(provider);
+ goto error;
+- } else if (channel->has_otg) {
++ } else if (channel->has_otg_pins) {
+ int ret;
+
+ ret = device_create_file(dev, &dev_attr_role);
+@@ -495,7 +506,7 @@ static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
+ {
+ struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
+
+- if (channel->has_otg)
++ if (channel->has_otg_pins)
+ device_remove_file(&pdev->dev, &dev_attr_role);
+
+ pm_runtime_disable(&pdev->dev);
+--
+2.19.0
+
diff --git a/patches/0120-phy-rcar-gen3-usb2-add-binding-for-r8a77995.patch b/patches/0120-phy-rcar-gen3-usb2-add-binding-for-r8a77995.patch
new file mode 100644
index 0000000..3f2fdef
--- /dev/null
+++ b/patches/0120-phy-rcar-gen3-usb2-add-binding-for-r8a77995.patch
@@ -0,0 +1,38 @@
+From a4520dd0632c61b1367f8fbaca8328999e9557d8 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 12 Oct 2017 15:34:48 +0900
+Subject: [PATCH 0120/1795] phy: rcar-gen3-usb2: add binding for r8a77995
+
+This patch adds binding for r8a77995 (R-Car D3). Since r8a77995 doesn't
+have dedicated pins (ID, VBUS), this will match against the generic
+fallback on R-Car D3.
+
+For now, this driver doesn't support usb role swap for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 6100ef093ba7b99efbb8b6c62b6af3c72fc82ddb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
+index ace9cce2704a..99b651b33110 100644
+--- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
++++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
+@@ -8,6 +8,8 @@ Required properties:
+ SoC.
+ "renesas,usb2-phy-r8a7796" if the device is a part of an R8A7796
+ SoC.
++ "renesas,usb2-phy-r8a77995" if the device is a part of an
++ R8A77995 SoC.
+ "renesas,rcar-gen3-usb2-phy" for a generic R-Car Gen3 compatible device.
+
+ When compatible with the generic version, nodes must list the
+--
+2.19.0
+
diff --git a/patches/0121-dt-bindings-pwm-Add-R-Car-D3-device-tree-bindings.patch b/patches/0121-dt-bindings-pwm-Add-R-Car-D3-device-tree-bindings.patch
new file mode 100644
index 0000000..4d3fa3f
--- /dev/null
+++ b/patches/0121-dt-bindings-pwm-Add-R-Car-D3-device-tree-bindings.patch
@@ -0,0 +1,33 @@
+From 663c5d382d9ce7d3f58031ebcc8478dee7d685b2 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 4 Oct 2017 19:10:38 +0900
+Subject: [PATCH 0121/1795] dt-bindings: pwm: Add R-Car D3 device tree bindings
+
+Add device tree bindings for the PWM controller found on R-Car D3 SoCs.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
+(cherry picked from commit ccb4e74aebb6fbd56fc6783f4d5c6ded48bc2f5d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt
+index 7e94b802395d..74c118015980 100644
+--- a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt
++++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt
+@@ -9,6 +9,7 @@ Required Properties:
+ - "renesas,pwm-r8a7794": for R-Car E2
+ - "renesas,pwm-r8a7795": for R-Car H3
+ - "renesas,pwm-r8a7796": for R-Car M3-W
++ - "renesas,pwm-r8a77995": for R-Car D3
+ - reg: base address and length of the registers block for the PWM.
+ - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+ the cells format.
+--
+2.19.0
+
diff --git a/patches/0122-ravb-document-R8A77970-bindings.patch b/patches/0122-ravb-document-R8A77970-bindings.patch
new file mode 100644
index 0000000..ef9f458
--- /dev/null
+++ b/patches/0122-ravb-document-R8A77970-bindings.patch
@@ -0,0 +1,43 @@
+From 7d2c95da8aa6b9262313b280a3e7bb09cfe598da Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 12 Sep 2017 23:02:08 +0300
+Subject: [PATCH 0122/1795] ravb: document R8A77970 bindings
+
+R-Car V3M (R8A77970) SoC also has the R-Car gen3 compatible EtherAVB
+device, so document the SoC specific bindings.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 785ec87483d1e24a012ecf642ee7d07c4118f142)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/net/renesas,ravb.txt | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+index 16723535e1aa..2689211d324c 100644
+--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
++++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+@@ -17,6 +17,7 @@ Required properties:
+
+ - "renesas,etheravb-r8a7795" for the R8A7795 SoC.
+ - "renesas,etheravb-r8a7796" for the R8A7796 SoC.
++ - "renesas,etheravb-r8a77970" for the R8A77970 SoC.
+ - "renesas,etheravb-rcar-gen3" as a fallback for the above
+ R-Car Gen3 devices.
+
+@@ -40,7 +41,7 @@ Optional properties:
+ - interrupt-parent: the phandle for the interrupt controller that services
+ interrupts for this device.
+ - interrupt-names: A list of interrupt names.
+- For the R8A779[56] SoCs this property is mandatory;
++ For the R-Car Gen 3 SoCs this property is mandatory;
+ it should include one entry per channel, named "ch%u",
+ where %u is the channel number ranging from 0 to 24.
+ For other SoCs this property is optional; if present
+--
+2.19.0
+
diff --git a/patches/0123-dt-bindings-net-renesas-ravb-Add-support-for-R8A7799.patch b/patches/0123-dt-bindings-net-renesas-ravb-Add-support-for-R8A7799.patch
new file mode 100644
index 0000000..954dc11
--- /dev/null
+++ b/patches/0123-dt-bindings-net-renesas-ravb-Add-support-for-R8A7799.patch
@@ -0,0 +1,35 @@
+From 5075f1be625364ba3f2618d3ffd86818ffcee05b Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 09:06:38 +0900
+Subject: [PATCH 0123/1795] dt-bindings: net: renesas-ravb: Add support for
+ R8A77995 RAVB
+
+Add a new compatible string for the R8A77995 (R-Car D3) RAVB.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit f231c4178a655b09c1fe4dce4b09de7b867c20af)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/net/renesas,ravb.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+index 2689211d324c..c902261893b9 100644
+--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
++++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+@@ -18,6 +18,7 @@ Required properties:
+ - "renesas,etheravb-r8a7795" for the R8A7795 SoC.
+ - "renesas,etheravb-r8a7796" for the R8A7796 SoC.
+ - "renesas,etheravb-r8a77970" for the R8A77970 SoC.
++ - "renesas,etheravb-r8a77995" for the R8A77995 SoC.
+ - "renesas,etheravb-rcar-gen3" as a fallback for the above
+ R-Car Gen3 devices.
+
+--
+2.19.0
+
diff --git a/patches/0124-ravb-RX-checksum-offload.patch b/patches/0124-ravb-RX-checksum-offload.patch
new file mode 100644
index 0000000..b23e91f
--- /dev/null
+++ b/patches/0124-ravb-RX-checksum-offload.patch
@@ -0,0 +1,194 @@
+From ba2d31b8fd93bc2a7bd5787aa89e33038709a107 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 4 Oct 2017 09:54:27 +0200
+Subject: [PATCH 0124/1795] ravb: RX checksum offload
+
+Add support for RX checksum offload. This is enabled by default and
+may be disabled and re-enabled using ethtool:
+
+ # ethtool -K eth0 rx off
+ # ethtool -K eth0 rx on
+
+The RAVB provides a simple checksumming scheme which appears to be
+completely compatible with CHECKSUM_COMPLETE: sum of all packet data after
+the L2 header is appended to packet data; this may be trivially read by the
+driver and used to update the skb accordingly.
+
+In terms of performance throughput is close to gigabit line-rate both with
+and without RX checksum offload enabled. Perf output, however, appears to
+indicate that significantly less time is spent in do_csum(). This is as
+expected.
+
+Test results with RX checksum offload enabled:
+ # /usr/bin/perf_3.16 record -o /run/perf.data -a netperf -t TCP_MAERTS -H 10.4.3.162
+ MIGRATED TCP MAERTS TEST from 0.0.0.0 (0.0.0.0) port 0 AF_INET to 10.4.3.162 () port 0 AF_INET : demo
+ enable_enobufs failed: getprotobyname
+ Recv Send Send
+ Socket Socket Message Elapsed
+ Size Size Size Time Throughput
+ bytes bytes bytes secs. 10^6bits/sec
+
+ 87380 16384 16384 10.00 937.54
+
+ Summary of output of perf report:
+ 18.28% ksoftirqd/0 [kernel.kallsyms] [k] _raw_spin_unlock_irqrestore
+ 10.34% ksoftirqd/0 [kernel.kallsyms] [k] __pi_memcpy
+ 9.83% ksoftirqd/0 [kernel.kallsyms] [k] ravb_poll
+ 7.89% ksoftirqd/0 [kernel.kallsyms] [k] skb_put
+ 4.01% ksoftirqd/0 [kernel.kallsyms] [k] dev_gro_receive
+ 3.37% netperf [kernel.kallsyms] [k] __arch_copy_to_user
+ 3.17% swapper [kernel.kallsyms] [k] arch_cpu_idle
+ 2.55% swapper [kernel.kallsyms] [k] tick_nohz_idle_enter
+ 2.04% ksoftirqd/0 [kernel.kallsyms] [k] __pi___inval_dcache_area
+ 2.03% swapper [kernel.kallsyms] [k] _raw_spin_unlock_irq
+ 1.96% ksoftirqd/0 [kernel.kallsyms] [k] __netdev_alloc_skb
+ 1.59% ksoftirqd/0 [kernel.kallsyms] [k] __slab_alloc.isra.83
+
+Test results without RX checksum offload enabled:
+ # /usr/bin/perf_3.16 record -o /run/perf.data -a netperf -t TCP_MAERTS -H 10.4.3.162
+ MIGRATED TCP MAERTS TEST from 0.0.0.0 (0.0.0.0) port 0 AF_INET to 10.4.3.162 () port 0 AF_INET : demo
+ enable_enobufs failed: getprotobyname
+ Recv Send Send
+ Socket Socket Message Elapsed
+ Size Size Size Time Throughput
+ bytes bytes bytes secs. 10^6bits/sec
+
+ 87380 16384 16384 10.00 940.20
+
+ Summary of output of perf report:
+ 17.10% ksoftirqd/0 [kernel.kallsyms] [k] _raw_spin_unlock_irqrestore
+ 10.99% ksoftirqd/0 [kernel.kallsyms] [k] __pi_memcpy
+ 8.87% ksoftirqd/0 [kernel.kallsyms] [k] ravb_poll
+ 8.16% ksoftirqd/0 [kernel.kallsyms] [k] skb_put
+ 7.42% ksoftirqd/0 [kernel.kallsyms] [k] do_csum
+ 3.91% ksoftirqd/0 [kernel.kallsyms] [k] dev_gro_receive
+ 2.31% swapper [kernel.kallsyms] [k] arch_cpu_idle
+ 2.16% ksoftirqd/0 [kernel.kallsyms] [k] __pi___inval_dcache_area
+ 2.14% ksoftirqd/0 [kernel.kallsyms] [k] __netdev_alloc_skb
+ 1.93% netperf [kernel.kallsyms] [k] __arch_copy_to_user
+ 1.79% swapper [kernel.kallsyms] [k] tick_nohz_idle_enter
+ 1.63% ksoftirqd/0 [kernel.kallsyms] [k] __slab_alloc.isra.83
+
+Above results collected on an R-Car Gen 3 Salvator-X/r8a7796 ES1.0.
+Also tested on a R-Car Gen 3 Salvator-X/r8a7795 ES1.0.
+
+By inspection this also appears to be compatible with the ravb found
+on R-Car Gen 2 SoCs, however, this patch is currently untested on such
+hardware.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 4d86d38186271438ef002c5ae6e04836f01bf8bf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 55 +++++++++++++++++++++++-
+ 1 file changed, 54 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index e87a779bfcfe..28b6a9f599bf 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -403,8 +403,9 @@ static void ravb_emac_init(struct net_device *ndev)
+ /* Receive frame limit set register */
+ ravb_write(ndev, ndev->mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN, RFLR);
+
+- /* PAUSE prohibition */
++ /* EMAC Mode: PAUSE prohibition; Duplex; RX Checksum; TX; RX */
+ ravb_write(ndev, ECMR_ZPF | (priv->duplex ? ECMR_DM : 0) |
++ (ndev->features & NETIF_F_RXCSUM ? ECMR_RCSC : 0) |
+ ECMR_TE | ECMR_RE, ECMR);
+
+ ravb_set_rate(ndev);
+@@ -520,6 +521,19 @@ static void ravb_get_tx_tstamp(struct net_device *ndev)
+ }
+ }
+
++static void ravb_rx_csum(struct sk_buff *skb)
++{
++ u8 *hw_csum;
++
++ /* The hardware checksum is 2 bytes appended to packet data */
++ if (unlikely(skb->len < 2))
++ return;
++ hw_csum = skb_tail_pointer(skb) - 2;
++ skb->csum = csum_unfold((__force __sum16)get_unaligned_le16(hw_csum));
++ skb->ip_summed = CHECKSUM_COMPLETE;
++ skb_trim(skb, skb->len - 2);
++}
++
+ /* Packet receive function for Ethernet AVB */
+ static bool ravb_rx(struct net_device *ndev, int *quota, int q)
+ {
+@@ -587,8 +601,11 @@ static bool ravb_rx(struct net_device *ndev, int *quota, int q)
+ ts.tv_nsec = le32_to_cpu(desc->ts_n);
+ shhwtstamps->hwtstamp = timespec64_to_ktime(ts);
+ }
++
+ skb_put(skb, pkt_len);
+ skb->protocol = eth_type_trans(skb, ndev);
++ if (ndev->features & NETIF_F_RXCSUM)
++ ravb_rx_csum(skb);
+ napi_gro_receive(&priv->napi[q], skb);
+ stats->rx_packets++;
+ stats->rx_bytes += pkt_len;
+@@ -1818,6 +1835,38 @@ static int ravb_do_ioctl(struct net_device *ndev, struct ifreq *req, int cmd)
+ return phy_mii_ioctl(phydev, req, cmd);
+ }
+
++static void ravb_set_rx_csum(struct net_device *ndev, bool enable)
++{
++ struct ravb_private *priv = netdev_priv(ndev);
++ unsigned long flags;
++
++ spin_lock_irqsave(&priv->lock, flags);
++
++ /* Disable TX and RX */
++ ravb_rcv_snd_disable(ndev);
++
++ /* Modify RX Checksum setting */
++ ravb_modify(ndev, ECMR, ECMR_RCSC, enable ? ECMR_RCSC : 0);
++
++ /* Enable TX and RX */
++ ravb_rcv_snd_enable(ndev);
++
++ spin_unlock_irqrestore(&priv->lock, flags);
++}
++
++static int ravb_set_features(struct net_device *ndev,
++ netdev_features_t features)
++{
++ netdev_features_t changed = ndev->features ^ features;
++
++ if (changed & NETIF_F_RXCSUM)
++ ravb_set_rx_csum(ndev, features & NETIF_F_RXCSUM);
++
++ ndev->features = features;
++
++ return 0;
++}
++
+ static const struct net_device_ops ravb_netdev_ops = {
+ .ndo_open = ravb_open,
+ .ndo_stop = ravb_close,
+@@ -1829,6 +1878,7 @@ static const struct net_device_ops ravb_netdev_ops = {
+ .ndo_do_ioctl = ravb_do_ioctl,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_set_mac_address = eth_mac_addr,
++ .ndo_set_features = ravb_set_features,
+ };
+
+ /* MDIO bus init function */
+@@ -1980,6 +2030,9 @@ static int ravb_probe(struct platform_device *pdev)
+ if (!ndev)
+ return -ENOMEM;
+
++ ndev->features = NETIF_F_RXCSUM;
++ ndev->hw_features = NETIF_F_RXCSUM;
++
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_get_sync(&pdev->dev);
+
+--
+2.19.0
+
diff --git a/patches/0125-ravb-Consolidate-clock-handling.patch b/patches/0125-ravb-Consolidate-clock-handling.patch
new file mode 100644
index 0000000..7d7b2d5
--- /dev/null
+++ b/patches/0125-ravb-Consolidate-clock-handling.patch
@@ -0,0 +1,108 @@
+From d390b94ad08a6a4112c25be438d9e21173a689c0 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 10:24:53 +0200
+Subject: [PATCH 0125/1795] ravb: Consolidate clock handling
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The module clock is used for two purposes:
+ - Wake-on-LAN (WoL), which is optional,
+ - gPTP Timer Increment (GTI) configuration, which is mandatory.
+
+As the clock is needed for GTI configuration anyway, WoL is always
+available. Hence remove duplication and repeated obtaining of the clock
+by making GTI use the stored clock for WoL use.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit ab104615e01c2c4cbe9ea4073a430d51f6547dd2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 35 +++++++-----------------
+ 1 file changed, 10 insertions(+), 25 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index 28b6a9f599bf..9297fbbab0fe 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -1330,20 +1330,15 @@ static void ravb_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
+ {
+ struct ravb_private *priv = netdev_priv(ndev);
+
+- wol->supported = 0;
+- wol->wolopts = 0;
+-
+- if (priv->clk) {
+- wol->supported = WAKE_MAGIC;
+- wol->wolopts = priv->wol_enabled ? WAKE_MAGIC : 0;
+- }
++ wol->supported = WAKE_MAGIC;
++ wol->wolopts = priv->wol_enabled ? WAKE_MAGIC : 0;
+ }
+
+ static int ravb_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
+ {
+ struct ravb_private *priv = netdev_priv(ndev);
+
+- if (!priv->clk || wol->wolopts & ~WAKE_MAGIC)
++ if (wol->wolopts & ~WAKE_MAGIC)
+ return -EOPNOTSUPP;
+
+ priv->wol_enabled = !!(wol->wolopts & WAKE_MAGIC);
+@@ -1938,22 +1933,12 @@ MODULE_DEVICE_TABLE(of, ravb_match_table);
+
+ static int ravb_set_gti(struct net_device *ndev)
+ {
+-
++ struct ravb_private *priv = netdev_priv(ndev);
+ struct device *dev = ndev->dev.parent;
+- struct device_node *np = dev->of_node;
+ unsigned long rate;
+- struct clk *clk;
+ uint64_t inc;
+
+- clk = of_clk_get(np, 0);
+- if (IS_ERR(clk)) {
+- dev_err(dev, "could not get clock\n");
+- return PTR_ERR(clk);
+- }
+-
+- rate = clk_get_rate(clk);
+- clk_put(clk);
+-
++ rate = clk_get_rate(priv->clk);
+ if (!rate)
+ return -EINVAL;
+
+@@ -2102,10 +2087,11 @@ static int ravb_probe(struct platform_device *pdev)
+
+ priv->chip_id = chip_id;
+
+- /* Get clock, if not found that's OK but Wake-On-Lan is unavailable */
+ priv->clk = devm_clk_get(&pdev->dev, NULL);
+- if (IS_ERR(priv->clk))
+- priv->clk = NULL;
++ if (IS_ERR(priv->clk)) {
++ error = PTR_ERR(priv->clk);
++ goto out_release;
++ }
+
+ /* Set function */
+ ndev->netdev_ops = &ravb_netdev_ops;
+@@ -2173,8 +2159,7 @@ static int ravb_probe(struct platform_device *pdev)
+ if (error)
+ goto out_napi_del;
+
+- if (priv->clk)
+- device_set_wakeup_capable(&pdev->dev, 1);
++ device_set_wakeup_capable(&pdev->dev, 1);
+
+ /* Print device information */
+ netdev_info(ndev, "Base address at %#x, %pM, IRQ %d.\n",
+--
+2.19.0
+
diff --git a/patches/0126-Revert-ravb-add-workaround-for-clock-when-resuming-w.patch b/patches/0126-Revert-ravb-add-workaround-for-clock-when-resuming-w.patch
new file mode 100644
index 0000000..6396b58
--- /dev/null
+++ b/patches/0126-Revert-ravb-add-workaround-for-clock-when-resuming-w.patch
@@ -0,0 +1,67 @@
+From 245dbeb37ce16ca73a8710adbf9fcf843fefc654 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 11 Dec 2017 09:54:09 +0100
+Subject: [PATCH 0126/1795] Revert "ravb: add workaround for clock when
+ resuming with WoL enabled"
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This reverts commit fbf3d034f2ff6264183cfa6845770e8cc2a986c8.
+
+As of commit 560869100b99a3da ("clk: renesas: cpg-mssr: Restore module
+clocks during resume"), the workaround is no longer needed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 6b782f43d34974c7909306fd9af06241d658a1f7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 27 ++----------------------
+ 1 file changed, 2 insertions(+), 25 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index 9297fbbab0fe..98e82669d41d 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -2284,32 +2284,9 @@ static int __maybe_unused ravb_resume(struct device *dev)
+ struct ravb_private *priv = netdev_priv(ndev);
+ int ret = 0;
+
+- if (priv->wol_enabled) {
+- /* Reduce the usecount of the clock to zero and then
+- * restore it to its original value. This is done to force
+- * the clock to be re-enabled which is a workaround
+- * for renesas-cpg-mssr driver which do not enable clocks
+- * when resuming from PSCI suspend/resume.
+- *
+- * Without this workaround the driver fails to communicate
+- * with the hardware if WoL was enabled when the system
+- * entered PSCI suspend. This is due to that if WoL is enabled
+- * we explicitly keep the clock from being turned off when
+- * suspending, but in PSCI sleep power is cut so the clock
+- * is disabled anyhow, the clock driver is not aware of this
+- * so the clock is not turned back on when resuming.
+- *
+- * TODO: once the renesas-cpg-mssr suspend/resume is working
+- * this clock dance should be removed.
+- */
+- clk_disable(priv->clk);
+- clk_disable(priv->clk);
+- clk_enable(priv->clk);
+- clk_enable(priv->clk);
+-
+- /* Set reset mode to rearm the WoL logic */
++ /* If WoL is enabled set reset mode to rearm the WoL logic */
++ if (priv->wol_enabled)
+ ravb_write(ndev, CCC_OPC_RESET, CCC);
+- }
+
+ /* All register have been reset to default values.
+ * Restore all registers which where setup at probe time and
+--
+2.19.0
+
diff --git a/patches/0127-drm-rcar-du-Use-drm_gem_fb_create.patch b/patches/0127-drm-rcar-du-Use-drm_gem_fb_create.patch
new file mode 100644
index 0000000..d7d9d49
--- /dev/null
+++ b/patches/0127-drm-rcar-du-Use-drm_gem_fb_create.patch
@@ -0,0 +1,46 @@
+From 2b15e6a044cc08dfb821cbd8c98753f3229fc6c5 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
+Date: Sun, 24 Sep 2017 14:26:21 +0200
+Subject: [PATCH 0127/1795] drm/rcar-du: Use drm_gem_fb_create()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+drm_fb_cma_create() is just a wrapper around drm_gem_fb_create() now,
+so use the function directly.
+
+Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Link: https://patchwork.freedesktop.org/patch/msgid/1506255985-61113-7-git-send-email-noralf@tronnes.org
+(cherry picked from commit 365c38517827b8efd4009b5221fff320775a5f83)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_kms.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+index 7278b9703c15..566d1a948c8f 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+@@ -18,6 +18,7 @@
+ #include <drm/drm_crtc_helper.h>
+ #include <drm/drm_fb_cma_helper.h>
+ #include <drm/drm_gem_cma_helper.h>
++#include <drm/drm_gem_framebuffer_helper.h>
+
+ #include <linux/of_graph.h>
+ #include <linux/wait.h>
+@@ -213,7 +214,7 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
+ }
+ }
+
+- return drm_fb_cma_create(dev, file_priv, mode_cmd);
++ return drm_gem_fb_create(dev, file_priv, mode_cmd);
+ }
+
+ static void rcar_du_output_poll_changed(struct drm_device *dev)
+--
+2.19.0
+
diff --git a/patches/0128-media-drivers-remove-from-non-kernel-doc-comments.patch b/patches/0128-media-drivers-remove-from-non-kernel-doc-comments.patch
new file mode 100644
index 0000000..f3686ae
--- /dev/null
+++ b/patches/0128-media-drivers-remove-from-non-kernel-doc-comments.patch
@@ -0,0 +1,498 @@
+From 1d3b8f82b671f5096bc11894de40d9546af05886 Mon Sep 17 00:00:00 2001
+From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+Date: Wed, 29 Nov 2017 08:33:45 -0500
+Subject: [PATCH 0128/1795] media: drivers: remove "/**" from non-kernel-doc
+ comments
+
+Several comments are wrongly tagged as kernel-doc, causing
+those warnings:
+
+ drivers/media/rc/st_rc.c:98: warning: No description found for parameter 'irq'
+ drivers/media/rc/st_rc.c:98: warning: No description found for parameter 'data'
+ drivers/media/pci/solo6x10/solo6x10-enc.c:183: warning: No description found for parameter 'solo_dev'
+ drivers/media/pci/solo6x10/solo6x10-enc.c:183: warning: No description found for parameter 'ch'
+ drivers/media/pci/solo6x10/solo6x10-enc.c:183: warning: No description found for parameter 'qp'
+ drivers/media/usb/pwc/pwc-dec23.c:652: warning: Cannot understand *
+ on line 652 - I thought it was a doc line
+ drivers/media/usb/dvb-usb/cinergyT2-fe.c:40: warning: No description found for parameter 'op'
+ drivers/media/usb/dvb-usb/friio-fe.c:301: warning: Cannot understand * (reg, val) commad list to initialize this module.
+ on line 301 - I thought it was a doc line
+ drivers/media/rc/streamzap.c:201: warning: No description found for parameter 'urb'
+ drivers/media/rc/streamzap.c:333: warning: No description found for parameter 'intf'
+ drivers/media/rc/streamzap.c:333: warning: No description found for parameter 'id'
+ drivers/media/rc/streamzap.c:464: warning: No description found for parameter 'interface'
+ drivers/media/i2c/ov5647.c:432: warning: Cannot understand * @short Subdev core operations registration
+ on line 432 - I thought it was a doc line
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'd'
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'addr'
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'wbuf'
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'wlen'
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'rbuf'
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'rlen'
+ drivers/media/platform/vim2m.c:350: warning: No description found for parameter 'priv'
+ drivers/media/dvb-frontends/tua6100.c:34: warning: cannot understand function prototype: 'struct tua6100_priv '
+ drivers/media/platform/sti/hva/hva-h264.c:140: warning: cannot understand function prototype: 'struct hva_h264_stereo_video_sei '
+ drivers/media/platform/sti/hva/hva-h264.c:150: warning: Cannot understand * @frame_width: width in pixels of the buffer containing the input frame
+ on line 150 - I thought it was a doc line
+ drivers/media/platform/sti/hva/hva-h264.c:356: warning: Cannot understand * @ slice_size: slice size
+ on line 356 - I thought it was a doc line
+ drivers/media/platform/sti/hva/hva-h264.c:369: warning: Cannot understand * @ bitstream_size: bitstream size
+ on line 369 - I thought it was a doc line
+ drivers/media/platform/sti/hva/hva-h264.c:395: warning: Cannot understand * @seq_info: sequence information buffer
+ on line 395 - I thought it was a doc line
+ drivers/media/dvb-frontends/sp887x.c:137: warning: No description found for parameter 'fe'
+ drivers/media/dvb-frontends/sp887x.c:137: warning: No description found for parameter 'fw'
+ drivers/media/dvb-frontends/sp887x.c:287: warning: No description found for parameter 'n'
+ drivers/media/dvb-frontends/sp887x.c:287: warning: No description found for parameter 'd'
+ drivers/media/dvb-frontends/sp887x.c:287: warning: No description found for parameter 'quotient_i'
+ drivers/media/dvb-frontends/sp887x.c:287: warning: No description found for parameter 'quotient_f'
+ drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c:83: warning: cannot understand function prototype: 'struct ttusb '
+ drivers/media/platform/sh_veu.c:277: warning: No description found for parameter 'priv'
+ drivers/media/dvb-frontends/zl10036.c:33: warning: cannot understand function prototype: 'int zl10036_debug; '
+ drivers/media/dvb-frontends/zl10036.c:179: warning: No description found for parameter 'state'
+ drivers/media/dvb-frontends/zl10036.c:179: warning: No description found for parameter 'frequency'
+ drivers/media/platform/rcar_fdp1.c:1139: warning: No description found for parameter 'priv'
+ drivers/media/platform/ti-vpe/vpe.c:933: warning: No description found for parameter 'priv'
+ drivers/media/usb/gspca/ov519.c:36: warning: No description found for parameter 'fmt'
+ drivers/media/usb/dvb-usb/dib0700_devices.c:3367: warning: No description found for parameter 'adap'
+
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit cba862dc7301d62f90393f2bbb181834a3125308)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/dvb-frontends/sp887x.c | 6 +++---
+ drivers/media/dvb-frontends/tua6100.c | 2 +-
+ drivers/media/dvb-frontends/zl10036.c | 8 ++++----
+ drivers/media/i2c/ov5647.c | 4 ++--
+ drivers/media/pci/solo6x10/solo6x10-enc.c | 2 +-
+ drivers/media/platform/rcar_fdp1.c | 2 +-
+ drivers/media/platform/sh_veu.c | 2 +-
+ drivers/media/platform/sti/hva/hva-h264.c | 18 +++++++++++++-----
+ drivers/media/platform/ti-vpe/vpe.c | 2 +-
+ drivers/media/platform/vim2m.c | 2 +-
+ drivers/media/rc/st_rc.c | 6 +++---
+ drivers/media/rc/streamzap.c | 6 +++---
+ drivers/media/usb/dvb-usb/cinergyT2-fe.c | 2 +-
+ drivers/media/usb/dvb-usb/dib0700_devices.c | 8 ++++----
+ drivers/media/usb/dvb-usb/friio-fe.c | 2 +-
+ drivers/media/usb/dvb-usb/friio.c | 2 +-
+ drivers/media/usb/gspca/ov519.c | 2 +-
+ drivers/media/usb/pwc/pwc-dec23.c | 7 +++----
+ .../media/usb/ttusb-budget/dvb-ttusb-budget.c | 6 +++---
+ 19 files changed, 48 insertions(+), 41 deletions(-)
+
+diff --git a/drivers/media/dvb-frontends/sp887x.c b/drivers/media/dvb-frontends/sp887x.c
+index 7c511c3cd4ca..d2c402b52c6e 100644
+--- a/drivers/media/dvb-frontends/sp887x.c
++++ b/drivers/media/dvb-frontends/sp887x.c
+@@ -57,7 +57,7 @@ static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data)
+ int ret;
+
+ if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) {
+- /**
++ /*
+ * in case of soft reset we ignore ACK errors...
+ */
+ if (!(reg == 0xf1a && data == 0x000 &&
+@@ -130,7 +130,7 @@ static void sp887x_setup_agc (struct sp887x_state* state)
+
+ #define BLOCKSIZE 30
+ #define FW_SIZE 0x4000
+-/**
++/*
+ * load firmware and setup MPEG interface...
+ */
+ static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw)
+@@ -279,7 +279,7 @@ static int configure_reg0xc05(struct dtv_frontend_properties *p, u16 *reg0xc05)
+ return 0;
+ }
+
+-/**
++/*
+ * estimates division of two 24bit numbers,
+ * derived from the ves1820/stv0299 driver code
+ */
+diff --git a/drivers/media/dvb-frontends/tua6100.c b/drivers/media/dvb-frontends/tua6100.c
+index 18e6d4c5be21..1d41abd47f04 100644
+--- a/drivers/media/dvb-frontends/tua6100.c
++++ b/drivers/media/dvb-frontends/tua6100.c
+@@ -1,4 +1,4 @@
+-/**
++/*
+ * Driver for Infineon tua6100 pll.
+ *
+ * (c) 2006 Andrew de Quincey
+diff --git a/drivers/media/dvb-frontends/zl10036.c b/drivers/media/dvb-frontends/zl10036.c
+index 062282739ce5..89dd65ae88ad 100644
+--- a/drivers/media/dvb-frontends/zl10036.c
++++ b/drivers/media/dvb-frontends/zl10036.c
+@@ -1,4 +1,4 @@
+-/**
++/*
+ * Driver for Zarlink zl10036 DVB-S silicon tuner
+ *
+ * Copyright (C) 2006 Tino Reichardt
+@@ -157,7 +157,7 @@ static int zl10036_sleep(struct dvb_frontend *fe)
+ return ret;
+ }
+
+-/**
++/*
+ * register map of the ZL10036/ZL10038
+ *
+ * reg[default] content
+@@ -219,7 +219,7 @@ static int zl10036_set_bandwidth(struct zl10036_state *state, u32 fbw)
+ if (fbw <= 28820) {
+ br = _BR_MAXIMUM;
+ } else {
+- /**
++ /*
+ * f(bw)=34,6MHz f(xtal)=10.111MHz
+ * br = (10111/34600) * 63 * 1/K = 14;
+ */
+@@ -315,7 +315,7 @@ static int zl10036_set_params(struct dvb_frontend *fe)
+ || (frequency > fe->ops.info.frequency_max))
+ return -EINVAL;
+
+- /**
++ /*
+ * alpha = 1.35 for dvb-s
+ * fBW = (alpha*symbolrate)/(2*0.8)
+ * 1.35 / (2*0.8) = 27 / 32
+diff --git a/drivers/media/i2c/ov5647.c b/drivers/media/i2c/ov5647.c
+index 95ce90fdb876..210aa822399c 100644
+--- a/drivers/media/i2c/ov5647.c
++++ b/drivers/media/i2c/ov5647.c
+@@ -407,8 +407,8 @@ static int ov5647_sensor_set_register(struct v4l2_subdev *sd,
+ }
+ #endif
+
+-/**
+- * @short Subdev core operations registration
++/*
++ * Subdev core operations registration
+ */
+ static const struct v4l2_subdev_core_ops ov5647_subdev_core_ops = {
+ .s_power = ov5647_sensor_power,
+diff --git a/drivers/media/pci/solo6x10/solo6x10-enc.c b/drivers/media/pci/solo6x10/solo6x10-enc.c
+index d28211bb9674..58d6b5131dd0 100644
+--- a/drivers/media/pci/solo6x10/solo6x10-enc.c
++++ b/drivers/media/pci/solo6x10/solo6x10-enc.c
+@@ -175,7 +175,7 @@ int solo_osd_print(struct solo_enc_dev *solo_enc)
+ return 0;
+ }
+
+-/**
++/*
+ * Set channel Quality Profile (0-3).
+ */
+ void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
+diff --git a/drivers/media/platform/rcar_fdp1.c b/drivers/media/platform/rcar_fdp1.c
+index 3245bc45f4a0..b13dec3081e5 100644
+--- a/drivers/media/platform/rcar_fdp1.c
++++ b/drivers/media/platform/rcar_fdp1.c
+@@ -1132,7 +1132,7 @@ static int fdp1_device_process(struct fdp1_ctx *ctx)
+ * mem2mem callbacks
+ */
+
+-/**
++/*
+ * job_ready() - check whether an instance is ready to be scheduled to run
+ */
+ static int fdp1_m2m_job_ready(void *priv)
+diff --git a/drivers/media/platform/sh_veu.c b/drivers/media/platform/sh_veu.c
+index 15a562af13c7..dedc1b024f6f 100644
+--- a/drivers/media/platform/sh_veu.c
++++ b/drivers/media/platform/sh_veu.c
+@@ -267,7 +267,7 @@ static void sh_veu_process(struct sh_veu_dev *veu,
+ sh_veu_reg_write(veu, VEU_EIER, 1); /* enable interrupt in VEU */
+ }
+
+-/**
++/*
+ * sh_veu_device_run() - prepares and starts the device
+ *
+ * This will be called by the framework when it decides to schedule a particular
+diff --git a/drivers/media/platform/sti/hva/hva-h264.c b/drivers/media/platform/sti/hva/hva-h264.c
+index e6f247a983c7..d69c58211107 100644
+--- a/drivers/media/platform/sti/hva/hva-h264.c
++++ b/drivers/media/platform/sti/hva/hva-h264.c
+@@ -134,7 +134,7 @@ enum hva_h264_sei_payload_type {
+ SEI_FRAME_PACKING_ARRANGEMENT = 45
+ };
+
+-/**
++/*
+ * stereo Video Info struct
+ */
+ struct hva_h264_stereo_video_sei {
+@@ -146,7 +146,9 @@ struct hva_h264_stereo_video_sei {
+ u8 right_view_self_contained_flag;
+ };
+
+-/**
++/*
++ * struct hva_h264_td
++ *
+ * @frame_width: width in pixels of the buffer containing the input frame
+ * @frame_height: height in pixels of the buffer containing the input frame
+ * @frame_num: the parameter to be written in the slice header
+@@ -352,7 +354,9 @@ struct hva_h264_td {
+ u32 addr_brc_in_out_parameter;
+ };
+
+-/**
++/*
++ * struct hva_h264_slice_po
++ *
+ * @ slice_size: slice size
+ * @ slice_start_time: start time
+ * @ slice_stop_time: stop time
+@@ -365,7 +369,9 @@ struct hva_h264_slice_po {
+ u32 slice_num;
+ };
+
+-/**
++/*
++ * struct hva_h264_po
++ *
+ * @ bitstream_size: bitstream size
+ * @ dct_bitstream_size: dtc bitstream size
+ * @ stuffing_bits: number of stuffing bits inserted by the encoder
+@@ -391,7 +397,9 @@ struct hva_h264_task {
+ struct hva_h264_po po;
+ };
+
+-/**
++/*
++ * struct hva_h264_ctx
++ *
+ * @seq_info: sequence information buffer
+ * @ref_frame: reference frame buffer
+ * @rec_frame: reconstructed frame buffer
+diff --git a/drivers/media/platform/ti-vpe/vpe.c b/drivers/media/platform/ti-vpe/vpe.c
+index 45bd10544189..e395aa85c8ad 100644
+--- a/drivers/media/platform/ti-vpe/vpe.c
++++ b/drivers/media/platform/ti-vpe/vpe.c
+@@ -926,7 +926,7 @@ static struct vpe_ctx *file2ctx(struct file *file)
+ * mem2mem callbacks
+ */
+
+-/**
++/*
+ * job_ready() - check whether an instance is ready to be scheduled to run
+ */
+ static int job_ready(void *priv)
+diff --git a/drivers/media/platform/vim2m.c b/drivers/media/platform/vim2m.c
+index b01fba020d5f..0592f40b23f3 100644
+--- a/drivers/media/platform/vim2m.c
++++ b/drivers/media/platform/vim2m.c
+@@ -343,7 +343,7 @@ static void schedule_irq(struct vim2m_dev *dev, int msec_timeout)
+ * mem2mem callbacks
+ */
+
+-/**
++/*
+ * job_ready() - check whether an instance is ready to be scheduled to run
+ */
+ static int job_ready(void *priv)
+diff --git a/drivers/media/rc/st_rc.c b/drivers/media/rc/st_rc.c
+index a8e39c635f34..d2efd7b2c3bc 100644
+--- a/drivers/media/rc/st_rc.c
++++ b/drivers/media/rc/st_rc.c
+@@ -49,7 +49,7 @@ struct st_rc_device {
+ #define IRB_RX_NOISE_SUPPR 0x5c /* noise suppression */
+ #define IRB_RX_POLARITY_INV 0x68 /* polarity inverter */
+
+-/**
++/*
+ * IRQ set: Enable full FIFO 1 -> bit 3;
+ * Enable overrun IRQ 1 -> bit 2;
+ * Enable last symbol IRQ 1 -> bit 1:
+@@ -72,7 +72,7 @@ static void st_rc_send_lirc_timeout(struct rc_dev *rdev)
+ ir_raw_event_store(rdev, &ev);
+ }
+
+-/**
++/*
+ * RX graphical example to better understand the difference between ST IR block
+ * output and standard definition used by LIRC (and most of the world!)
+ *
+@@ -317,7 +317,7 @@ static int st_rc_probe(struct platform_device *pdev)
+ device_init_wakeup(dev, true);
+ dev_pm_set_wake_irq(dev, rc_dev->irq);
+
+- /**
++ /*
+ * for LIRC_MODE_MODE2 or LIRC_MODE_PULSE or LIRC_MODE_RAW
+ * lircd expects a long space first before a signal train to sync.
+ */
+diff --git a/drivers/media/rc/streamzap.c b/drivers/media/rc/streamzap.c
+index f03a174ddf9d..0fdcab8ca1b0 100644
+--- a/drivers/media/rc/streamzap.c
++++ b/drivers/media/rc/streamzap.c
+@@ -191,7 +191,7 @@ static void sz_push_half_space(struct streamzap_ir *sz,
+ sz_push_full_space(sz, value & SZ_SPACE_MASK);
+ }
+
+-/**
++/*
+ * streamzap_callback - usb IRQ handler callback
+ *
+ * This procedure is invoked on reception of data from
+@@ -321,7 +321,7 @@ static struct rc_dev *streamzap_init_rc_dev(struct streamzap_ir *sz)
+ return NULL;
+ }
+
+-/**
++/*
+ * streamzap_probe
+ *
+ * Called by usb-core to associated with a candidate device
+@@ -450,7 +450,7 @@ static int streamzap_probe(struct usb_interface *intf,
+ return retval;
+ }
+
+-/**
++/*
+ * streamzap_disconnect
+ *
+ * Called by the usb core when the device is removed from the system.
+diff --git a/drivers/media/usb/dvb-usb/cinergyT2-fe.c b/drivers/media/usb/dvb-usb/cinergyT2-fe.c
+index f9772ad0a2a5..5a2f81311fb7 100644
+--- a/drivers/media/usb/dvb-usb/cinergyT2-fe.c
++++ b/drivers/media/usb/dvb-usb/cinergyT2-fe.c
+@@ -26,7 +26,7 @@
+ #include "cinergyT2.h"
+
+
+-/**
++/*
+ * convert linux-dvb frontend parameter set into TPS.
+ * See ETSI ETS-300744, section 4.6.2, table 9 for details.
+ *
+diff --git a/drivers/media/usb/dvb-usb/dib0700_devices.c b/drivers/media/usb/dvb-usb/dib0700_devices.c
+index 9be1e658ef47..a9968fb1e8e4 100644
+--- a/drivers/media/usb/dvb-usb/dib0700_devices.c
++++ b/drivers/media/usb/dvb-usb/dib0700_devices.c
+@@ -1678,10 +1678,10 @@ static int dib8096_set_param_override(struct dvb_frontend *fe)
+ return -EINVAL;
+ }
+
+- /** Update PLL if needed ratio **/
++ /* Update PLL if needed ratio */
+ state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
+
+- /** Get optimize PLL ratio to remove spurious **/
++ /* Get optimize PLL ratio to remove spurious */
+ pll_ratio = dib8090_compute_pll_parameters(fe);
+ if (pll_ratio == 17)
+ timf = 21387946;
+@@ -1692,7 +1692,7 @@ static int dib8096_set_param_override(struct dvb_frontend *fe)
+ else
+ timf = 18179756;
+
+- /** Update ratio **/
++ /* Update ratio */
+ state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
+
+ state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
+@@ -3358,7 +3358,7 @@ static int novatd_sleep_override(struct dvb_frontend* fe)
+ return state->sleep(fe);
+ }
+
+-/**
++/*
+ * novatd_frontend_attach - Nova-TD specific attach
+ *
+ * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
+diff --git a/drivers/media/usb/dvb-usb/friio-fe.c b/drivers/media/usb/dvb-usb/friio-fe.c
+index 0251a4e91d47..0b108071197a 100644
+--- a/drivers/media/usb/dvb-usb/friio-fe.c
++++ b/drivers/media/usb/dvb-usb/friio-fe.c
+@@ -319,7 +319,7 @@ static int jdvbt90502_set_frontend(struct dvb_frontend *fe)
+ }
+
+
+-/**
++/*
+ * (reg, val) commad list to initialize this module.
+ * captured on a Windows box.
+ */
+diff --git a/drivers/media/usb/dvb-usb/friio.c b/drivers/media/usb/dvb-usb/friio.c
+index 62abe6c43a32..16875945e662 100644
+--- a/drivers/media/usb/dvb-usb/friio.c
++++ b/drivers/media/usb/dvb-usb/friio.c
+@@ -21,7 +21,7 @@ MODULE_PARM_DESC(debug,
+
+ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
+
+-/**
++/*
+ * Indirect I2C access to the PLL via FE.
+ * whole I2C protocol data to the PLL is sent via the FE's I2C register.
+ * This is done by a control msg to the FE with the I2C data accompanied, and
+diff --git a/drivers/media/usb/gspca/ov519.c b/drivers/media/usb/gspca/ov519.c
+index cdb79c5f0c38..cb0afbf0aae7 100644
+--- a/drivers/media/usb/gspca/ov519.c
++++ b/drivers/media/usb/gspca/ov519.c
+@@ -1,4 +1,4 @@
+-/**
++/*
+ * OV519 driver
+ *
+ * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
+diff --git a/drivers/media/usb/pwc/pwc-dec23.c b/drivers/media/usb/pwc/pwc-dec23.c
+index 3792fedff951..1283b3bd9800 100644
+--- a/drivers/media/usb/pwc/pwc-dec23.c
++++ b/drivers/media/usb/pwc/pwc-dec23.c
+@@ -649,11 +649,10 @@ static void DecompressBand23(struct pwc_dec23_private *pdec,
+ }
+
+ /**
+- *
+ * Uncompress a pwc23 buffer.
+- *
+- * src: raw data
+- * dst: image output
++ * @pdev: pointer to pwc device's internal struct
++ * @src: raw data
++ * @dst: image output
+ */
+ void pwc_dec23_decompress(struct pwc_device *pdev,
+ const void *src,
+diff --git a/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c b/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c
+index b842f367249f..a142b9dc0feb 100644
+--- a/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c
++++ b/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c
+@@ -76,7 +76,7 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
+ #define TTUSB_REV_2_2 0x22
+ #define TTUSB_BUDGET_NAME "ttusb_stc_fw"
+
+-/**
++/*
+ * since we're casting (struct ttusb*) <-> (struct dvb_demux*) around
+ * the dvb_demux field must be the first in struct!!
+ */
+@@ -713,7 +713,7 @@ static void ttusb_process_frame(struct ttusb *ttusb, u8 * data, int len)
+ }
+ }
+
+- /**
++ /*
+ * if length is valid and we reached the end:
+ * goto next muxpack
+ */
+@@ -729,7 +729,7 @@ static void ttusb_process_frame(struct ttusb *ttusb, u8 * data, int len)
+ /* maximum bytes, until we know the length */
+ ttusb->muxpack_len = 2;
+
+- /**
++ /*
+ * no muxpacks left?
+ * return to search-sync state
+ */
+--
+2.19.0
+
diff --git a/patches/0129-thermal-rcar_gen3_thermal-fix-initialization-sequenc.patch b/patches/0129-thermal-rcar_gen3_thermal-fix-initialization-sequenc.patch
new file mode 100644
index 0000000..ed33478
--- /dev/null
+++ b/patches/0129-thermal-rcar_gen3_thermal-fix-initialization-sequenc.patch
@@ -0,0 +1,125 @@
+From e6a76653eb3d349480e589c019912df66f7b1475 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Tue, 17 Oct 2017 13:36:13 +0200
+Subject: [PATCH 0129/1795] thermal: rcar_gen3_thermal: fix initialization
+ sequence for H3 ES2.0
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The initialization sequence for H3 (r8a7795) ES1.x and ES2.0 is
+different. H3 ES2.0 and later uses the same sequence as M3 (r8a7796)
+ES1.0. Fix this by not looking at compatible strings and instead
+defaulting to the r8a7796 initialization sequence and use
+soc_device_match() to check for H3 ES1.x.
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
+(cherry picked from commit d668c807aa6ef3c3eef57b4e9e785ec0cfab4f6d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/thermal/rcar_gen3_thermal.c | 34 +++++++++++++----------------
+ 1 file changed, 15 insertions(+), 19 deletions(-)
+
+diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c
+index 203aca44a2bb..561a0a332208 100644
+--- a/drivers/thermal/rcar_gen3_thermal.c
++++ b/drivers/thermal/rcar_gen3_thermal.c
+@@ -24,6 +24,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/spinlock.h>
++#include <linux/sys_soc.h>
+ #include <linux/thermal.h>
+
+ #include "thermal_core.h"
+@@ -90,10 +91,6 @@ struct rcar_gen3_thermal_priv {
+ struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
+ unsigned int num_tscs;
+ spinlock_t lock; /* Protect interrupts on and off */
+- const struct rcar_gen3_thermal_data *data;
+-};
+-
+-struct rcar_gen3_thermal_data {
+ void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
+ };
+
+@@ -278,7 +275,12 @@ static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
+ return IRQ_HANDLED;
+ }
+
+-static void r8a7795_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
++static const struct soc_device_attribute r8a7795es1[] = {
++ { .soc_id = "r8a7795", .revision = "ES1.*" },
++ { /* sentinel */ }
++};
++
++static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
+ {
+ rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
+ rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
+@@ -303,7 +305,7 @@ static void r8a7795_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
+ usleep_range(1000, 2000);
+ }
+
+-static void r8a7796_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
++static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
+ {
+ u32 reg_val;
+
+@@ -324,17 +326,9 @@ static void r8a7796_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
+ usleep_range(1000, 2000);
+ }
+
+-static const struct rcar_gen3_thermal_data r8a7795_data = {
+- .thermal_init = r8a7795_thermal_init,
+-};
+-
+-static const struct rcar_gen3_thermal_data r8a7796_data = {
+- .thermal_init = r8a7796_thermal_init,
+-};
+-
+ static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
+- { .compatible = "renesas,r8a7795-thermal", .data = &r8a7795_data},
+- { .compatible = "renesas,r8a7796-thermal", .data = &r8a7796_data},
++ { .compatible = "renesas,r8a7795-thermal", },
++ { .compatible = "renesas,r8a7796-thermal", },
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
+@@ -371,7 +365,9 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
+ if (!priv)
+ return -ENOMEM;
+
+- priv->data = of_device_get_match_data(dev);
++ priv->thermal_init = rcar_gen3_thermal_init;
++ if (soc_device_match(r8a7795es1))
++ priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
+
+ spin_lock_init(&priv->lock);
+
+@@ -423,7 +419,7 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
+
+ priv->tscs[i] = tsc;
+
+- priv->data->thermal_init(tsc);
++ priv->thermal_init(tsc);
+ rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
+
+ zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
+@@ -476,7 +472,7 @@ static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
+ for (i = 0; i < priv->num_tscs; i++) {
+ struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
+
+- priv->data->thermal_init(tsc);
++ priv->thermal_init(tsc);
+ rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
+ }
+
+--
+2.19.0
+
diff --git a/patches/0130-iio-adc-drop-assign-iio_info.driver_module-and-iio_t.patch b/patches/0130-iio-adc-drop-assign-iio_info.driver_module-and-iio_t.patch
new file mode 100644
index 0000000..6b85867
--- /dev/null
+++ b/patches/0130-iio-adc-drop-assign-iio_info.driver_module-and-iio_t.patch
@@ -0,0 +1,1092 @@
+From ab188ca421d52db4c756f1d2ffa4964b0b2942e7 Mon Sep 17 00:00:00 2001
+From: Jonathan Cameron <jic23@kernel.org>
+Date: Sun, 23 Jul 2017 17:25:47 +0100
+Subject: [PATCH 0130/1795] iio:adc: drop assign iio_info.driver_module and
+ iio_trigger_ops.owner
+
+The equivalent of both of these are now done via macro magic when
+the relevant register calls are made. The actual structure
+elements will shortly go away.
+
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
+(cherry picked from commit 52b31bcc9372f2925f4898d179c655687c4aa179)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iio/adc/ad7266.c | 1 -
+ drivers/iio/adc/ad7291.c | 1 -
+ drivers/iio/adc/ad7298.c | 1 -
+ drivers/iio/adc/ad7476.c | 1 -
+ drivers/iio/adc/ad7766.c | 2 --
+ drivers/iio/adc/ad7791.c | 2 --
+ drivers/iio/adc/ad7793.c | 2 --
+ drivers/iio/adc/ad7887.c | 1 -
+ drivers/iio/adc/ad7923.c | 1 -
+ drivers/iio/adc/ad799x.c | 3 ---
+ drivers/iio/adc/ad_sigma_delta.c | 1 -
+ drivers/iio/adc/aspeed_adc.c | 1 -
+ drivers/iio/adc/at91-sama5d2_adc.c | 2 --
+ drivers/iio/adc/at91_adc.c | 2 --
+ drivers/iio/adc/axp20x_adc.c | 2 --
+ drivers/iio/adc/axp288_adc.c | 1 -
+ drivers/iio/adc/bcm_iproc_adc.c | 1 -
+ drivers/iio/adc/berlin2-adc.c | 1 -
+ drivers/iio/adc/cc10001_adc.c | 1 -
+ drivers/iio/adc/cpcap-adc.c | 1 -
+ drivers/iio/adc/da9150-gpadc.c | 1 -
+ drivers/iio/adc/dln2-adc.c | 6 ------
+ drivers/iio/adc/envelope-detector.c | 1 -
+ drivers/iio/adc/exynos_adc.c | 1 -
+ drivers/iio/adc/hi8435.c | 1 -
+ drivers/iio/adc/hx711.c | 1 -
+ drivers/iio/adc/imx7d_adc.c | 1 -
+ drivers/iio/adc/ina2xx-adc.c | 2 --
+ drivers/iio/adc/lp8788_adc.c | 1 -
+ drivers/iio/adc/lpc18xx_adc.c | 1 -
+ drivers/iio/adc/lpc32xx_adc.c | 1 -
+ drivers/iio/adc/ltc2471.c | 1 -
+ drivers/iio/adc/ltc2485.c | 1 -
+ drivers/iio/adc/ltc2497.c | 1 -
+ drivers/iio/adc/max1027.c | 2 --
+ drivers/iio/adc/max11100.c | 1 -
+ drivers/iio/adc/max1118.c | 1 -
+ drivers/iio/adc/max1363.c | 2 --
+ drivers/iio/adc/max9611.c | 1 -
+ drivers/iio/adc/mcp320x.c | 1 -
+ drivers/iio/adc/mcp3422.c | 1 -
+ drivers/iio/adc/men_z188_adc.c | 1 -
+ drivers/iio/adc/meson_saradc.c | 1 -
+ drivers/iio/adc/mt6577_auxadc.c | 1 -
+ drivers/iio/adc/mxs-lradc-adc.c | 2 --
+ drivers/iio/adc/nau7802.c | 1 -
+ drivers/iio/adc/palmas_gpadc.c | 1 -
+ drivers/iio/adc/qcom-pm8xxx-xoadc.c | 1 -
+ drivers/iio/adc/qcom-spmi-iadc.c | 1 -
+ drivers/iio/adc/qcom-spmi-vadc.c | 1 -
+ drivers/iio/adc/rcar-gyroadc.c | 1 -
+ drivers/iio/adc/rockchip_saradc.c | 1 -
+ drivers/iio/adc/spear_adc.c | 1 -
+ drivers/iio/adc/stm32-adc.c | 1 -
+ drivers/iio/adc/stx104.c | 1 -
+ drivers/iio/adc/sun4i-gpadc-iio.c | 1 -
+ drivers/iio/adc/ti-adc081c.c | 1 -
+ drivers/iio/adc/ti-adc0832.c | 1 -
+ drivers/iio/adc/ti-adc084s021.c | 1 -
+ drivers/iio/adc/ti-adc108s102.c | 1 -
+ drivers/iio/adc/ti-adc12138.c | 1 -
+ drivers/iio/adc/ti-adc128s052.c | 1 -
+ drivers/iio/adc/ti-adc161s626.c | 1 -
+ drivers/iio/adc/ti-ads1015.c | 2 --
+ drivers/iio/adc/ti-ads7950.c | 1 -
+ drivers/iio/adc/ti-ads8688.c | 1 -
+ drivers/iio/adc/ti-tlc4541.c | 1 -
+ drivers/iio/adc/ti_am335x_adc.c | 1 -
+ drivers/iio/adc/twl4030-madc.c | 1 -
+ drivers/iio/adc/twl6030-gpadc.c | 1 -
+ drivers/iio/adc/vf610_adc.c | 1 -
+ drivers/iio/adc/viperboard_adc.c | 1 -
+ drivers/iio/adc/xilinx-xadc-core.c | 2 --
+ 73 files changed, 92 deletions(-)
+
+diff --git a/drivers/iio/adc/ad7266.c b/drivers/iio/adc/ad7266.c
+index b8d5cfd57ec4..605eb5e7e829 100644
+--- a/drivers/iio/adc/ad7266.c
++++ b/drivers/iio/adc/ad7266.c
+@@ -280,7 +280,6 @@ static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
+ static const struct iio_info ad7266_info = {
+ .read_raw = &ad7266_read_raw,
+ .update_scan_mode = &ad7266_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const unsigned long ad7266_available_scan_masks[] = {
+diff --git a/drivers/iio/adc/ad7291.c b/drivers/iio/adc/ad7291.c
+index 1d90b02732bb..a862b5d8fb4b 100644
+--- a/drivers/iio/adc/ad7291.c
++++ b/drivers/iio/adc/ad7291.c
+@@ -461,7 +461,6 @@ static const struct iio_info ad7291_info = {
+ .write_event_config = &ad7291_write_event_config,
+ .read_event_value = &ad7291_read_event_value,
+ .write_event_value = &ad7291_write_event_value,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ad7291_probe(struct i2c_client *client,
+diff --git a/drivers/iio/adc/ad7298.c b/drivers/iio/adc/ad7298.c
+index e399bf04c73a..2b20c6c8ec7f 100644
+--- a/drivers/iio/adc/ad7298.c
++++ b/drivers/iio/adc/ad7298.c
+@@ -280,7 +280,6 @@ static int ad7298_read_raw(struct iio_dev *indio_dev,
+ static const struct iio_info ad7298_info = {
+ .read_raw = &ad7298_read_raw,
+ .update_scan_mode = ad7298_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ad7298_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ad7476.c b/drivers/iio/adc/ad7476.c
+index b7ecf9aab90f..b7706bf10ffe 100644
+--- a/drivers/iio/adc/ad7476.c
++++ b/drivers/iio/adc/ad7476.c
+@@ -195,7 +195,6 @@ static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
+ };
+
+ static const struct iio_info ad7476_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &ad7476_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/ad7766.c b/drivers/iio/adc/ad7766.c
+index ce45037295d8..3ae14fc8c649 100644
+--- a/drivers/iio/adc/ad7766.c
++++ b/drivers/iio/adc/ad7766.c
+@@ -185,7 +185,6 @@ static const struct iio_buffer_setup_ops ad7766_buffer_setup_ops = {
+ };
+
+ static const struct iio_info ad7766_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &ad7766_read_raw,
+ };
+
+@@ -208,7 +207,6 @@ static int ad7766_set_trigger_state(struct iio_trigger *trig, bool enable)
+ }
+
+ static const struct iio_trigger_ops ad7766_trigger_ops = {
+- .owner = THIS_MODULE,
+ .set_trigger_state = ad7766_set_trigger_state,
+ .validate_device = iio_trigger_validate_own_device,
+ };
+diff --git a/drivers/iio/adc/ad7791.c b/drivers/iio/adc/ad7791.c
+index 677f812f372a..03a5f7d6cb0c 100644
+--- a/drivers/iio/adc/ad7791.c
++++ b/drivers/iio/adc/ad7791.c
+@@ -259,13 +259,11 @@ static const struct iio_info ad7791_info = {
+ .read_raw = &ad7791_read_raw,
+ .attrs = &ad7791_attribute_group,
+ .validate_trigger = ad_sd_validate_trigger,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct iio_info ad7791_no_filter_info = {
+ .read_raw = &ad7791_read_raw,
+ .validate_trigger = ad_sd_validate_trigger,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ad7791_setup(struct ad7791_state *st,
+diff --git a/drivers/iio/adc/ad7793.c b/drivers/iio/adc/ad7793.c
+index 07246a6037e3..d4bbe5b53318 100644
+--- a/drivers/iio/adc/ad7793.c
++++ b/drivers/iio/adc/ad7793.c
+@@ -536,7 +536,6 @@ static const struct iio_info ad7793_info = {
+ .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
+ .attrs = &ad7793_attribute_group,
+ .validate_trigger = ad_sd_validate_trigger,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct iio_info ad7797_info = {
+@@ -545,7 +544,6 @@ static const struct iio_info ad7797_info = {
+ .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
+ .attrs = &ad7793_attribute_group,
+ .validate_trigger = ad_sd_validate_trigger,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define DECLARE_AD7793_CHANNELS(_name, _b, _sb, _s) \
+diff --git a/drivers/iio/adc/ad7887.c b/drivers/iio/adc/ad7887.c
+index 7a483bfbd70c..205c0f1761aa 100644
+--- a/drivers/iio/adc/ad7887.c
++++ b/drivers/iio/adc/ad7887.c
+@@ -229,7 +229,6 @@ static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
+
+ static const struct iio_info ad7887_info = {
+ .read_raw = &ad7887_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ad7887_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ad7923.c b/drivers/iio/adc/ad7923.c
+index 77a675e11ebb..ffb7e089969c 100644
+--- a/drivers/iio/adc/ad7923.c
++++ b/drivers/iio/adc/ad7923.c
+@@ -262,7 +262,6 @@ static int ad7923_read_raw(struct iio_dev *indio_dev,
+ static const struct iio_info ad7923_info = {
+ .read_raw = &ad7923_read_raw,
+ .update_scan_mode = ad7923_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ad7923_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ad799x.c b/drivers/iio/adc/ad799x.c
+index 22426ae4af97..e1da67d5ee22 100644
+--- a/drivers/iio/adc/ad799x.c
++++ b/drivers/iio/adc/ad799x.c
+@@ -526,13 +526,11 @@ static const struct attribute_group ad799x_event_attrs_group = {
+
+ static const struct iio_info ad7991_info = {
+ .read_raw = &ad799x_read_raw,
+- .driver_module = THIS_MODULE,
+ .update_scan_mode = ad799x_update_scan_mode,
+ };
+
+ static const struct iio_info ad7993_4_7_8_noirq_info = {
+ .read_raw = &ad799x_read_raw,
+- .driver_module = THIS_MODULE,
+ .update_scan_mode = ad799x_update_scan_mode,
+ };
+
+@@ -543,7 +541,6 @@ static const struct iio_info ad7993_4_7_8_irq_info = {
+ .write_event_config = &ad799x_write_event_config,
+ .read_event_value = &ad799x_read_event_value,
+ .write_event_value = &ad799x_write_event_value,
+- .driver_module = THIS_MODULE,
+ .update_scan_mode = ad799x_update_scan_mode,
+ };
+
+diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c
+index 22c4c17cd996..cf1b048b0665 100644
+--- a/drivers/iio/adc/ad_sigma_delta.c
++++ b/drivers/iio/adc/ad_sigma_delta.c
+@@ -463,7 +463,6 @@ int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig)
+ EXPORT_SYMBOL_GPL(ad_sd_validate_trigger);
+
+ static const struct iio_trigger_ops ad_sd_trigger_ops = {
+- .owner = THIS_MODULE,
+ };
+
+ static int ad_sd_probe_trigger(struct iio_dev *indio_dev)
+diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c
+index c02b23d675cb..8a958d5f1905 100644
+--- a/drivers/iio/adc/aspeed_adc.c
++++ b/drivers/iio/adc/aspeed_adc.c
+@@ -165,7 +165,6 @@ static int aspeed_adc_reg_access(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info aspeed_adc_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = aspeed_adc_read_raw,
+ .write_raw = aspeed_adc_write_raw,
+ .debugfs_reg_access = aspeed_adc_reg_access,
+diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
+index a70ef7fec95f..755a493c2a2c 100644
+--- a/drivers/iio/adc/at91-sama5d2_adc.c
++++ b/drivers/iio/adc/at91-sama5d2_adc.c
+@@ -348,7 +348,6 @@ static int at91_adc_reenable_trigger(struct iio_trigger *trig)
+ }
+
+ static const struct iio_trigger_ops at91_adc_trigger_ops = {
+- .owner = THIS_MODULE,
+ .set_trigger_state = &at91_adc_configure_trigger,
+ .try_reenable = &at91_adc_reenable_trigger,
+ };
+@@ -584,7 +583,6 @@ static int at91_adc_write_raw(struct iio_dev *indio_dev,
+ static const struct iio_info at91_adc_info = {
+ .read_raw = &at91_adc_read_raw,
+ .write_raw = &at91_adc_write_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static void at91_adc_hw_init(struct at91_adc_state *st)
+diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
+index 15109728cae7..3836d4222a3e 100644
+--- a/drivers/iio/adc/at91_adc.c
++++ b/drivers/iio/adc/at91_adc.c
+@@ -594,7 +594,6 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
+ }
+
+ static const struct iio_trigger_ops at91_adc_trigger_ops = {
+- .owner = THIS_MODULE,
+ .set_trigger_state = &at91_adc_configure_trigger,
+ };
+
+@@ -976,7 +975,6 @@ static int at91_adc_probe_pdata(struct at91_adc_state *st,
+ }
+
+ static const struct iio_info at91_adc_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &at91_adc_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/axp20x_adc.c b/drivers/iio/adc/axp20x_adc.c
+index 11e177180ea0..a30a97245e91 100644
+--- a/drivers/iio/adc/axp20x_adc.c
++++ b/drivers/iio/adc/axp20x_adc.c
+@@ -464,12 +464,10 @@ static int axp20x_write_raw(struct iio_dev *indio_dev,
+ static const struct iio_info axp20x_adc_iio_info = {
+ .read_raw = axp20x_read_raw,
+ .write_raw = axp20x_write_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct iio_info axp22x_adc_iio_info = {
+ .read_raw = axp22x_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int axp20x_adc_rate(int rate)
+diff --git a/drivers/iio/adc/axp288_adc.c b/drivers/iio/adc/axp288_adc.c
+index 462a99c13e7a..60c9e853dd81 100644
+--- a/drivers/iio/adc/axp288_adc.c
++++ b/drivers/iio/adc/axp288_adc.c
+@@ -183,7 +183,6 @@ static int axp288_adc_set_state(struct regmap *regmap)
+
+ static const struct iio_info axp288_adc_iio_info = {
+ .read_raw = &axp288_adc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int axp288_adc_probe(struct platform_device *pdev)
+diff --git a/drivers/iio/adc/bcm_iproc_adc.c b/drivers/iio/adc/bcm_iproc_adc.c
+index 7f4f9c4150e3..7af59a4bbd8d 100644
+--- a/drivers/iio/adc/bcm_iproc_adc.c
++++ b/drivers/iio/adc/bcm_iproc_adc.c
+@@ -492,7 +492,6 @@ static int iproc_adc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info iproc_adc_iio_info = {
+ .read_raw = &iproc_adc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define IPROC_ADC_CHANNEL(_index, _id) { \
+diff --git a/drivers/iio/adc/berlin2-adc.c b/drivers/iio/adc/berlin2-adc.c
+index 71c806ecc722..72d8fa94ab31 100644
+--- a/drivers/iio/adc/berlin2-adc.c
++++ b/drivers/iio/adc/berlin2-adc.c
+@@ -277,7 +277,6 @@ static irqreturn_t berlin2_adc_tsen_irq(int irq, void *private)
+ }
+
+ static const struct iio_info berlin2_adc_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = berlin2_adc_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/cc10001_adc.c b/drivers/iio/adc/cc10001_adc.c
+index 91636c0ba5b5..707d8b24b072 100644
+--- a/drivers/iio/adc/cc10001_adc.c
++++ b/drivers/iio/adc/cc10001_adc.c
+@@ -262,7 +262,6 @@ static int cc10001_update_scan_mode(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info cc10001_adc_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &cc10001_adc_read_raw,
+ .update_scan_mode = &cc10001_update_scan_mode,
+ };
+diff --git a/drivers/iio/adc/cpcap-adc.c b/drivers/iio/adc/cpcap-adc.c
+index f153e02686a0..9ad60421d360 100644
+--- a/drivers/iio/adc/cpcap-adc.c
++++ b/drivers/iio/adc/cpcap-adc.c
+@@ -932,7 +932,6 @@ static int cpcap_adc_read(struct iio_dev *indio_dev,
+
+ static const struct iio_info cpcap_adc_info = {
+ .read_raw = &cpcap_adc_read,
+- .driver_module = THIS_MODULE,
+ };
+
+ /*
+diff --git a/drivers/iio/adc/da9150-gpadc.c b/drivers/iio/adc/da9150-gpadc.c
+index 3445107e10b7..0a5d9ce79164 100644
+--- a/drivers/iio/adc/da9150-gpadc.c
++++ b/drivers/iio/adc/da9150-gpadc.c
+@@ -249,7 +249,6 @@ static int da9150_gpadc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info da9150_gpadc_info = {
+ .read_raw = &da9150_gpadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define DA9150_GPADC_CHANNEL(_id, _hw_id, _type, chan_info, \
+diff --git a/drivers/iio/adc/dln2-adc.c b/drivers/iio/adc/dln2-adc.c
+index ab8d6aed5085..c64c6675cae6 100644
+--- a/drivers/iio/adc/dln2-adc.c
++++ b/drivers/iio/adc/dln2-adc.c
+@@ -479,7 +479,6 @@ static const struct iio_info dln2_adc_info = {
+ .read_raw = dln2_adc_read_raw,
+ .write_raw = dln2_adc_write_raw,
+ .update_scan_mode = dln2_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t dln2_adc_trigger_h(int irq, void *p)
+@@ -604,10 +603,6 @@ static void dln2_adc_event(struct platform_device *pdev, u16 echo,
+ iio_trigger_poll(dln2->trig);
+ }
+
+-static const struct iio_trigger_ops dln2_adc_trigger_ops = {
+- .owner = THIS_MODULE,
+-};
+-
+ static int dln2_adc_probe(struct platform_device *pdev)
+ {
+ struct device *dev = &pdev->dev;
+@@ -665,7 +660,6 @@ static int dln2_adc_probe(struct platform_device *pdev)
+ dev_err(dev, "failed to allocate trigger\n");
+ return -ENOMEM;
+ }
+- dln2->trig->ops = &dln2_adc_trigger_ops;
+ iio_trigger_set_drvdata(dln2->trig, dln2);
+ devm_iio_trigger_register(dev, dln2->trig);
+ iio_trigger_set_immutable(indio_dev, dln2->trig);
+diff --git a/drivers/iio/adc/envelope-detector.c b/drivers/iio/adc/envelope-detector.c
+index fef15c0d7c9c..4ebda8ab54fe 100644
+--- a/drivers/iio/adc/envelope-detector.c
++++ b/drivers/iio/adc/envelope-detector.c
+@@ -322,7 +322,6 @@ static const struct iio_chan_spec envelope_detector_iio_channel = {
+
+ static const struct iio_info envelope_detector_info = {
+ .read_raw = &envelope_detector_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int envelope_detector_probe(struct platform_device *pdev)
+diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
+index 6c5a7be9f8c1..f10443f92e4c 100644
+--- a/drivers/iio/adc/exynos_adc.c
++++ b/drivers/iio/adc/exynos_adc.c
+@@ -657,7 +657,6 @@ static int exynos_adc_reg_access(struct iio_dev *indio_dev,
+ static const struct iio_info exynos_adc_iio_info = {
+ .read_raw = &exynos_read_raw,
+ .debugfs_reg_access = &exynos_adc_reg_access,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define ADC_CHANNEL(_index, _id) { \
+diff --git a/drivers/iio/adc/hi8435.c b/drivers/iio/adc/hi8435.c
+index adf7dc712937..6f6c9a348158 100644
+--- a/drivers/iio/adc/hi8435.c
++++ b/drivers/iio/adc/hi8435.c
+@@ -408,7 +408,6 @@ static const struct iio_chan_spec hi8435_channels[] = {
+ };
+
+ static const struct iio_info hi8435_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = hi8435_read_raw,
+ .read_event_config = hi8435_read_event_config,
+ .write_event_config = hi8435_write_event_config,
+diff --git a/drivers/iio/adc/hx711.c b/drivers/iio/adc/hx711.c
+index 27005d84ed73..d10b9f13d557 100644
+--- a/drivers/iio/adc/hx711.c
++++ b/drivers/iio/adc/hx711.c
+@@ -374,7 +374,6 @@ static const struct attribute_group hx711_attribute_group = {
+ };
+
+ static const struct iio_info hx711_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = hx711_read_raw,
+ .write_raw = hx711_write_raw,
+ .write_raw_get_fmt = hx711_write_raw_get_fmt,
+diff --git a/drivers/iio/adc/imx7d_adc.c b/drivers/iio/adc/imx7d_adc.c
+index 254b29a68b9d..cfab31162845 100644
+--- a/drivers/iio/adc/imx7d_adc.c
++++ b/drivers/iio/adc/imx7d_adc.c
+@@ -412,7 +412,6 @@ static int imx7d_adc_reg_access(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info imx7d_adc_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &imx7d_adc_read_raw,
+ .debugfs_reg_access = &imx7d_adc_reg_access,
+ };
+diff --git a/drivers/iio/adc/ina2xx-adc.c b/drivers/iio/adc/ina2xx-adc.c
+index 59f99b3a180d..3976da23ec3f 100644
+--- a/drivers/iio/adc/ina2xx-adc.c
++++ b/drivers/iio/adc/ina2xx-adc.c
+@@ -786,7 +786,6 @@ static const struct attribute_group ina226_attribute_group = {
+ };
+
+ static const struct iio_info ina219_info = {
+- .driver_module = THIS_MODULE,
+ .attrs = &ina219_attribute_group,
+ .read_raw = ina2xx_read_raw,
+ .write_raw = ina2xx_write_raw,
+@@ -794,7 +793,6 @@ static const struct iio_info ina219_info = {
+ };
+
+ static const struct iio_info ina226_info = {
+- .driver_module = THIS_MODULE,
+ .attrs = &ina226_attribute_group,
+ .read_raw = ina2xx_read_raw,
+ .write_raw = ina2xx_write_raw,
+diff --git a/drivers/iio/adc/lp8788_adc.c b/drivers/iio/adc/lp8788_adc.c
+index 152cfc8e1c7b..3bc4df916420 100644
+--- a/drivers/iio/adc/lp8788_adc.c
++++ b/drivers/iio/adc/lp8788_adc.c
+@@ -125,7 +125,6 @@ static int lp8788_adc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info lp8788_adc_info = {
+ .read_raw = &lp8788_adc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define LP8788_CHAN(_id, _type) { \
+diff --git a/drivers/iio/adc/lpc18xx_adc.c b/drivers/iio/adc/lpc18xx_adc.c
+index 3ef18f4b27f0..041dc4a3f66c 100644
+--- a/drivers/iio/adc/lpc18xx_adc.c
++++ b/drivers/iio/adc/lpc18xx_adc.c
+@@ -116,7 +116,6 @@ static int lpc18xx_adc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info lpc18xx_adc_info = {
+ .read_raw = lpc18xx_adc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int lpc18xx_adc_probe(struct platform_device *pdev)
+diff --git a/drivers/iio/adc/lpc32xx_adc.c b/drivers/iio/adc/lpc32xx_adc.c
+index 6a5b9a9bc662..20b36690fa4f 100644
+--- a/drivers/iio/adc/lpc32xx_adc.c
++++ b/drivers/iio/adc/lpc32xx_adc.c
+@@ -104,7 +104,6 @@ static int lpc32xx_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info lpc32xx_adc_iio_info = {
+ .read_raw = &lpc32xx_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define LPC32XX_ADC_CHANNEL(_index) { \
+diff --git a/drivers/iio/adc/ltc2471.c b/drivers/iio/adc/ltc2471.c
+index 29b7ed60cdb0..b88102b751cf 100644
+--- a/drivers/iio/adc/ltc2471.c
++++ b/drivers/iio/adc/ltc2471.c
+@@ -98,7 +98,6 @@ static const struct iio_chan_spec ltc2473_channel[] = {
+
+ static const struct iio_info ltc2471_info = {
+ .read_raw = ltc2471_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ltc2471_i2c_probe(struct i2c_client *client,
+diff --git a/drivers/iio/adc/ltc2485.c b/drivers/iio/adc/ltc2485.c
+index eab91f12454a..b24c14037fd4 100644
+--- a/drivers/iio/adc/ltc2485.c
++++ b/drivers/iio/adc/ltc2485.c
+@@ -90,7 +90,6 @@ static const struct iio_chan_spec ltc2485_channel[] = {
+
+ static const struct iio_info ltc2485_info = {
+ .read_raw = ltc2485_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ltc2485_probe(struct i2c_client *client,
+diff --git a/drivers/iio/adc/ltc2497.c b/drivers/iio/adc/ltc2497.c
+index 5bf8011dcde9..f1f7cdf66fbd 100644
+--- a/drivers/iio/adc/ltc2497.c
++++ b/drivers/iio/adc/ltc2497.c
+@@ -186,7 +186,6 @@ static const struct iio_chan_spec ltc2497_channel[] = {
+
+ static const struct iio_info ltc2497_info = {
+ .read_raw = ltc2497_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ltc2497_probe(struct i2c_client *client,
+diff --git a/drivers/iio/adc/max1027.c b/drivers/iio/adc/max1027.c
+index ebc715927e63..375da6491499 100644
+--- a/drivers/iio/adc/max1027.c
++++ b/drivers/iio/adc/max1027.c
+@@ -381,13 +381,11 @@ static irqreturn_t max1027_trigger_handler(int irq, void *private)
+ }
+
+ static const struct iio_trigger_ops max1027_trigger_ops = {
+- .owner = THIS_MODULE,
+ .validate_device = &iio_trigger_validate_own_device,
+ .set_trigger_state = &max1027_set_trigger_state,
+ };
+
+ static const struct iio_info max1027_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &max1027_read_raw,
+ .validate_trigger = &max1027_validate_trigger,
+ .debugfs_reg_access = &max1027_debugfs_reg_access,
+diff --git a/drivers/iio/adc/max11100.c b/drivers/iio/adc/max11100.c
+index 1180bcc22ff1..af59ab2e650c 100644
+--- a/drivers/iio/adc/max11100.c
++++ b/drivers/iio/adc/max11100.c
+@@ -100,7 +100,6 @@ static int max11100_read_raw(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info max11100_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = max11100_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/max1118.c b/drivers/iio/adc/max1118.c
+index 2e9648a078c4..49db9e9ae625 100644
+--- a/drivers/iio/adc/max1118.c
++++ b/drivers/iio/adc/max1118.c
+@@ -155,7 +155,6 @@ static int max1118_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info max1118_info = {
+ .read_raw = max1118_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t max1118_trigger_handler(int irq, void *p)
+diff --git a/drivers/iio/adc/max1363.c b/drivers/iio/adc/max1363.c
+index 80eada4886b3..7f1848dac9bf 100644
+--- a/drivers/iio/adc/max1363.c
++++ b/drivers/iio/adc/max1363.c
+@@ -1029,7 +1029,6 @@ static int max1363_update_scan_mode(struct iio_dev *indio_dev,
+
+ static const struct iio_info max1238_info = {
+ .read_raw = &max1363_read_raw,
+- .driver_module = THIS_MODULE,
+ .update_scan_mode = &max1363_update_scan_mode,
+ };
+
+@@ -1040,7 +1039,6 @@ static const struct iio_info max1363_info = {
+ .write_event_config = &max1363_write_event_config,
+ .read_raw = &max1363_read_raw,
+ .update_scan_mode = &max1363_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ .event_attrs = &max1363_event_attribute_group,
+ };
+
+diff --git a/drivers/iio/adc/max9611.c b/drivers/iio/adc/max9611.c
+index b1dd17cbce58..9edfbabf4e4d 100644
+--- a/drivers/iio/adc/max9611.c
++++ b/drivers/iio/adc/max9611.c
+@@ -460,7 +460,6 @@ static const struct attribute_group max9611_attribute_group = {
+ };
+
+ static const struct iio_info indio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = max9611_read_raw,
+ .attrs = &max9611_attribute_group,
+ };
+diff --git a/drivers/iio/adc/mcp320x.c b/drivers/iio/adc/mcp320x.c
+index 071dd23a33d9..49e80b959089 100644
+--- a/drivers/iio/adc/mcp320x.c
++++ b/drivers/iio/adc/mcp320x.c
+@@ -248,7 +248,6 @@ static const struct iio_chan_spec mcp3208_channels[] = {
+
+ static const struct iio_info mcp320x_info = {
+ .read_raw = mcp320x_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
+diff --git a/drivers/iio/adc/mcp3422.c b/drivers/iio/adc/mcp3422.c
+index 63de705086ed..819f26011500 100644
+--- a/drivers/iio/adc/mcp3422.c
++++ b/drivers/iio/adc/mcp3422.c
+@@ -327,7 +327,6 @@ static const struct iio_info mcp3422_info = {
+ .write_raw = mcp3422_write_raw,
+ .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
+ .attrs = &mcp3422_attribute_group,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int mcp3422_probe(struct i2c_client *client,
+diff --git a/drivers/iio/adc/men_z188_adc.c b/drivers/iio/adc/men_z188_adc.c
+index 8f3606de4eaf..c80261748d8f 100644
+--- a/drivers/iio/adc/men_z188_adc.c
++++ b/drivers/iio/adc/men_z188_adc.c
+@@ -80,7 +80,6 @@ static int z188_iio_read_raw(struct iio_dev *iio_dev,
+
+ static const struct iio_info z188_adc_info = {
+ .read_raw = &z188_iio_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static void men_z188_config_channels(void __iomem *addr)
+diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
+index 11484cb38b84..0d237fd69769 100644
+--- a/drivers/iio/adc/meson_saradc.c
++++ b/drivers/iio/adc/meson_saradc.c
+@@ -864,7 +864,6 @@ static int meson_sar_adc_calib(struct iio_dev *indio_dev)
+
+ static const struct iio_info meson_sar_adc_iio_info = {
+ .read_raw = meson_sar_adc_iio_info_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct meson_sar_adc_data meson_sar_adc_meson8_data = {
+diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c
+index 414cf44bf19d..a2a23958c2a2 100644
+--- a/drivers/iio/adc/mt6577_auxadc.c
++++ b/drivers/iio/adc/mt6577_auxadc.c
+@@ -180,7 +180,6 @@ static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info mt6577_auxadc_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &mt6577_auxadc_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/mxs-lradc-adc.c b/drivers/iio/adc/mxs-lradc-adc.c
+index d32b34638c2f..c627513d9f0f 100644
+--- a/drivers/iio/adc/mxs-lradc-adc.c
++++ b/drivers/iio/adc/mxs-lradc-adc.c
+@@ -382,7 +382,6 @@ static const struct attribute_group mxs_lradc_adc_attribute_group = {
+ };
+
+ static const struct iio_info mxs_lradc_adc_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = mxs_lradc_adc_read_raw,
+ .write_raw = mxs_lradc_adc_write_raw,
+ .write_raw_get_fmt = mxs_lradc_adc_write_raw_get_fmt,
+@@ -455,7 +454,6 @@ static int mxs_lradc_adc_configure_trigger(struct iio_trigger *trig, bool state)
+ }
+
+ static const struct iio_trigger_ops mxs_lradc_adc_trigger_ops = {
+- .owner = THIS_MODULE,
+ .set_trigger_state = &mxs_lradc_adc_configure_trigger,
+ };
+
+diff --git a/drivers/iio/adc/nau7802.c b/drivers/iio/adc/nau7802.c
+index 08f446695f97..8997e74a8847 100644
+--- a/drivers/iio/adc/nau7802.c
++++ b/drivers/iio/adc/nau7802.c
+@@ -402,7 +402,6 @@ static int nau7802_write_raw_get_fmt(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info nau7802_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &nau7802_read_raw,
+ .write_raw = &nau7802_write_raw,
+ .write_raw_get_fmt = nau7802_write_raw_get_fmt,
+diff --git a/drivers/iio/adc/palmas_gpadc.c b/drivers/iio/adc/palmas_gpadc.c
+index 7d61b566e148..69b9affeef1e 100644
+--- a/drivers/iio/adc/palmas_gpadc.c
++++ b/drivers/iio/adc/palmas_gpadc.c
+@@ -430,7 +430,6 @@ static int palmas_gpadc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info palmas_gpadc_iio_info = {
+ .read_raw = palmas_gpadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define PALMAS_ADC_CHAN_IIO(chan, _type, chan_info) \
+diff --git a/drivers/iio/adc/qcom-pm8xxx-xoadc.c b/drivers/iio/adc/qcom-pm8xxx-xoadc.c
+index cea8f1fb444a..b093ecddf1a8 100644
+--- a/drivers/iio/adc/qcom-pm8xxx-xoadc.c
++++ b/drivers/iio/adc/qcom-pm8xxx-xoadc.c
+@@ -728,7 +728,6 @@ static int pm8xxx_of_xlate(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info pm8xxx_xoadc_info = {
+- .driver_module = THIS_MODULE,
+ .of_xlate = pm8xxx_of_xlate,
+ .read_raw = pm8xxx_read_raw,
+ };
+diff --git a/drivers/iio/adc/qcom-spmi-iadc.c b/drivers/iio/adc/qcom-spmi-iadc.c
+index fabd24edc2a1..3f062cd61aba 100644
+--- a/drivers/iio/adc/qcom-spmi-iadc.c
++++ b/drivers/iio/adc/qcom-spmi-iadc.c
+@@ -356,7 +356,6 @@ static int iadc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info iadc_info = {
+ .read_raw = iadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t iadc_isr(int irq, void *dev_id)
+diff --git a/drivers/iio/adc/qcom-spmi-vadc.c b/drivers/iio/adc/qcom-spmi-vadc.c
+index 9e600bfd1765..3680e0d47412 100644
+--- a/drivers/iio/adc/qcom-spmi-vadc.c
++++ b/drivers/iio/adc/qcom-spmi-vadc.c
+@@ -506,7 +506,6 @@ static int vadc_of_xlate(struct iio_dev *indio_dev,
+ static const struct iio_info vadc_info = {
+ .read_raw = vadc_read_raw,
+ .of_xlate = vadc_of_xlate,
+- .driver_module = THIS_MODULE,
+ };
+
+ struct vadc_channels {
+diff --git a/drivers/iio/adc/rcar-gyroadc.c b/drivers/iio/adc/rcar-gyroadc.c
+index 27a318164619..2cb5397ceeea 100644
+--- a/drivers/iio/adc/rcar-gyroadc.c
++++ b/drivers/iio/adc/rcar-gyroadc.c
+@@ -277,7 +277,6 @@ static int rcar_gyroadc_reg_access(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info rcar_gyroadc_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = rcar_gyroadc_read_raw,
+ .debugfs_reg_access = rcar_gyroadc_reg_access,
+ };
+diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
+index 5f612d694b33..1f98566d5b3c 100644
+--- a/drivers/iio/adc/rockchip_saradc.c
++++ b/drivers/iio/adc/rockchip_saradc.c
+@@ -125,7 +125,6 @@ static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id)
+
+ static const struct iio_info rockchip_saradc_iio_info = {
+ .read_raw = rockchip_saradc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define ADC_CHANNEL(_index, _id) { \
+diff --git a/drivers/iio/adc/spear_adc.c b/drivers/iio/adc/spear_adc.c
+index 5dd61f6a57b9..b1da2c46107c 100644
+--- a/drivers/iio/adc/spear_adc.c
++++ b/drivers/iio/adc/spear_adc.c
+@@ -254,7 +254,6 @@ static int spear_adc_configure(struct spear_adc_state *st)
+ static const struct iio_info spear_adc_info = {
+ .read_raw = &spear_adc_read_raw,
+ .write_raw = &spear_adc_write_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int spear_adc_probe(struct platform_device *pdev)
+diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
+index 04be8bd951be..2c9903d3396d 100644
+--- a/drivers/iio/adc/stm32-adc.c
++++ b/drivers/iio/adc/stm32-adc.c
+@@ -1387,7 +1387,6 @@ static const struct iio_info stm32_adc_iio_info = {
+ .update_scan_mode = stm32_adc_update_scan_mode,
+ .debugfs_reg_access = stm32_adc_debugfs_reg_access,
+ .of_xlate = stm32_adc_of_xlate,
+- .driver_module = THIS_MODULE,
+ };
+
+ static unsigned int stm32_adc_dma_residue(struct stm32_adc *adc)
+diff --git a/drivers/iio/adc/stx104.c b/drivers/iio/adc/stx104.c
+index 2da741d27540..17b021f33180 100644
+--- a/drivers/iio/adc/stx104.c
++++ b/drivers/iio/adc/stx104.c
+@@ -172,7 +172,6 @@ static int stx104_write_raw(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info stx104_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = stx104_read_raw,
+ .write_raw = stx104_write_raw
+ };
+diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
+index 137f577d9432..a146160d9966 100644
+--- a/drivers/iio/adc/sun4i-gpadc-iio.c
++++ b/drivers/iio/adc/sun4i-gpadc-iio.c
+@@ -352,7 +352,6 @@ static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info sun4i_gpadc_iio_info = {
+ .read_raw = sun4i_gpadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)
+diff --git a/drivers/iio/adc/ti-adc081c.c b/drivers/iio/adc/ti-adc081c.c
+index 319172cf7da8..405e3779c0c5 100644
+--- a/drivers/iio/adc/ti-adc081c.c
++++ b/drivers/iio/adc/ti-adc081c.c
+@@ -124,7 +124,6 @@ static struct adcxx1c_model adcxx1c_models[] = {
+
+ static const struct iio_info adc081c_info = {
+ .read_raw = adc081c_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t adc081c_trigger_handler(int irq, void *p)
+diff --git a/drivers/iio/adc/ti-adc0832.c b/drivers/iio/adc/ti-adc0832.c
+index e952e94a14af..188dae705bf7 100644
+--- a/drivers/iio/adc/ti-adc0832.c
++++ b/drivers/iio/adc/ti-adc0832.c
+@@ -195,7 +195,6 @@ static int adc0832_read_raw(struct iio_dev *iio,
+
+ static const struct iio_info adc0832_info = {
+ .read_raw = adc0832_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t adc0832_trigger_handler(int irq, void *p)
+diff --git a/drivers/iio/adc/ti-adc084s021.c b/drivers/iio/adc/ti-adc084s021.c
+index a355121c11a4..25504640e126 100644
+--- a/drivers/iio/adc/ti-adc084s021.c
++++ b/drivers/iio/adc/ti-adc084s021.c
+@@ -186,7 +186,6 @@ static int adc084s021_buffer_postdisable(struct iio_dev *indio_dev)
+
+ static const struct iio_info adc084s021_info = {
+ .read_raw = adc084s021_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct iio_buffer_setup_ops adc084s021_buffer_setup_ops = {
+diff --git a/drivers/iio/adc/ti-adc108s102.c b/drivers/iio/adc/ti-adc108s102.c
+index de4e5ac98c6e..841203edaac5 100644
+--- a/drivers/iio/adc/ti-adc108s102.c
++++ b/drivers/iio/adc/ti-adc108s102.c
+@@ -220,7 +220,6 @@ static int adc108s102_read_raw(struct iio_dev *indio_dev,
+ static const struct iio_info adc108s102_info = {
+ .read_raw = &adc108s102_read_raw,
+ .update_scan_mode = &adc108s102_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int adc108s102_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ti-adc12138.c b/drivers/iio/adc/ti-adc12138.c
+index 072f03bfe6a0..bf890244789a 100644
+--- a/drivers/iio/adc/ti-adc12138.c
++++ b/drivers/iio/adc/ti-adc12138.c
+@@ -277,7 +277,6 @@ static int adc12138_read_raw(struct iio_dev *iio,
+
+ static const struct iio_info adc12138_info = {
+ .read_raw = adc12138_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int adc12138_init(struct adc12138 *adc)
+diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c
+index 89dfbd31be5c..7cf39b3e2416 100644
+--- a/drivers/iio/adc/ti-adc128s052.c
++++ b/drivers/iio/adc/ti-adc128s052.c
+@@ -130,7 +130,6 @@ static const struct adc128_configuration adc128_config[] = {
+
+ static const struct iio_info adc128_info = {
+ .read_raw = adc128_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int adc128_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ti-adc161s626.c b/drivers/iio/adc/ti-adc161s626.c
+index 4836a0d7aef5..10fa7677ac4b 100644
+--- a/drivers/iio/adc/ti-adc161s626.c
++++ b/drivers/iio/adc/ti-adc161s626.c
+@@ -173,7 +173,6 @@ static int ti_adc_read_raw(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info ti_adc_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = ti_adc_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/ti-ads1015.c b/drivers/iio/adc/ti-ads1015.c
+index 9ac2fb032df6..344b768a5c49 100644
+--- a/drivers/iio/adc/ti-ads1015.c
++++ b/drivers/iio/adc/ti-ads1015.c
+@@ -822,7 +822,6 @@ static const struct attribute_group ads1115_attribute_group = {
+ };
+
+ static const struct iio_info ads1015_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = ads1015_read_raw,
+ .write_raw = ads1015_write_raw,
+ .read_event_value = ads1015_read_event,
+@@ -833,7 +832,6 @@ static const struct iio_info ads1015_info = {
+ };
+
+ static const struct iio_info ads1115_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = ads1015_read_raw,
+ .write_raw = ads1015_write_raw,
+ .read_event_value = ads1015_read_event,
+diff --git a/drivers/iio/adc/ti-ads7950.c b/drivers/iio/adc/ti-ads7950.c
+index a376190914ad..0225c1b333ab 100644
+--- a/drivers/iio/adc/ti-ads7950.c
++++ b/drivers/iio/adc/ti-ads7950.c
+@@ -372,7 +372,6 @@ static int ti_ads7950_read_raw(struct iio_dev *indio_dev,
+ static const struct iio_info ti_ads7950_info = {
+ .read_raw = &ti_ads7950_read_raw,
+ .update_scan_mode = ti_ads7950_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ti_ads7950_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ti-ads8688.c b/drivers/iio/adc/ti-ads8688.c
+index 4a163496d9e4..ff4756352ac1 100644
+--- a/drivers/iio/adc/ti-ads8688.c
++++ b/drivers/iio/adc/ti-ads8688.c
+@@ -369,7 +369,6 @@ static const struct iio_info ads8688_info = {
+ .write_raw = &ads8688_write_raw,
+ .write_raw_get_fmt = &ads8688_write_raw_get_fmt,
+ .attrs = &ads8688_attribute_group,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct ads8688_chip_info ads8688_chip_info_tbl[] = {
+diff --git a/drivers/iio/adc/ti-tlc4541.c b/drivers/iio/adc/ti-tlc4541.c
+index 78d91a069ea4..2290024c89fc 100644
+--- a/drivers/iio/adc/ti-tlc4541.c
++++ b/drivers/iio/adc/ti-tlc4541.c
+@@ -157,7 +157,6 @@ static int tlc4541_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info tlc4541_info = {
+ .read_raw = &tlc4541_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int tlc4541_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c
+index 6cbed7eb118a..b3e573cc6f5f 100644
+--- a/drivers/iio/adc/ti_am335x_adc.c
++++ b/drivers/iio/adc/ti_am335x_adc.c
+@@ -533,7 +533,6 @@ static int tiadc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info tiadc_info = {
+ .read_raw = &tiadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int tiadc_request_dma(struct platform_device *pdev,
+diff --git a/drivers/iio/adc/twl4030-madc.c b/drivers/iio/adc/twl4030-madc.c
+index e3cfb91bffc6..8c019bb6625f 100644
+--- a/drivers/iio/adc/twl4030-madc.c
++++ b/drivers/iio/adc/twl4030-madc.c
+@@ -212,7 +212,6 @@ static int twl4030_madc_read(struct iio_dev *iio_dev,
+
+ static const struct iio_info twl4030_madc_iio_info = {
+ .read_raw = &twl4030_madc_read,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define TWL4030_ADC_CHANNEL(_channel, _type, _name) { \
+diff --git a/drivers/iio/adc/twl6030-gpadc.c b/drivers/iio/adc/twl6030-gpadc.c
+index bc0e60b9da45..dc83f8f6c3d3 100644
+--- a/drivers/iio/adc/twl6030-gpadc.c
++++ b/drivers/iio/adc/twl6030-gpadc.c
+@@ -843,7 +843,6 @@ static const struct iio_chan_spec twl6032_gpadc_iio_channels[] = {
+
+ static const struct iio_info twl6030_gpadc_iio_info = {
+ .read_raw = &twl6030_gpadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct twl6030_gpadc_platform_data twl6030_pdata = {
+diff --git a/drivers/iio/adc/vf610_adc.c b/drivers/iio/adc/vf610_adc.c
+index c168e0db329a..bbcb7a4d7edf 100644
+--- a/drivers/iio/adc/vf610_adc.c
++++ b/drivers/iio/adc/vf610_adc.c
+@@ -799,7 +799,6 @@ static int vf610_adc_reg_access(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info vf610_adc_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &vf610_read_raw,
+ .write_raw = &vf610_write_raw,
+ .debugfs_reg_access = &vf610_adc_reg_access,
+diff --git a/drivers/iio/adc/viperboard_adc.c b/drivers/iio/adc/viperboard_adc.c
+index 3be2e35721cc..53eb5a4136fe 100644
+--- a/drivers/iio/adc/viperboard_adc.c
++++ b/drivers/iio/adc/viperboard_adc.c
+@@ -107,7 +107,6 @@ static int vprbrd_iio_read_raw(struct iio_dev *iio_dev,
+
+ static const struct iio_info vprbrd_adc_iio_info = {
+ .read_raw = &vprbrd_iio_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int vprbrd_adc_probe(struct platform_device *pdev)
+diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
+index 4a60497a1f19..d4f21d1be6c8 100644
+--- a/drivers/iio/adc/xilinx-xadc-core.c
++++ b/drivers/iio/adc/xilinx-xadc-core.c
+@@ -675,7 +675,6 @@ static int xadc_trigger_set_state(struct iio_trigger *trigger, bool state)
+ }
+
+ static const struct iio_trigger_ops xadc_trigger_ops = {
+- .owner = THIS_MODULE,
+ .set_trigger_state = &xadc_trigger_set_state,
+ };
+
+@@ -1028,7 +1027,6 @@ static const struct iio_info xadc_info = {
+ .read_event_value = &xadc_read_event_value,
+ .write_event_value = &xadc_write_event_value,
+ .update_scan_mode = &xadc_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct of_device_id xadc_of_match_table[] = {
+--
+2.19.0
+
diff --git a/patches/0131-iio-adc-rcar-gyroadc-Cast-pointer-to-uintptr_t-to-fi.patch b/patches/0131-iio-adc-rcar-gyroadc-Cast-pointer-to-uintptr_t-to-fi.patch
new file mode 100644
index 0000000..bef29a4
--- /dev/null
+++ b/patches/0131-iio-adc-rcar-gyroadc-Cast-pointer-to-uintptr_t-to-fi.patch
@@ -0,0 +1,41 @@
+From 787344999da34444daf2e84b09842d9727455785 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:08:24 +0200
+Subject: [PATCH 0131/1795] iio: adc: rcar-gyroadc: Cast pointer to uintptr_t
+ to fix warning on 64-bit
+
+On 64-bit:
+
+ drivers/iio/adc/rcar-gyroadc.c: In function 'rcar_gyroadc_parse_subdevs':
+ drivers/iio/adc/rcar-gyroadc.c:352:15: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
+ childmode = (unsigned int)of_id->data;
+ ^
+
+Cast the pointer to uintptr_t instead of unsigned int to fix this.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+(cherry picked from commit 2a35734564bd2dc4f73c9e230ff55892290a130f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iio/adc/rcar-gyroadc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/iio/adc/rcar-gyroadc.c b/drivers/iio/adc/rcar-gyroadc.c
+index 2cb5397ceeea..0098c66a1957 100644
+--- a/drivers/iio/adc/rcar-gyroadc.c
++++ b/drivers/iio/adc/rcar-gyroadc.c
+@@ -348,7 +348,7 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
+ continue;
+ }
+
+- childmode = (unsigned int)of_id->data;
++ childmode = (uintptr_t)of_id->data;
+ switch (childmode) {
+ case RCAR_GYROADC_MODE_SELECT_1_MB88101A:
+ sample_width = 12;
+--
+2.19.0
+
diff --git a/patches/0132-iio-adc-rcar-gyroadc-Use-of_device_get_match_data-he.patch b/patches/0132-iio-adc-rcar-gyroadc-Use-of_device_get_match_data-he.patch
new file mode 100644
index 0000000..d0e09ae
--- /dev/null
+++ b/patches/0132-iio-adc-rcar-gyroadc-Use-of_device_get_match_data-he.patch
@@ -0,0 +1,46 @@
+From d10899cae0b09f10acd2528d3c93ebe25f9453d8 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:08:26 +0200
+Subject: [PATCH 0132/1795] iio: adc: rcar-gyroadc: Use
+ of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+Note that the rcar-gyroadc driver is used with DT only, so there's
+always a valid match.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+(cherry picked from commit fb942f8ce6cdbacc087b808d89d09ff138c25bbe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iio/adc/rcar-gyroadc.c | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/iio/adc/rcar-gyroadc.c b/drivers/iio/adc/rcar-gyroadc.c
+index 0098c66a1957..dcb50172186f 100644
+--- a/drivers/iio/adc/rcar-gyroadc.c
++++ b/drivers/iio/adc/rcar-gyroadc.c
+@@ -487,8 +487,6 @@ static int rcar_gyroadc_init_supplies(struct iio_dev *indio_dev)
+
+ static int rcar_gyroadc_probe(struct platform_device *pdev)
+ {
+- const struct of_device_id *of_id =
+- of_match_device(rcar_gyroadc_match, &pdev->dev);
+ struct device *dev = &pdev->dev;
+ struct rcar_gyroadc *priv;
+ struct iio_dev *indio_dev;
+@@ -525,7 +523,8 @@ static int rcar_gyroadc_probe(struct platform_device *pdev)
+ if (ret)
+ return ret;
+
+- priv->model = (enum rcar_gyroadc_model)of_id->data;
++ priv->model = (enum rcar_gyroadc_model)
++ of_device_get_match_data(&pdev->dev);
+
+ platform_set_drvdata(pdev, indio_dev);
+
+--
+2.19.0
+
diff --git a/patches/0133-media-rcar_jpu-fix-two-kernel-doc-markups.patch b/patches/0133-media-rcar_jpu-fix-two-kernel-doc-markups.patch
new file mode 100644
index 0000000..c47a345
--- /dev/null
+++ b/patches/0133-media-rcar_jpu-fix-two-kernel-doc-markups.patch
@@ -0,0 +1,44 @@
+From 75d162a9a6afd91b698d8826c6d4f4f082f0b175 Mon Sep 17 00:00:00 2001
+From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+Date: Wed, 29 Nov 2017 10:15:53 -0500
+Subject: [PATCH 0133/1795] media: rcar_jpu: fix two kernel-doc markups
+
+On kernel-doc, struct declarations should be declared as "struct foo".
+
+Fix the following warnings:
+ drivers/media/platform/rcar_jpu.c:265: warning: cannot understand function prototype: 'struct jpu_q_data '
+ drivers/media/platform/rcar_jpu.c:281: warning: cannot understand function prototype: 'struct jpu_ctx '
+
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 538cf6437af951f84cc816d63aafeafc61eb40c1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/platform/rcar_jpu.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/media/platform/rcar_jpu.c b/drivers/media/platform/rcar_jpu.c
+index 2e2b8c409150..8b44a849ab41 100644
+--- a/drivers/media/platform/rcar_jpu.c
++++ b/drivers/media/platform/rcar_jpu.c
+@@ -257,7 +257,7 @@ struct jpu_fmt {
+ };
+
+ /**
+- * jpu_q_data - parameters of one queue
++ * struct jpu_q_data - parameters of one queue
+ * @fmtinfo: driver-specific format of this queue
+ * @format: multiplanar format of this queue
+ * @sequence: sequence number
+@@ -269,7 +269,7 @@ struct jpu_q_data {
+ };
+
+ /**
+- * jpu_ctx - the device context data
++ * struct jpu_ctx - the device context data
+ * @jpu: JPEG IP device for this context
+ * @encoder: compression (encode) operation or decompression (decode)
+ * @compr_quality: destination image quality in compression (encode) mode
+--
+2.19.0
+
diff --git a/patches/0134-soc-renesas-rcar-rst-add-R8A77970-support.patch b/patches/0134-soc-renesas-rcar-rst-add-R8A77970-support.patch
new file mode 100644
index 0000000..9c35461
--- /dev/null
+++ b/patches/0134-soc-renesas-rcar-rst-add-R8A77970-support.patch
@@ -0,0 +1,61 @@
+From 59eb5c3fb0fa6544972800f0ee7b9bf0d566a16a Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 12 Sep 2017 23:37:18 +0300
+Subject: [PATCH 0134/1795] soc: renesas: rcar-rst: add R8A77970 support
+
+Add support for R-Car V3M (R8A77970) to the R-Car RST driver -- this driver
+is needed for the clock driver to work.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 17760376ae31e06f66b3c3b8981f5978d4c53150)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/reset/renesas,rst.txt | 1 +
+ drivers/soc/renesas/Kconfig | 3 ++-
+ drivers/soc/renesas/rcar-rst.c | 1 +
+ 3 files changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt b/Documentation/devicetree/bindings/reset/renesas,rst.txt
+index e5a03ffe04fb..a8014f3ab8ba 100644
+--- a/Documentation/devicetree/bindings/reset/renesas,rst.txt
++++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
+@@ -26,6 +26,7 @@ Required properties:
+ - "renesas,r8a7794-rst" (R-Car E2)
+ - "renesas,r8a7795-rst" (R-Car H3)
+ - "renesas,r8a7796-rst" (R-Car M3-W)
++ - "renesas,r8a77970-rst" (R-Car V3M)
+ - "renesas,r8a77995-rst" (R-Car D3)
+ - reg: Address start and address range for the device.
+
+diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
+index 567414cb42ba..f0d562a7c4d3 100644
+--- a/drivers/soc/renesas/Kconfig
++++ b/drivers/soc/renesas/Kconfig
+@@ -3,7 +3,8 @@ config SOC_RENESAS
+ default y if ARCH_RENESAS
+ select SOC_BUS
+ select RST_RCAR if ARCH_RCAR_GEN1 || ARCH_RCAR_GEN2 || \
+- ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77995
++ ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77970 || \
++ ARCH_R8A77995
+ select SYSC_R8A7743 if ARCH_R8A7743
+ select SYSC_R8A7745 if ARCH_R8A7745
+ select SYSC_R8A7779 if ARCH_R8A7779
+diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
+index baa47014e96b..3316b028f231 100644
+--- a/drivers/soc/renesas/rcar-rst.c
++++ b/drivers/soc/renesas/rcar-rst.c
+@@ -41,6 +41,7 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
+ /* R-Car Gen3 is handled like R-Car Gen2 */
+ { .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen2 },
+ { .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen2 },
++ { .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen2 },
+ { .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen2 },
+ { /* sentinel */ }
+ };
+--
+2.19.0
+
diff --git a/patches/0135-ASoC-rsnd-add-rsnd_dma_alloc.patch b/patches/0135-ASoC-rsnd-add-rsnd_dma_alloc.patch
new file mode 100644
index 0000000..4720ad0
--- /dev/null
+++ b/patches/0135-ASoC-rsnd-add-rsnd_dma_alloc.patch
@@ -0,0 +1,124 @@
+From 08111dfc9f889edfd792570969ec80b6aef9b225 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 20 Sep 2017 06:28:44 +0000
+Subject: [PATCH 0135/1795] ASoC: rsnd: add rsnd_dma_alloc()
+
+R-Car sound DMA will be used from SSI/SRC.
+dma.c doesn't alloc DMA handler in .probe timing, because we don't
+know what kind of DMA transfer will be used then.
+Thus, SSI/SRC have *rsnd_mod for DMA. rsnd_dma_attach() will allocate
+it and attach it to system.
+It will be PIO mode if it can't alloc DMA handler.
+
+In case of MIX is used, rsnd_dma_attach() will be called twice from SSI.
+To avoid duplicate allocation, current rsnd_dma_attach() is checking
+allocated DMA handler. This DMA related operation is a little bit
+difficult to understand.
+This patch adds new rsnd_dma_alloc() and separates allocation and attach
+for readable code.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 81cb71240e202a8086bda0755d9d78bd3decd0aa)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/dma.c | 60 ++++++++++++++++++++++-------------------
+ 1 file changed, 33 insertions(+), 27 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/dma.c b/sound/soc/sh/rcar/dma.c
+index 041ec1080d52..17220c946ff0 100644
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -753,14 +753,15 @@ static void rsnd_dma_of_path(struct rsnd_mod *this,
+ }
+ }
+
+-int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
+- struct rsnd_mod **dma_mod)
++static int rsnd_dma_alloc(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
++ struct rsnd_mod **dma_mod)
+ {
+ struct rsnd_mod *mod_from = NULL;
+ struct rsnd_mod *mod_to = NULL;
+ struct rsnd_priv *priv = rsnd_io_to_priv(io);
+ struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv);
+ struct device *dev = rsnd_priv_to_dev(priv);
++ struct rsnd_dma *dma;
+ struct rsnd_mod_ops *ops;
+ enum rsnd_mod_type type;
+ int (*attach)(struct rsnd_dai_stream *io, struct rsnd_dma *dma,
+@@ -800,40 +801,45 @@ int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
+ type = RSND_MOD_AUDMA;
+ }
+
+- if (!(*dma_mod)) {
+- struct rsnd_dma *dma;
++ dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL);
++ if (!dma)
++ return -ENOMEM;
+
+- dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL);
+- if (!dma)
+- return -ENOMEM;
++ *dma_mod = rsnd_mod_get(dma);
+
+- *dma_mod = rsnd_mod_get(dma);
++ ret = rsnd_mod_init(priv, *dma_mod, ops, NULL,
++ rsnd_mod_get_status, type, dma_id);
++ if (ret < 0)
++ return ret;
+
+- ret = rsnd_mod_init(priv, *dma_mod, ops, NULL,
+- rsnd_mod_get_status, type, dma_id);
+- if (ret < 0)
+- return ret;
++ dev_dbg(dev, "%s[%d] %s[%d] -> %s[%d]\n",
++ rsnd_mod_name(*dma_mod), rsnd_mod_id(*dma_mod),
++ rsnd_mod_name(mod_from), rsnd_mod_id(mod_from),
++ rsnd_mod_name(mod_to), rsnd_mod_id(mod_to));
++
++ ret = attach(io, dma, mod_from, mod_to);
++ if (ret < 0)
++ return ret;
+
+- dev_dbg(dev, "%s[%d] %s[%d] -> %s[%d]\n",
+- rsnd_mod_name(*dma_mod), rsnd_mod_id(*dma_mod),
+- rsnd_mod_name(mod_from), rsnd_mod_id(mod_from),
+- rsnd_mod_name(mod_to), rsnd_mod_id(mod_to));
++ dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1);
++ dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0);
++ dma->mod_from = mod_from;
++ dma->mod_to = mod_to;
++
++ return 0;
++}
++
++int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
++ struct rsnd_mod **dma_mod)
++{
++ if (!(*dma_mod)) {
++ int ret = rsnd_dma_alloc(io, mod, dma_mod);
+
+- ret = attach(io, dma, mod_from, mod_to);
+ if (ret < 0)
+ return ret;
+-
+- dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1);
+- dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0);
+- dma->mod_from = mod_from;
+- dma->mod_to = mod_to;
+ }
+
+- ret = rsnd_dai_connect(*dma_mod, io, type);
+- if (ret < 0)
+- return ret;
+-
+- return 0;
++ return rsnd_dai_connect(*dma_mod, io, (*dma_mod)->type);
+ }
+
+ int rsnd_dma_probe(struct rsnd_priv *priv)
+--
+2.19.0
+
diff --git a/patches/0136-ASoC-rcar-skip-disabled-SSI-nodes.patch b/patches/0136-ASoC-rcar-skip-disabled-SSI-nodes.patch
new file mode 100644
index 0000000..02c9b71
--- /dev/null
+++ b/patches/0136-ASoC-rcar-skip-disabled-SSI-nodes.patch
@@ -0,0 +1,47 @@
+From 88596adc617181ff2bd238bdf090b5a1ebef085b Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 2 Oct 2017 07:37:32 +0000
+Subject: [PATCH 0136/1795] ASoC: rcar: skip disabled-SSI nodes
+
+The current device tree representation of the R-Car SSI assumes that they
+are numbered consecutively, starting from 0. Alas, this is not the case
+with the R8A77995 (D3) SoC which SSI1/SSI2 aren't present. In order to
+keep the existing device trees working, I'm suggesting to use a disabled
+node for SSI0/SSI1. Teach the SSI probe to just skip disabled nodes.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 9e9e95df06433b4f89cfeef0003af091ee0ebc86)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/ssi.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
+index f0fb85fda42d..fa2469042876 100644
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -1121,6 +1121,9 @@ int rsnd_ssi_probe(struct rsnd_priv *priv)
+
+ i = 0;
+ for_each_child_of_node(node, np) {
++ if (!of_device_is_available(np))
++ goto skip;
++
+ ssi = rsnd_ssi_get(priv, i);
+
+ snprintf(name, RSND_SSI_NAME_SIZE, "%s.%d",
+@@ -1157,7 +1160,7 @@ int rsnd_ssi_probe(struct rsnd_priv *priv)
+ of_node_put(np);
+ goto rsnd_ssi_probe_done;
+ }
+-
++skip:
+ i++;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0137-ASoC-rsnd-add-generic-rsnd_flags_xxx-macro.patch b/patches/0137-ASoC-rsnd-add-generic-rsnd_flags_xxx-macro.patch
new file mode 100644
index 0000000..6a15cca
--- /dev/null
+++ b/patches/0137-ASoC-rsnd-add-generic-rsnd_flags_xxx-macro.patch
@@ -0,0 +1,141 @@
+From 38f0b4611e000c59db9c86d7d2eb5ddb7c8daf55 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:47:50 +0000
+Subject: [PATCH 0137/1795] ASoC: rsnd: add generic rsnd_flags_xxx() macro
+
+SSI is using rsnd_ssi_flags_xxx() macro to control flags.
+But it is useful macro not only for SSI. This patch replace it
+to more generic rsnd_flags_xxx().
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 429919890e22431bc350ecf47b31866bb27631b2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/rsnd.h | 4 ++++
+ sound/soc/sh/rcar/ssi.c | 27 ++++++++++++---------------
+ 2 files changed, 16 insertions(+), 15 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index c5de71f2dc8c..beffbec42404 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -601,6 +601,10 @@ struct rsnd_priv {
+ #define rsnd_is_gen1(priv) (((priv)->flags & RSND_GEN_MASK) == RSND_GEN1)
+ #define rsnd_is_gen2(priv) (((priv)->flags & RSND_GEN_MASK) == RSND_GEN2)
+
++#define rsnd_flags_has(p, f) ((p)->flags & (f))
++#define rsnd_flags_set(p, f) ((p)->flags |= (f))
++#define rsnd_flags_del(p, f) ((p)->flags &= ~(f))
++
+ /*
+ * rsnd_kctrl
+ */
+diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
+index fa2469042876..d64abbbe1a98 100644
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -101,9 +101,6 @@ struct rsnd_ssi {
+ #define rsnd_ssi_get(priv, id) ((struct rsnd_ssi *)(priv->ssi) + id)
+ #define rsnd_ssi_nr(priv) ((priv)->ssi_nr)
+ #define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod)
+-#define rsnd_ssi_flags_has(p, f) ((p)->flags & f)
+-#define rsnd_ssi_flags_set(p, f) ((p)->flags |= f)
+-#define rsnd_ssi_flags_del(p, f) ((p)->flags = ((p)->flags & ~f))
+ #define rsnd_ssi_is_parent(ssi, io) ((ssi) == rsnd_io_to_mod_ssip(io))
+ #define rsnd_ssi_is_multi_slave(mod, io) \
+ (rsnd_ssi_multi_slaves(io) & (1 << rsnd_mod_id(mod)))
+@@ -116,10 +113,10 @@ int rsnd_ssi_hdmi_port(struct rsnd_dai_stream *io)
+ struct rsnd_mod *mod = rsnd_io_to_mod_ssi(io);
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+
+- if (rsnd_ssi_flags_has(ssi, RSND_SSI_HDMI0))
++ if (rsnd_flags_has(ssi, RSND_SSI_HDMI0))
+ return RSND_SSI_HDMI_PORT0;
+
+- if (rsnd_ssi_flags_has(ssi, RSND_SSI_HDMI1))
++ if (rsnd_flags_has(ssi, RSND_SSI_HDMI1))
+ return RSND_SSI_HDMI_PORT1;
+
+ return 0;
+@@ -134,7 +131,7 @@ int rsnd_ssi_use_busif(struct rsnd_dai_stream *io)
+ if (!rsnd_ssi_is_dma_mode(mod))
+ return 0;
+
+- if (!(rsnd_ssi_flags_has(ssi, RSND_SSI_NO_BUSIF)))
++ if (!(rsnd_flags_has(ssi, RSND_SSI_NO_BUSIF)))
+ use_busif = 1;
+ if (rsnd_io_to_mod_src(io))
+ use_busif = 1;
+@@ -802,13 +799,13 @@ static int rsnd_ssi_common_probe(struct rsnd_mod *mod,
+ * But it don't need to call request_irq() many times.
+ * Let's control it by RSND_SSI_PROBED flag.
+ */
+- if (!rsnd_ssi_flags_has(ssi, RSND_SSI_PROBED)) {
++ if (!rsnd_flags_has(ssi, RSND_SSI_PROBED)) {
+ ret = request_irq(ssi->irq,
+ rsnd_ssi_interrupt,
+ IRQF_SHARED,
+ dev_name(dev), mod);
+
+- rsnd_ssi_flags_set(ssi, RSND_SSI_PROBED);
++ rsnd_flags_set(ssi, RSND_SSI_PROBED);
+ }
+
+ return ret;
+@@ -826,10 +823,10 @@ static int rsnd_ssi_common_remove(struct rsnd_mod *mod,
+ return 0;
+
+ /* PIO will request IRQ again */
+- if (rsnd_ssi_flags_has(ssi, RSND_SSI_PROBED)) {
++ if (rsnd_flags_has(ssi, RSND_SSI_PROBED)) {
+ free_irq(ssi->irq, mod);
+
+- rsnd_ssi_flags_del(ssi, RSND_SSI_PROBED);
++ rsnd_flags_del(ssi, RSND_SSI_PROBED);
+ }
+
+ return 0;
+@@ -1012,13 +1009,13 @@ static void __rsnd_ssi_parse_hdmi_connection(struct rsnd_priv *priv,
+ ssi = rsnd_mod_to_ssi(mod);
+
+ if (strstr(remote_ep->full_name, "hdmi0")) {
+- rsnd_ssi_flags_set(ssi, RSND_SSI_HDMI0);
++ rsnd_flags_set(ssi, RSND_SSI_HDMI0);
+ dev_dbg(dev, "%s[%d] connected to HDMI0\n",
+ rsnd_mod_name(mod), rsnd_mod_id(mod));
+ }
+
+ if (strstr(remote_ep->full_name, "hdmi1")) {
+- rsnd_ssi_flags_set(ssi, RSND_SSI_HDMI1);
++ rsnd_flags_set(ssi, RSND_SSI_HDMI1);
+ dev_dbg(dev, "%s[%d] connected to HDMI1\n",
+ rsnd_mod_name(mod), rsnd_mod_id(mod));
+ }
+@@ -1051,7 +1048,7 @@ int __rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod)
+ {
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+
+- return !!(rsnd_ssi_flags_has(ssi, RSND_SSI_CLK_PIN_SHARE));
++ return !!(rsnd_flags_has(ssi, RSND_SSI_CLK_PIN_SHARE));
+ }
+
+ static u32 *rsnd_ssi_get_status(struct rsnd_dai_stream *io,
+@@ -1137,10 +1134,10 @@ int rsnd_ssi_probe(struct rsnd_priv *priv)
+ }
+
+ if (of_get_property(np, "shared-pin", NULL))
+- rsnd_ssi_flags_set(ssi, RSND_SSI_CLK_PIN_SHARE);
++ rsnd_flags_set(ssi, RSND_SSI_CLK_PIN_SHARE);
+
+ if (of_get_property(np, "no-busif", NULL))
+- rsnd_ssi_flags_set(ssi, RSND_SSI_NO_BUSIF);
++ rsnd_flags_set(ssi, RSND_SSI_NO_BUSIF);
+
+ ssi->irq = irq_of_parse_and_map(np, 0);
+ if (!ssi->irq) {
+--
+2.19.0
+
diff --git a/patches/0138-ASoC-rsnd-use-generic-rsnd_flags_xxx-macro-on-ADG.patch b/patches/0138-ASoC-rsnd-use-generic-rsnd_flags_xxx-macro-on-ADG.patch
new file mode 100644
index 0000000..46c773d
--- /dev/null
+++ b/patches/0138-ASoC-rsnd-use-generic-rsnd_flags_xxx-macro-on-ADG.patch
@@ -0,0 +1,73 @@
+From d668328c39d03d5f5d3452f1d5855963edcb4f64 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:48:12 +0000
+Subject: [PATCH 0138/1795] ASoC: rsnd: use generic rsnd_flags_xxx() macro on
+ ADG
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit d0cf7fc948159a3eab9ad2e959cce7f06f2333df)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/adg.c | 13 ++++++-------
+ 1 file changed, 6 insertions(+), 7 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
+index e28edb1f7263..f21179f29b6c 100644
+--- a/sound/soc/sh/rcar/adg.c
++++ b/sound/soc/sh/rcar/adg.c
+@@ -44,7 +44,6 @@ struct rsnd_adg {
+
+ #define LRCLK_ASYNC (1 << 0)
+ #define AUDIO_OUT_48 (1 << 1)
+-#define adg_mode_flags(adg) (adg->flags)
+
+ #define for_each_rsnd_clk(pos, adg, i) \
+ for (i = 0; \
+@@ -366,8 +365,8 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *ssi_mod, unsigned int rate)
+
+ rsnd_adg_set_ssi_clk(ssi_mod, data);
+
+- if (adg_mode_flags(adg) & LRCLK_ASYNC) {
+- if (adg_mode_flags(adg) & AUDIO_OUT_48)
++ if (rsnd_flags_has(adg, LRCLK_ASYNC)) {
++ if (rsnd_flags_has(adg, AUDIO_OUT_48))
+ ckr = 0x80000000;
+ } else {
+ if (0 == (rate % 8000))
+@@ -479,10 +478,10 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
+ }
+
+ if (req_rate[0] % 48000 == 0)
+- adg->flags |= AUDIO_OUT_48;
++ rsnd_flags_set(adg, AUDIO_OUT_48);
+
+ if (of_get_property(np, "clkout-lr-asynchronous", NULL))
+- adg->flags |= LRCLK_ASYNC;
++ rsnd_flags_set(adg, LRCLK_ASYNC);
+
+ /*
+ * This driver is assuming that AUDIO_CLKA/AUDIO_CLKB/AUDIO_CLKC
+@@ -512,7 +511,7 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
+ adg->rbga_rate_for_441khz = rate / div;
+ ckr |= brg_table[i] << 20;
+ if (req_441kHz_rate &&
+- !(adg_mode_flags(adg) & AUDIO_OUT_48))
++ !rsnd_flags_has(adg, AUDIO_OUT_48))
+ parent_clk_name = __clk_get_name(clk);
+ }
+ }
+@@ -528,7 +527,7 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
+ adg->rbgb_rate_for_48khz = rate / div;
+ ckr |= brg_table[i] << 16;
+ if (req_48kHz_rate &&
+- (adg_mode_flags(adg) & AUDIO_OUT_48))
++ rsnd_flags_has(adg, AUDIO_OUT_48))
+ parent_clk_name = __clk_get_name(clk);
+ }
+ }
+--
+2.19.0
+
diff --git a/patches/0139-ASoC-rsnd-DVC-kctrl-sets-once.patch b/patches/0139-ASoC-rsnd-DVC-kctrl-sets-once.patch
new file mode 100644
index 0000000..40bd654
--- /dev/null
+++ b/patches/0139-ASoC-rsnd-DVC-kctrl-sets-once.patch
@@ -0,0 +1,63 @@
+From 1b2cc117f049d4b30c5ce3801b5f841a48268da8 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:48:29 +0000
+Subject: [PATCH 0139/1795] ASoC: rsnd: DVC kctrl sets once
+
+Same DVC might be used few times if system/platform is using MIX.
+For example below case.
+
+ DAI0 playback = <&src0 &ctu02 &mix0 &dvc0 &ssi0>;
+ DAI1 playback = <&src2 &ctu03 &mix0 &dvc0 &ssi0>;
+
+This case, ALSA will have DVC,0 and DVC,1 kcontrol interfaces,
+but these are same DVC. This is confusing.
+This patch adds new flags and avoid such case.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit b918f1bc7f1ce463d6fbb6ebf3db36bd302bded8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/dvc.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/sound/soc/sh/rcar/dvc.c b/sound/soc/sh/rcar/dvc.c
+index 1743ade3cc55..bb22850e8fe6 100644
+--- a/sound/soc/sh/rcar/dvc.c
++++ b/sound/soc/sh/rcar/dvc.c
+@@ -44,8 +44,11 @@ struct rsnd_dvc {
+ struct rsnd_kctrl_cfg_s ren; /* Ramp Enable */
+ struct rsnd_kctrl_cfg_s rup; /* Ramp Rate Up */
+ struct rsnd_kctrl_cfg_s rdown; /* Ramp Rate Down */
++ u32 flags;
+ };
+
++#define KCTRL_INITIALIZED (1 << 0)
++
+ #define rsnd_dvc_get(priv, id) ((struct rsnd_dvc *)(priv->dvc) + id)
+ #define rsnd_dvc_nr(priv) ((priv)->dvc_nr)
+
+@@ -254,6 +257,9 @@ static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
+ int channels = rsnd_rdai_channels_get(rdai);
+ int ret;
+
++ if (rsnd_flags_has(dvc, KCTRL_INITIALIZED))
++ return 0;
++
+ /* Volume */
+ ret = rsnd_kctrl_new_m(mod, io, rtd,
+ is_play ?
+@@ -307,6 +313,8 @@ static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
+ if (ret < 0)
+ return ret;
+
++ rsnd_flags_set(dvc, KCTRL_INITIALIZED);
++
+ return 0;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0140-ASoC-rsnd-CTU-kctrl-sets-once.patch b/patches/0140-ASoC-rsnd-CTU-kctrl-sets-once.patch
new file mode 100644
index 0000000..557cb04
--- /dev/null
+++ b/patches/0140-ASoC-rsnd-CTU-kctrl-sets-once.patch
@@ -0,0 +1,63 @@
+From d672412e3dff1da5870e1f6c97050eabc1be8bb7 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:48:46 +0000
+Subject: [PATCH 0140/1795] ASoC: rsnd: CTU kctrl sets once
+
+Same CTU might be used few times if system/platform is using MIX.
+For example below case.
+
+ DAI0 playback = <&src0 &ctu02 &mix0 &dvc0 &ssi0>;
+ DAI1 playback = <&src2 &ctu03 &mix0 &dvc0 &ssi0>;
+
+This case, ALSA will have CTU,0 and CTU,1 kcontrol interfaces,
+but these are same CTU. This is confusing.
+This patch adds new flags and avoid such case.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 99dc79d0600849ff878a38d9884e76f5bebd3228)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/ctu.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/sound/soc/sh/rcar/ctu.c b/sound/soc/sh/rcar/ctu.c
+index e7f53f44165d..ad07ba8c3720 100644
+--- a/sound/soc/sh/rcar/ctu.c
++++ b/sound/soc/sh/rcar/ctu.c
+@@ -81,8 +81,11 @@ struct rsnd_ctu {
+ struct rsnd_kctrl_cfg_m sv3;
+ struct rsnd_kctrl_cfg_s reset;
+ int channels;
++ u32 flags;
+ };
+
++#define KCTRL_INITIALIZED (1 << 0)
++
+ #define rsnd_ctu_nr(priv) ((priv)->ctu_nr)
+ #define for_each_rsnd_ctu(pos, priv, i) \
+ for ((i) = 0; \
+@@ -277,6 +280,9 @@ static int rsnd_ctu_pcm_new(struct rsnd_mod *mod,
+ struct rsnd_ctu *ctu = rsnd_mod_to_ctu(mod);
+ int ret;
+
++ if (rsnd_flags_has(ctu, KCTRL_INITIALIZED))
++ return 0;
++
+ /* CTU Pass */
+ ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU Pass",
+ rsnd_kctrl_accept_anytime,
+@@ -326,6 +332,8 @@ static int rsnd_ctu_pcm_new(struct rsnd_mod *mod,
+ rsnd_ctu_value_reset,
+ &ctu->reset, 1);
+
++ rsnd_flags_set(ctu, KCTRL_INITIALIZED);
++
+ return ret;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0141-ASoC-rsnd-makes-volume-ramp-rate-list-generic.patch b/patches/0141-ASoC-rsnd-makes-volume-ramp-rate-list-generic.patch
new file mode 100644
index 0000000..31cb28c
--- /dev/null
+++ b/patches/0141-ASoC-rsnd-makes-volume-ramp-rate-list-generic.patch
@@ -0,0 +1,140 @@
+From 5da97aa1b64e106d34c4d8686043b2723cfdddd8 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:49:03 +0000
+Subject: [PATCH 0141/1795] ASoC: rsnd: makes volume ramp rate list generic
+
+DVC is supporting Volume Ramp Rate, and MIX has Volume Ramp
+but not yet supported. To support MIX Volume Ramp, we want to
+share Rate List since DVC/MIX are using almost same list.
+This patch move DVC specific Volume Ramp Rate List to core.c.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit f3c26ac61c09862f0037fe484a98da0364f02ec3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/core.c | 27 +++++++++++++++++++++++++++
+ sound/soc/sh/rcar/dvc.c | 33 ++++-----------------------------
+ sound/soc/sh/rcar/rsnd.h | 7 +++++--
+ 3 files changed, 36 insertions(+), 31 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 107133297e8d..2d94b3d4519c 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -1242,6 +1242,33 @@ struct rsnd_kctrl_cfg *rsnd_kctrl_init_s(struct rsnd_kctrl_cfg_s *cfg)
+ return &cfg->cfg;
+ }
+
++const char * const volume_ramp_rate[] = {
++ "128 dB/1 step", /* 00000 */
++ "64 dB/1 step", /* 00001 */
++ "32 dB/1 step", /* 00010 */
++ "16 dB/1 step", /* 00011 */
++ "8 dB/1 step", /* 00100 */
++ "4 dB/1 step", /* 00101 */
++ "2 dB/1 step", /* 00110 */
++ "1 dB/1 step", /* 00111 */
++ "0.5 dB/1 step", /* 01000 */
++ "0.25 dB/1 step", /* 01001 */
++ "0.125 dB/1 step", /* 01010 */
++ "0.125 dB/2 steps", /* 01011 */
++ "0.125 dB/4 steps", /* 01100 */
++ "0.125 dB/8 steps", /* 01101 */
++ "0.125 dB/16 steps", /* 01110 */
++ "0.125 dB/32 steps", /* 01111 */
++ "0.125 dB/64 steps", /* 10000 */
++ "0.125 dB/128 steps", /* 10001 */
++ "0.125 dB/256 steps", /* 10010 */
++ "0.125 dB/512 steps", /* 10011 */
++ "0.125 dB/1024 steps", /* 10100 */
++ "0.125 dB/2048 steps", /* 10101 */
++ "0.125 dB/4096 steps", /* 10110 */
++ "0.125 dB/8192 steps", /* 10111 = VOLUME_RAMP_MAX_DVC */
++};
++
+ int rsnd_kctrl_new(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct snd_soc_pcm_runtime *rtd,
+diff --git a/sound/soc/sh/rcar/dvc.c b/sound/soc/sh/rcar/dvc.c
+index bb22850e8fe6..4ef318ac73d5 100644
+--- a/sound/soc/sh/rcar/dvc.c
++++ b/sound/soc/sh/rcar/dvc.c
+@@ -61,33 +61,6 @@ struct rsnd_dvc {
+ ((pos) = (struct rsnd_dvc *)(priv)->dvc + i); \
+ i++)
+
+-static const char * const dvc_ramp_rate[] = {
+- "128 dB/1 step", /* 00000 */
+- "64 dB/1 step", /* 00001 */
+- "32 dB/1 step", /* 00010 */
+- "16 dB/1 step", /* 00011 */
+- "8 dB/1 step", /* 00100 */
+- "4 dB/1 step", /* 00101 */
+- "2 dB/1 step", /* 00110 */
+- "1 dB/1 step", /* 00111 */
+- "0.5 dB/1 step", /* 01000 */
+- "0.25 dB/1 step", /* 01001 */
+- "0.125 dB/1 step", /* 01010 */
+- "0.125 dB/2 steps", /* 01011 */
+- "0.125 dB/4 steps", /* 01100 */
+- "0.125 dB/8 steps", /* 01101 */
+- "0.125 dB/16 steps", /* 01110 */
+- "0.125 dB/32 steps", /* 01111 */
+- "0.125 dB/64 steps", /* 10000 */
+- "0.125 dB/128 steps", /* 10001 */
+- "0.125 dB/256 steps", /* 10010 */
+- "0.125 dB/512 steps", /* 10011 */
+- "0.125 dB/1024 steps", /* 10100 */
+- "0.125 dB/2048 steps", /* 10101 */
+- "0.125 dB/4096 steps", /* 10110 */
+- "0.125 dB/8192 steps", /* 10111 */
+-};
+-
+ static void rsnd_dvc_activation(struct rsnd_mod *mod)
+ {
+ rsnd_mod_write(mod, DVC_SWRSR, 0);
+@@ -298,7 +271,8 @@ static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
+ rsnd_kctrl_accept_anytime,
+ rsnd_dvc_volume_update,
+ &dvc->rup,
+- dvc_ramp_rate);
++ volume_ramp_rate,
++ VOLUME_RAMP_MAX_DVC);
+ if (ret < 0)
+ return ret;
+
+@@ -308,7 +282,8 @@ static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
+ rsnd_kctrl_accept_anytime,
+ rsnd_dvc_volume_update,
+ &dvc->rdown,
+- dvc_ramp_rate);
++ volume_ramp_rate,
++ VOLUME_RAMP_MAX_DVC);
+
+ if (ret < 0)
+ return ret;
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index beffbec42404..9d66a15000fa 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -656,9 +656,12 @@ int rsnd_kctrl_new(struct rsnd_mod *mod,
+ rsnd_kctrl_new(mod, io, rtd, name, accept, update, rsnd_kctrl_init_s(cfg), \
+ NULL, 1, max)
+
+-#define rsnd_kctrl_new_e(mod, io, rtd, name, accept, update, cfg, texts) \
++#define rsnd_kctrl_new_e(mod, io, rtd, name, accept, update, cfg, texts, size) \
+ rsnd_kctrl_new(mod, io, rtd, name, accept, update, rsnd_kctrl_init_s(cfg), \
+- texts, 1, ARRAY_SIZE(texts))
++ texts, 1, size)
++
++extern const char * const volume_ramp_rate[];
++#define VOLUME_RAMP_MAX_DVC (0x17 + 1)
+
+ /*
+ * R-Car SSI
+--
+2.19.0
+
diff --git a/patches/0142-ASoC-rsnd-add-MIX-Volume-Ramp-support.patch b/patches/0142-ASoC-rsnd-add-MIX-Volume-Ramp-support.patch
new file mode 100644
index 0000000..ec0788f
--- /dev/null
+++ b/patches/0142-ASoC-rsnd-add-MIX-Volume-Ramp-support.patch
@@ -0,0 +1,269 @@
+From e22d997e419e05cc57fbeed7c9ce099edec6ceea Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:49:18 +0000
+Subject: [PATCH 0142/1795] ASoC: rsnd: add MIX Volume Ramp support
+
+Both DVC/MIX have Volume Ramp Control. This patch supprts MIX
+Volume Ramp. One note is that main purpose of MIX Volume Ramp
+is to reduce noise, thus, MIX Ramp range is very few if you
+compare to DVC Volume Ramp (DVC = 5bit, MIX = 4bit).
+
+You can use MIX Volume Ranp like below
+ amixer set "MIX Ramp Up Rate" "0.125 dB/1 step"
+ amixer set "MIX Ramp Down Rate" "0.125 dB/1 step"
+ amixer set "MIX Ramp" on
+ aplay xxx.wav &
+ amixer set "MIX",0 80% // DAI0 Volume Down
+ amixer set "MIX",1 100% // DAI1 Volume Up
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 3e3c9ee1e4b3d0ef1f68f2037752196e7260bad9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/core.c | 2 +-
+ sound/soc/sh/rcar/mix.c | 158 +++++++++++++++++++++++++++++++++++++--
+ sound/soc/sh/rcar/rsnd.h | 1 +
+ 3 files changed, 154 insertions(+), 7 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 2d94b3d4519c..e9b0b0f5f0ee 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -1253,7 +1253,7 @@ const char * const volume_ramp_rate[] = {
+ "1 dB/1 step", /* 00111 */
+ "0.5 dB/1 step", /* 01000 */
+ "0.25 dB/1 step", /* 01001 */
+- "0.125 dB/1 step", /* 01010 */
++ "0.125 dB/1 step", /* 01010 = VOLUME_RAMP_MAX_MIX */
+ "0.125 dB/2 steps", /* 01011 */
+ "0.125 dB/4 steps", /* 01100 */
+ "0.125 dB/8 steps", /* 01101 */
+diff --git a/sound/soc/sh/rcar/mix.c b/sound/soc/sh/rcar/mix.c
+index 6c4826c189a4..912cfec49038 100644
+--- a/sound/soc/sh/rcar/mix.c
++++ b/sound/soc/sh/rcar/mix.c
+@@ -7,6 +7,33 @@
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
++
++/*
++ * CTUn MIXn
++ * +------+ +------+
++ * [SRC3 / SRC6] -> |CTU n0| -> [MIX n0| ->
++ * [SRC4 / SRC9] -> |CTU n1| -> [MIX n1| ->
++ * [SRC0 / SRC1] -> |CTU n2| -> [MIX n2| ->
++ * [SRC2 / SRC5] -> |CTU n3| -> [MIX n3| ->
++ * +------+ +------+
++ *
++ * ex)
++ * DAI0 : playback = <&src0 &ctu02 &mix0 &dvc0 &ssi0>;
++ * DAI1 : playback = <&src2 &ctu03 &mix0 &dvc0 &ssi0>;
++ *
++ * MIX Volume
++ * amixer set "MIX",0 100% // DAI0 Volume
++ * amixer set "MIX",1 100% // DAI1 Volume
++ *
++ * Volume Ramp
++ * amixer set "MIX Ramp Up Rate" "0.125 dB/1 step"
++ * amixer set "MIX Ramp Down Rate" "4 dB/1 step"
++ * amixer set "MIX Ramp" on
++ * aplay xxx.wav &
++ * amixer set "MIX",0 80% // DAI0 Volume Down
++ * amixer set "MIX",1 100% // DAI1 Volume Up
++ */
++
+ #include "rsnd.h"
+
+ #define MIX_NAME_SIZE 16
+@@ -14,8 +41,27 @@
+
+ struct rsnd_mix {
+ struct rsnd_mod mod;
++ struct rsnd_kctrl_cfg_s volumeA; /* MDBAR */
++ struct rsnd_kctrl_cfg_s volumeB; /* MDBBR */
++ struct rsnd_kctrl_cfg_s volumeC; /* MDBCR */
++ struct rsnd_kctrl_cfg_s volumeD; /* MDBDR */
++ struct rsnd_kctrl_cfg_s ren; /* Ramp Enable */
++ struct rsnd_kctrl_cfg_s rup; /* Ramp Rate Up */
++ struct rsnd_kctrl_cfg_s rdw; /* Ramp Rate Down */
++ u32 flags;
+ };
+
++#define ONCE_KCTRL_INITIALIZED (1 << 0)
++#define HAS_VOLA (1 << 1)
++#define HAS_VOLB (1 << 2)
++#define HAS_VOLC (1 << 3)
++#define HAS_VOLD (1 << 4)
++
++#define VOL_MAX 0x3ff
++
++#define rsnd_mod_to_mix(_mod) \
++ container_of((_mod), struct rsnd_mix, mod)
++
+ #define rsnd_mix_get(priv, id) ((struct rsnd_mix *)(priv->mix) + id)
+ #define rsnd_mix_nr(priv) ((priv)->mix_nr)
+ #define for_each_rsnd_mix(pos, priv, i) \
+@@ -36,26 +82,43 @@ static void rsnd_mix_halt(struct rsnd_mod *mod)
+ rsnd_mod_write(mod, MIX_SWRSR, 0);
+ }
+
++#define rsnd_mix_get_vol(mix, X) \
++ rsnd_flags_has(mix, HAS_VOL##X) ? \
++ (VOL_MAX - mix->volume##X.cfg.val[0]) : 0
+ static void rsnd_mix_volume_parameter(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod)
+ {
+- rsnd_mod_write(mod, MIX_MDBAR, 0);
+- rsnd_mod_write(mod, MIX_MDBBR, 0);
+- rsnd_mod_write(mod, MIX_MDBCR, 0);
+- rsnd_mod_write(mod, MIX_MDBDR, 0);
++ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
++ struct device *dev = rsnd_priv_to_dev(priv);
++ struct rsnd_mix *mix = rsnd_mod_to_mix(mod);
++ u32 volA = rsnd_mix_get_vol(mix, A);
++ u32 volB = rsnd_mix_get_vol(mix, B);
++ u32 volC = rsnd_mix_get_vol(mix, C);
++ u32 volD = rsnd_mix_get_vol(mix, D);
++
++ dev_dbg(dev, "MIX A/B/C/D = %02x/%02x/%02x/%02x\n",
++ volA, volB, volC, volD);
++
++ rsnd_mod_write(mod, MIX_MDBAR, volA);
++ rsnd_mod_write(mod, MIX_MDBBR, volB);
++ rsnd_mod_write(mod, MIX_MDBCR, volC);
++ rsnd_mod_write(mod, MIX_MDBDR, volD);
+ }
+
+ static void rsnd_mix_volume_init(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod)
+ {
++ struct rsnd_mix *mix = rsnd_mod_to_mix(mod);
++
+ rsnd_mod_write(mod, MIX_MIXIR, 1);
+
+ /* General Information */
+ rsnd_mod_write(mod, MIX_ADINR, rsnd_runtime_channel_after_ctu(io));
+
+ /* volume step */
+- rsnd_mod_write(mod, MIX_MIXMR, 0);
+- rsnd_mod_write(mod, MIX_MVPDR, 0);
++ rsnd_mod_write(mod, MIX_MIXMR, mix->ren.cfg.val[0]);
++ rsnd_mod_write(mod, MIX_MVPDR, mix->rup.cfg.val[0] << 8 |
++ mix->rdw.cfg.val[0]);
+
+ /* common volume parameter */
+ rsnd_mix_volume_parameter(io, mod);
+@@ -109,11 +172,94 @@ static int rsnd_mix_quit(struct rsnd_mod *mod,
+ return 0;
+ }
+
++static int rsnd_mix_pcm_new(struct rsnd_mod *mod,
++ struct rsnd_dai_stream *io,
++ struct snd_soc_pcm_runtime *rtd)
++{
++ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
++ struct device *dev = rsnd_priv_to_dev(priv);
++ struct rsnd_mix *mix = rsnd_mod_to_mix(mod);
++ struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io);
++ struct rsnd_kctrl_cfg_s *volume;
++ int ret;
++
++ switch (rsnd_mod_id(src_mod)) {
++ case 3:
++ case 6: /* MDBAR */
++ volume = &mix->volumeA;
++ rsnd_flags_set(mix, HAS_VOLA);
++ break;
++ case 4:
++ case 9: /* MDBBR */
++ volume = &