blob: 7ef3b85e6f55fc4e798330be9dd320890f74567e [file] [log] [blame]
From bb213fd07ad2ee702b1e8bb0faa602a4b6b0e481 Mon Sep 17 00:00:00 2001
From: Biju Das <biju.das@bp.renesas.com>
Date: Mon, 9 Oct 2017 14:59:00 +0100
Subject: [PATCH 0362/1795] ARM: dts: iwg22d-sodimm: Enable internal PCI
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
attached to them.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit bc058f6f03e47610c994a97ecf3bf8a3ea44efee)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 8772c561e3a8..e378e5ecfcac 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -55,6 +55,11 @@
function = "sdhi0";
power-source = <3300>;
};
+
+ usb1_pins: usb1 {
+ groups = "usb1";
+ function = "usb1";
+ };
};
&scif4 {
@@ -92,3 +97,9 @@
cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
+
+&pci1 {
+ status = "okay";
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+};
--
2.19.0