blob: 8fe9fadfcfd06ec5cdc9028ec8dc1d6149e0fd05 [file] [log] [blame]
From 6142fae48418fea0564d8db5f637cb689909a81f Mon Sep 17 00:00:00 2001
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Date: Tue, 7 Nov 2017 15:10:45 +0000
Subject: [PATCH 0689/1795] ARM: dts: iwg22d-sodimm: Add can0 support to
carrier board
This patch enables CAN0 interface exposed through connector J15 on the
carrier board.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 805a5263f4212e431a44c4a04738022a2498f652)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 80c82aa94c06..39ce7e7101c7 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -59,6 +59,13 @@
};
};
+&can0 {
+ pinctrl-0 = <&can0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&hscif1 {
pinctrl-0 = <&hscif1_pins>;
pinctrl-names = "default";
@@ -85,6 +92,11 @@
function = "avb";
};
+ can0_pins: can0 {
+ groups = "can0_data";
+ function = "can0";
+ };
+
hscif1_pins: hscif1 {
groups = "hscif1_data", "hscif1_ctrl";
function = "hscif1";
--
2.19.0